update 1.8
This commit is contained in:
@@ -9,9 +9,7 @@
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* Attention: This software (modified or not) and binary are used for
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* microcontroller manufactured by Nanjing Qinheng Microelectronics.
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*******************************************************************************/
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#include "string.h"
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#include "debug.h"
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#include "eth_driver.h"
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__attribute__((__aligned__(4))) ETH_DMADESCTypeDef DMARxDscrTab[ETH_RXBUFNB]; /* MAC receive descriptor, 4-byte aligned*/
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@@ -45,18 +43,20 @@ const uint16_t MemSize[8] = {WCHNET_MEM_ALIGN_SIZE(WCHNET_SIZE_IPRAW_PCB),
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uint32_t volatile LocalTime;
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ETH_DMADESCTypeDef *DMATxDescToSet;
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uint32_t phyLinkTime;
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uint8_t phyLinkStatus = 0;
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uint8_t phyStatus = 0;
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uint8_t phyPN = 0x01;
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uint8_t phyPNChangeCnt = 0;
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uint8_t phyLinkCnt = 0;
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uint8_t phyRetryCnt = 0;
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uint8_t phySucCnt = 0;
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ETH_DMADESCTypeDef *DMARxDescToGet;
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ETH_DMADESCTypeDef *pDMARxSet;
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volatile uint8_t phyLinkReset;
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volatile uint32_t phyLinkTime;
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uint8_t phyPN = 0x01;
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uint8_t phyStatus = 0;
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uint8_t phySucCnt = 0;
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uint8_t phyLinkCnt = 0;
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uint8_t phyRetryCnt = 0;
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uint8_t CRCErrPktCnt = 0;
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uint8_t phyLinkStatus = 0;
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uint8_t phyPNChangeCnt = 0;
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uint8_t PhyPolarityDetect = 0;
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/*********************************************************************
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* @fn WCHNET_GetMacAddr
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*
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@@ -242,6 +242,32 @@ void WCHNET_LinkProcess( void )
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}
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}
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/*********************************************************************
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* @fn WCHNET_PhyPNProcess
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*
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* @brief Phy PN Polarity related processing
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*
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* @param none.
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*
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* @return none.
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*/
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void WCHNET_PhyPNProcess(void)
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{
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uint32_t PhyVal;
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phyLinkTime = LocalTime;
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if(CRCErrPktCnt >= 3)
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{
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PhyVal = ReadPHYReg(PHY_MDIX);
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if((PhyVal >> 2) & 0x01)
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PhyVal &= ~(3 << 2); //change PHY PN Polarity to normal
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else
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PhyVal |= 1 << 2; //change PHY PN Polarity to reverse
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WritePHYReg(PHY_MDIX, PhyVal);
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CRCErrPktCnt = 0;
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}
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}
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/*********************************************************************
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* @fn WCHNET_HandlePhyNegotiation
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*
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@@ -253,14 +279,34 @@ void WCHNET_LinkProcess( void )
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*/
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void WCHNET_HandlePhyNegotiation(void)
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{
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if( !phyStatus ) /* Handling PHY Negotiation Exceptions */
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if(phyLinkReset) /* After the PHY link is disconnected, wait 500ms before turning on the PHY clock*/
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{
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if(phyLinkTime > LocalTime)
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phyLinkTime = LocalTime;
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if( LocalTime - phyLinkTime >= PHY_LINK_TASK_PERIOD ) /* 50ms cycle timing call */
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if( LocalTime - phyLinkTime >= 500 )
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{
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phyLinkTime = LocalTime;
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WCHNET_LinkProcess( );
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phyLinkReset = 0;
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EXTEN->EXTEN_CTR |= EXTEN_ETH_10M_EN;
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WritePHYReg(PHY_BMCR, PHY_Reset);
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PHY_NEGOTIATION_PARAM_INIT();
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}
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}
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else
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{
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if( !phyStatus ) /* Handling PHY Negotiation Exceptions */
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{
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if( LocalTime - phyLinkTime >= PHY_LINK_TASK_PERIOD ) /* 50ms cycle timing call */
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{
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phyLinkTime = LocalTime;
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WCHNET_LinkProcess( );
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}
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}
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else{
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if(PhyPolarityDetect)
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{
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if( LocalTime - phyLinkTime >= 2 * PHY_LINK_TASK_PERIOD )
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{
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WCHNET_PhyPNProcess();
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}
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}
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}
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}
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}
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@@ -404,7 +450,6 @@ void ETH_Start(void)
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{
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R16_ETH_ERXST = DMARxDescToGet->Buffer1Addr;
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R8_ETH_ECON1 |= RB_ETH_ECON1_RXEN; //receive enable
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EXTEN->EXTEN_CTR |= EXTEN_ETH_10M_EN;
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}
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/*********************************************************************
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@@ -462,14 +507,17 @@ void ETH_Configuration( uint8_t *macAddr )
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R8_ETH_MACON2 |= RB_ETH_MACON2_TXCRCEN; //Hardware padded CRC
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R8_ETH_MACON2 &= ~RB_ETH_MACON2_HFRMEN; //Jumbo frames are not received
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R16_ETH_MAMXFL = ETH_MAX_PACKET_SIZE;
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EXTEN->EXTEN_CTR |= EXTEN_ETH_10M_EN;
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}
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/*********************************************************************
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* @fn ETH_TxPktChainMode
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*
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* @brief MAC send a Ethernet frame in chain mode.
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* @brief Ethernet sends data frames in chain mode.
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*
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* @param Send length
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* @param len Send data length
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* pBuff send buffer pointer
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*
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* @return Send status.
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*/
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@@ -493,22 +541,24 @@ uint32_t ETH_TxPktChainMode(uint16_t len, uint32_t *pBuff )
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return ETH_SUCCESS;
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}
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/*********************************************************************
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* @fn ETH_PHYLink
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*
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* @brief
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*
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* @return none
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*/
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void ETH_PHYLink( void )
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{
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uint16_t RegValue;
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uint32_t phy_stat, phy_anlpar;
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phy_anlpar = ReadPHYReg(PHY_ANLPAR);
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phy_stat = ReadPHYReg(PHY_BMSR); //Read PHY Status Register
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if((phy_stat&(PHY_Linked_Status))&&(phy_anlpar == 0)){ //restart negotiation
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RegValue = ReadPHYReg(PHY_BMCR);
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RegValue |= PHY_Reset;
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WritePHYReg(PHY_BMCR, RegValue);
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EXTEN->EXTEN_CTR &= ~EXTEN_ETH_10M_EN;
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Delay_Ms(500);
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EXTEN->EXTEN_CTR |= EXTEN_ETH_10M_EN;
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PHY_NEGOTIATION_PARAM_INIT();
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phyLinkReset = 1;
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phyLinkTime = LocalTime;
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return;
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}
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WCHNET_PhyStatus( phy_stat );
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@@ -523,11 +573,19 @@ void ETH_PHYLink( void )
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{
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R8_ETH_MACON2 &= ~RB_ETH_MACON2_FULDPX;
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}
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/* Receive CRC error packets */
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R8_ETH_ERXFCON |= RB_ETH_ERXFCON_CRCEN;
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CRCErrPktCnt = 0;
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PhyPolarityDetect = 1;
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phyLinkTime = LocalTime;
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phyStatus = PHY_Linked_Status;
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ETH_Start( );
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}
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else
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{
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PHY_NEGOTIATION_PARAM_INIT();
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EXTEN->EXTEN_CTR &= ~EXTEN_ETH_10M_EN;
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phyLinkReset = 1;
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phyLinkTime = LocalTime;
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}
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}
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@@ -568,6 +626,12 @@ void WCHNET_ETHIsr( void )
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R16_ETH_ERXST = DMARxDescToGet->Buffer1Addr;
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}
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}
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if(PhyPolarityDetect)
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{
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PhyPolarityDetect = 0;
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/* Discard CRC error packet */
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R8_ETH_ERXFCON &= ~RB_ETH_ERXFCON_CRCEN;
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}
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}
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if(eth_irq_flag&RB_ETH_EIR_TXIF) //send completed
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{
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@@ -586,6 +650,7 @@ void WCHNET_ETHIsr( void )
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}
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if(eth_irq_flag&RB_ETH_EIR_RXERIF) //receive error
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{
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if(PhyPolarityDetect) CRCErrPktCnt++;
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R8_ETH_EIR = RB_ETH_EIR_RXERIF;
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}
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}
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@@ -605,7 +670,6 @@ void ETH_Init( uint8_t *macAddr )
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ETH_DMATxDescChainInit(DMATxDscrTab, MACTxBuf, ETH_TXBUFNB);
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ETH_DMARxDescChainInit(DMARxDscrTab, MACRxBuf, ETH_RXBUFNB);
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pDMARxSet = DMARxDscrTab;
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ETH_Start( );
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NVIC_EnableIRQ(ETH_IRQn);
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}
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@@ -18,18 +18,12 @@
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#include "debug.h"
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#define USE_10M_BASE 1 // Internal 10M PHY
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#ifndef PHY_MODE
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#define PHY_MODE USE_10M_BASE
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#endif
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#define ROM_CFG_USERADR_ID 0x1FFFF7E8
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#define PHY_LINK_TASK_PERIOD 50
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#define PHY_ANLPAR_SELECTOR_FIELD 0x1F
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#define PHY_ANLPAR_SELECTOR_VALUE 0x01 // 5B'00001
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#define PHY_ANLPAR_SELECTOR_VALUE 0x01 /* 5B'00001 */
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#define PHY_LINK_INIT 0x00
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#define PHY_LINK_SUC_P (1<<0)
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@@ -53,9 +47,8 @@
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phyLinkStatus = PHY_LINK_INIT;\
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}while(0)
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/* definition for Ethernet frame */
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#define ETH_MAX_PACKET_SIZE 1536 /* ETH_HEADER + ETH_EXTRA + MAX_ETH_PAYLOAD + ETH_CRC */
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#define ETH_MAX_PACKET_SIZE 1536 /* ETH_HEADER + VLAN_TAG + MAX_ETH_PAYLOAD + ETH_CRC */
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#define ETH_HEADER 14 /* 6 byte Dest addr, 6 byte Src addr, 2 byte length/type */
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#define ETH_CRC 4 /* Ethernet CRC */
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#define ETH_EXTRA 2 /* Extra bytes in some cases */
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@@ -88,7 +81,6 @@ typedef struct
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uint32_t Buffer2NextDescAddr; /* Buffer2 or next descriptor address pointer */
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} ETH_DMADESCTypeDef;
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#include "wchnet.h"
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extern SOCK_INF SocketInf[ ];
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Binary file not shown.
@@ -1,9 +1,9 @@
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/********************************** (C) COPYRIGHT *******************************
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* File Name : WCHNET.H
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* Author : WCH
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* Version : V1.50
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* Date : 2022/11/25
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* Description : This file contains the headers of
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* File Name : wchnet.h
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* Author : WCH
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* Version : V1.80
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* Date : 2023/05/12
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* Description : This file contains the headers of
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* the Ethernet protocol stack library.
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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@@ -21,7 +21,7 @@
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extern "C" {
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#endif
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#define WCHNET_LIB_VER 0x15 //the library version number
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#define WCHNET_LIB_VER 0x18 //the library version number
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#define WCHNET_CFG_VALID 0x12345678 //Configuration value valid flag
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/* LED state @LED_STAT */
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@@ -122,13 +122,12 @@ extern "C" {
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#define WCHNET_SIZE_UDP_PCB 0x20 //UDP PCB size
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#define WCHNET_SIZE_TCP_PCB 0xB4 //TCP PCB size
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#define WCHNET_SIZE_TCP_PCB_LISTEN 0x24 //TCP LISTEN PCB size
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#define WCHNET_SIZE_IP_REASSDATA 0x10 //IP reassembled Management
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#define WCHNET_SIZE_IP_REASSDATA 0x20 //IP reassembled Management
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#define WCHNET_SIZE_PBUF 0x10 //Packet Buf
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#define WCHNET_SIZE_TCP_SEG 0x14 //TCP SEG structure
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#define WCHNET_SIZE_MEM 0x08 //sizeof(struct mem)
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#define WCHNET_SIZE_ARP_TABLE 0x18 //sizeof ARP table
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#define WCHNET_SIZE_POOL_BUF WCHNET_MEM_ALIGN_SIZE(WCHNET_TCP_MSS + 40 + 14 + 4) //pbuf size
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#define WCHNET_MEMP_SIZE ((WCHNET_MEM_ALIGNMENT - 1) + \
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(WCHNET_NUM_IPRAW * WCHNET_MEM_ALIGN_SIZE(WCHNET_SIZE_IPRAW_PCB)) + \
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(WCHNET_NUM_UDP * WCHNET_MEM_ALIGN_SIZE(WCHNET_SIZE_UDP_PCB)) + \
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@@ -140,7 +139,7 @@ extern "C" {
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(WCHNET_NUM_POOL_BUF * (WCHNET_MEM_ALIGN_SIZE(WCHNET_SIZE_PBUF) + WCHNET_MEM_ALIGN_SIZE(WCHNET_SIZE_POOL_BUF))))
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#define HEAP_MEM_ALIGN_SIZE (WCHNET_MEM_ALIGN_SIZE(WCHNET_SIZE_MEM))
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#define WCHNET_RAM_HEAP_SIZE (WCHNET_MEM_ALIGN_SIZE(WCHNET_MEM_HEAP_SIZE) + (2 * HEAP_MEM_ALIGN_SIZE) )
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#define WCHNET_RAM_HEAP_SIZE (WCHNET_MEM_ALIGN_SIZE(WCHNET_MEM_HEAP_SIZE) + HEAP_MEM_ALIGN_SIZE )
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#define WCHNET_RAM_ARP_TABLE_SIZE (WCHNET_MEM_ALIGN_SIZE(WCHNET_SIZE_ARP_TABLE) * WCHNET_NUM_ARP_TABLE)
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typedef struct
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@@ -165,11 +164,11 @@ typedef void (*dns_callback)( const char *name, uint8_t *ipaddr, void *callback_
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typedef uint8_t (*dhcp_callback)( uint8_t status, void * );
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/* socket receive callback type */
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struct _SCOK_INF;
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typedef void (*pSockRecv)( struct _SCOK_INF *, uint32_t, uint16_t, uint8_t *, uint32_t);
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struct _SOCK_INF;
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typedef void (*pSockRecv)( struct _SOCK_INF *, uint32_t, uint16_t, uint8_t *, uint32_t);
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/* sokcet information struct */
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typedef struct _SCOK_INF
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/* Socket information struct */
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typedef struct _SOCK_INF
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{
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uint32_t IntStatus; //interrupt state
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uint32_t SockIndex; //Socket index value
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@@ -177,7 +176,7 @@ typedef struct _SCOK_INF
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uint32_t RecvBufLen; //Receive buffer length
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uint32_t RecvCurPoint; //current pointer to receive buffer
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uint32_t RecvReadPoint; //The read pointer of the receive buffer
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uint32_t RecvRemLen; //Remaining length of receive buffer
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uint32_t RecvRemLen; //The length of the remaining data in the receive buffer
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uint32_t ProtoType; //protocol type
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uint32_t SockStatus; //Low byte Socket state, the next low byte is TCP state, only meaningful in TCP mode
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uint32_t DesPort; //destination port
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@@ -199,14 +198,18 @@ struct _WCH_CFG
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/* Bit 1 TCP receive replication optimization, used for internal debugging */
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/* bit 2 delete oldest TCP connection 1: enable, 0: disable */
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/* Bits 3-7 Number of PBUFs of IP segments */
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/* Bit 8 TCP Delay ACK disable */
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uint32_t MiscConfig1; //Miscellaneous Configuration 1
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/* Bits 0-7 Number of Sockets*/
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/* Bits 8-12 Reserved */
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/* Bit 13 PING enable, 1: On 0: Off */
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/* Bit 13 PING enable, 1: On 0: Off */
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/* Bits 14-18 TCP retransmission times */
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/* Bits 19-23 TCP retransmission period, in 50 milliseconds */
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/* bit 25 send failed retry, 1: enable, 0: disable */
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/* Bits 26-31 Reserved */
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/* bit 25 send failed retry, 1: enable, 0: disable */
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/* bit 26 Select whether to perform IPv4 checksum check on
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* the TCP/UDP/ICMP header of the received frame payload by hardware,
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* and calculate and insert the checksum of the IP header and payload of the sent frame by hardware.*/
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/* Bits 27-31 period (in 250 milliseconds) of Fine DHCP periodic process */
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led_callback led_link; //PHY Link Status Indicator
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led_callback led_data; //Ethernet communication indicator
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eth_tx_set net_send; //Ethernet send
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