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update 1.8

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qiyongshuang
2023-09-06 10:08:11 +08:00
parent b79c6ac80d
commit 64be955461
760 changed files with 42517 additions and 30957 deletions
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EVT/EXAM/FLASH/FLASH_Program/.settings/language.settings.xml
-14
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@@ -1,14 +0,0 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<project>
<configuration id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1008047074" name="obj">
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="826821512584431596" id="ilg.gnumcueclipse.managedbuild.cross.riscv.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT RISC-V Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<language-scope id="org.eclipse.cdt.core.gcc"/>
<language-scope id="org.eclipse.cdt.core.g++"/>
</provider>
</extension>
</configuration>
</project>
EVT/EXAM/FLASH/FLASH_Program/User/main.c
+30 -43
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@@ -4,32 +4,35 @@
* Version : V1.0.0
* Date : 2021/06/06
* Description : Main program body.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
/*
*@Note
FLASH erase/read/write, and fast programming:
Includes Standard Erase and Program, Fast Erase and Program.
a-Erase successful part read non-0xFF:
Word reading--0xe339e339
Half-word reading--0xe339
byte read--0x39
Even address byte read--0x39
Odd address byte read--0xe3
b-When the main frequency exceeds 100MHz, attention should be paid when operating the FLASH:
When performing non-zero waiting area FLASH and zero waiting area FLASH, reading and
writing user words, and reading manufacturer configuration words and Boot area,
the following operations are required.First divide the frequency of HCLK by 2, and
resume after the FLASH operation is completed to ensure that the frequency of the
FLASH operation is lower than 100Mhz.
*/
*FLASH erase/read/write, and fast programming:
* Includes Standard Erase and Program, Fast Erase and Program.
*
*
* a-Erase successful part read non-0xFF:
* Word reading--0xe339e339
* Half-word reading--0xe339
* byte read--0x39
* Even address byte read--0x39
* Odd address byte read--0xe3
* b-When If the actual application must require the use of the system with a frequency greater than 120M,
* attention should be paid to:
* In non-zero wait area FLASH and zero wait area FLASH, user word read and write, manufacturer
* configuration word and Boot area read, you need to do the following operations. Firstly, divide
* the frequency of HCLK by 2 (the related peripheral clocks are also divided at the same time, and
* the impact needs to be evaluated). After the FLASH operation is completed, restore it to ensure
* the FLASH access clock The frequency does not exceed 60Mhz (bit[25]-SCKMOD of the FLASH_CTLR register
* can configure the FLASH access clock frequency to be the system clock or half of the system clock,
* and this bit is configured as half of the system clock by default).
*
*/
#include "debug.h"
@@ -65,13 +68,6 @@ u32 buf[64];
void Flash_Test(void)
{
printf("FLASH Test\n");
/*When the main frequency exceeds 100MHz, attention should be paid when
*operating FLASH: dividing HCLK by two will result in the related peripheral
*clock of HCLK being divided by two. Attention should be paid when using.
*/
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV2;
__disable_irq();
USART_Printf_Init(115200);
FLASH_Unlock();
@@ -86,6 +82,7 @@ void Flash_Test(void)
if(FLASHStatus != FLASH_COMPLETE)
{
printf("FLASH Erase Fail\r\n");
return;
}
printf("FLASH Erase Suc\r\n");
}
@@ -122,10 +119,6 @@ void Flash_Test(void)
FLASH_Lock();
RCC->CFGR0 &= ~(uint32_t)RCC_HPRE_DIV2;
__enable_irq();
USART_Printf_Init(115200);
}
/*********************************************************************
@@ -145,10 +138,6 @@ void Flash_Test_Fast(void)
printf("FLASH Fast Mode Test\n");
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV2;
__disable_irq();
USART_Printf_Init(115200);
FLASH_Unlock_Fast();
FLASH_EraseBlock_32K_Fast(FAST_FLASH_PROGRAM_START_ADDR);
@@ -205,10 +194,7 @@ void Flash_Test_Fast(void)
FLASH_Lock_Fast();
RCC->CFGR0 &= ~(uint32_t)RCC_HPRE_DIV2;
__enable_irq();
USART_Printf_Init(115200);
FLASH_Lock();
}
/*********************************************************************
@@ -221,10 +207,11 @@ void Flash_Test_Fast(void)
int main(void)
{
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
SystemCoreClockUpdate();
Delay_Init();
USART_Printf_Init(115200);
printf("SystemClk:%d\r\n",SystemCoreClock);
printf( "ChipID:%08x\r\n", DBGMCU_GetCHIPID() );
printf("Flash Program Test\r\n");
Flash_Test();