update 1.8
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@@ -1,14 +0,0 @@
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<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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<project>
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<configuration id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1008047074" name="obj">
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<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
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<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
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<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
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<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
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<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="824079269413154898" id="ilg.gnumcueclipse.managedbuild.cross.riscv.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT RISC-V Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
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<language-scope id="org.eclipse.cdt.core.gcc"/>
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<language-scope id="org.eclipse.cdt.core.g++"/>
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</provider>
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</extension>
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</configuration>
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</project>
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@@ -4,21 +4,21 @@
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* Version : V1.0.0
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* Date : 2021/06/06
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* Description : Main program body.
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* Attention: This software (modified or not) and binary are used for
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* microcontroller manufactured by Nanjing Qinheng Microelectronics.
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*******************************************************************************/
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* Attention: This software (modified or not) and binary are used for
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* microcontroller manufactured by Nanjing Qinheng Microelectronics.
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*******************************************************************************/
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/*
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*@Note
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when LV is not enabled in standby mode, RAM 2k and 30K low-power data holding routines:
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This routine demonstrates writing data at the specified location of 2K RAM and 30K RAM,
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and then WFI enters STANDBY sleep mode, through the PA0 (wakeup) pin Input high level
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to exit standby mode, print RAM data after waking up, and test whether RAM is maintained
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data.
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*/
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*when LV is not enabled in standby mode, RAM 2k and 30K low-power data holding routines:
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*This routine demonstrates writing data at the specified location of 2K RAM and 30K RAM,
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*and then WFI enters STANDBY sleep mode, through the PA0 (wakeup) pin Input high level
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*to exit standby mode, print RAM data after waking up, and test whether RAM is maintained
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*data.
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*
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*/
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#include "debug.h"
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@@ -116,8 +116,11 @@ int main(void)
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GPIO_Init(GPIOE, &GPIO_InitStructure);
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
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SystemCoreClockUpdate();
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Delay_Init();
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USART_Printf_Init(115200);
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printf("SystemClk:%d\r\n", SystemCoreClock);
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printf( "ChipID:%08x\r\n", DBGMCU_GetCHIPID() );
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
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