update 1.8

This commit is contained in:
qiyongshuang
2023-09-06 10:08:11 +08:00
parent b79c6ac80d
commit 64be955461
760 changed files with 42517 additions and 30957 deletions
@@ -1,14 +0,0 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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+15 -14
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@@ -4,23 +4,23 @@
* Version : V1.0.0
* Date : 2021/06/06
* Description : Main program body.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
/*
*@Note
Get system-HCLK-AHB1-AHB2 clock routine:
MCO(PA8)
This example demonstrates MCO(PA8) pin output system clock and get clock;
-RCC_GetClocksFreq() function to get systemclk-HCLK-AHB1-AHB2 clock
-SystemCoreClockUpdate() function to get HCLK clock
-Configure the HSE two-way frequency division as the PLL source in
the system_ch32v20x.c file (applicable only to CH32V20x_D8W)
*/
*Get system-HCLK-AHB1-AHB2 clock routine:
*MCO(PA8)
*This example demonstrates MCO(PA8) pin output system clock and get clock;
* -RCC_GetClocksFreq() function to get systemclk-HCLK-AHB1-AHB2 clock
* -SystemCoreClockUpdate() function to get HCLK clock
* -Configure the HSE two-way frequency division as the PLL source in
* the system_ch32v20x.c file (applicable only to CH32V20x_D8W)
*
*/
#include "debug.h"
@@ -40,6 +40,7 @@ int main(void)
USART_Printf_Init(115200);
SystemCoreClockUpdate();
printf("SystemClk:%d\r\n",SystemCoreClock);
printf( "ChipID:%08x\r\n", DBGMCU_GetCHIPID() );
RCC_GetClocksFreq(&RCC_ClocksStatus);
printf("SYSCLK_Frequency-%d\r\n", RCC_ClocksStatus.SYSCLK_Frequency);
@@ -1,14 +0,0 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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+15 -13
View File
@@ -4,22 +4,22 @@
* Version : V1.0.0
* Date : 2021/06/06
* Description : Main program body.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
/*
*@Note
HSI or HSI/2 as PLL input clock routine:
This example demonstrates that HSI or HSI/2 is used as the PLL input clock, and the
system clock uses the PLL as the clock source.
Refer to system_ch32v20x.c, system_ch32v20x.h.
HSI is used as the PLL input clock, and the demonstration system clocks are 24MHz, 48MHz, and 72MHz.
HSI/2 is used as the PLL input clock, and the demonstration system clock is 24MHz, 48MHz
*/
*HSI or HSI/2 as PLL input clock routine:
*This example demonstrates that HSI or HSI/2 is used as the PLL input clock, and the
*system clock uses the PLL as the clock source.
*Refer to system_ch32v20x.c, system_ch32v20x.h.
*HSI is used as the PLL input clock, and the demonstration system clocks are 24MHz, 48MHz, and 72MHz.
*HSI/2 is used as the PLL input clock, and the demonstration system clock is 24MHz, 48MHz
*
*/
#include "debug.h"
#define HSI 0 //HSI
@@ -37,9 +37,11 @@
*/
int main(void)
{
SystemCoreClockUpdate();
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_4);
USART_Printf_Init(115200);
printf("SystemClk:%d\r\n",SystemCoreClock);
printf( "ChipID:%08x\r\n", DBGMCU_GetCHIPID() );
while(1);
}
@@ -1,14 +0,0 @@
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+17 -16
View File
@@ -4,19 +4,19 @@
* Version : V1.0.0
* Date : 2021/06/06
* Description : Main program body.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
/*
*@Note
MCO pin clock output routine:
MCO(PA8)
This example demonstrates that the MCO(PA8) pin outputs the system clock.
*/
*MCO pin clock output routine:
*MCO(PA8)
*This example demonstrates that the MCO(PA8) pin outputs the system clock.
*
*/
#include "debug.h"
@@ -29,18 +29,19 @@
*/
int main(void)
{
GPIO_InitTypeDef GPIO_InitStructure={0};
GPIO_InitTypeDef GPIO_InitStructure={0};
SystemCoreClockUpdate();
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_4);
USART_Printf_Init(115200);
printf("SystemClk:%d\r\n",SystemCoreClock);
printf( "ChipID:%08x\r\n", DBGMCU_GetCHIPID() );
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOA, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOA, &GPIO_InitStructure);
/* MCO Output GPIOA 8 */
RCC_MCOConfig( RCC_MCO_SYSCLK );