bstanwell/ch32v20x-examples
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update 1.8

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This commit is contained in:
qiyongshuang
2023-09-06 10:08:11 +08:00
parent b79c6ac80d
commit 64be955461
760 changed files with 42517 additions and 30957 deletions
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EVT/EXAM/USART/USART_DMA/User/main.c
+17 -16
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@@ -4,24 +4,24 @@
* Version : V1.0.0
* Date : 2021/06/06
* Description : Main program body.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
/*
*@Note
USART DMA, master/slave mode transceiver routine:
Master:USART2_Tx(PA2)\USART2_Rx(PA3).
Slave:USART3_Tx(PB10)\USART3_Rx(PB11).
This example demonstrates UART2 and USART3 use DAM data to send and receive.
Hardware connection:PA2 -- PB11
PA3 -- PB10
*/
*USART DMA, master/slave mode transceiver routine:
*Master:USART2_Tx(PA2)\USART2_Rx(PA3).
*Slave:USART3_Tx(PB10)\USART3_Rx(PB11).
*
*his example demonstrates UART2 and USART3 use DAM data to send and receive.
*
* Hardware connection:PA2 -- PB11
* PA3 -- PB10
*
*/
#include "debug.h"
@@ -185,10 +185,11 @@ void DMA_INIT(void)
int main(void)
{
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
SystemCoreClockUpdate();
Delay_Init();
USART_Printf_Init(115200);
printf("SystemClk:%d\r\n", SystemCoreClock);
printf( "ChipID:%08x\r\n", DBGMCU_GetCHIPID() );
printf("USART DMA TEST\r\n");
DMA_INIT();
USARTx_CFG(); /* USART2 & USART3 INIT */