bstanwell/ch32v20x-examples
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This commit is contained in:
qiyongshuang
2024-02-26 13:22:09 +08:00
parent 0ad592325e
commit 9596a13c17
573 changed files with 36301 additions and 23003 deletions
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EVT/EXAM/BLE/BLE_UART/APP/peripheral.c
+3 -3
View File
@@ -207,9 +207,6 @@ void Peripheral_Init()
GAPRole_SetParameter(GAPROLE_MAX_CONN_INTERVAL, sizeof(uint16_t), &desired_max_interval);
}
// Set the GAP Characteristics
GGS_SetParameter(GGS_DEVICE_NAME_ATT, sizeof(attDeviceName), attDeviceName);
// Set advertising interval
{
uint16_t advInt = DEFAULT_ADVERTISING_INTERVAL;
@@ -238,6 +235,9 @@ void Peripheral_Init()
DevInfo_AddService(); // Device Information Service
ble_uart_add_service(on_bleuartServiceEvt);
// Set the GAP Characteristics
GGS_SetParameter(GGS_DEVICE_NAME_ATT, sizeof(attDeviceName), attDeviceName);
// Init Connection Item
peripheralInitConnItem(&peripheralConnList);
EVT/EXAM/BLE/BLE_UART/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/BLE_USB/APP/ch32v20x_usbotg_device.c → EVT/EXAM/BLE/BLE_USB/APP/ch32v20x_usbfs_device.c
+209 -213
View File
@@ -1,15 +1,15 @@
/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v30x_usbotg_device.c
* File Name : ch32v30x_usbfs_device.c
* Author : WCH
* Version : V1.0.0
* Date : 2021/06/06
* Description : This file provides all the USBOTG firmware functions.
* Description : This file provides all the USBFS firmware functions.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "ch32v20x_usbotg_device.h"
#include "ch32v20x_usbfs_device.h"
#include "CONFIG.h"
#include "peripheral.h"
#include "RingMem.h"
@@ -46,27 +46,27 @@ PUINT8 pEP6_RAM_Addr; //ep6_out(64)+ep6_in(64)
PUINT8 pEP7_RAM_Addr; //ep7_out(64)+ep7_in(64)
const UINT8 *pDescr;
volatile UINT8 USBHD_Dev_SetupReqCode = 0xFF; /* USB2.0 full-speed device setup package command */
volatile UINT16 USBHD_Dev_SetupReqLen = 0x00; /* USB2.0 full-speed device setup package length */
volatile UINT8 USBHD_Dev_SetupReqValueH = 0x00; /* USB2.0 full-speed device setup package value high byte */
volatile UINT8 USBHD_Dev_Config = 0x00; /* USB2.0 full-speed device configuration value */
volatile UINT8 USBHD_Dev_Address = 0x00; /* USB2.0 full-speed device address value */
volatile UINT8 USBHD_Dev_SleepStatus = 0x00; /* USB2.0 full-speed device sleep state */
volatile UINT8 USBHD_Dev_EnumStatus = 0x00; /* USB2.0 full-speed device enumeration status */
volatile UINT8 USBHD_Dev_Endp0_Tog = 0x01; /* USB2.0 Full-speed device endpoint 0 sync flag*/
volatile UINT8 USBHD_Dev_Speed = 0x01; /* USB2.0 Full-speed device speed */
volatile UINT8 USBFS_Dev_SetupReqCode = 0xFF; /* USB2.0 full-speed device setup package command */
volatile UINT16 USBFS_Dev_SetupReqLen = 0x00; /* USB2.0 full-speed device setup package length */
volatile UINT8 USBFS_Dev_SetupReqValueH = 0x00; /* USB2.0 full-speed device setup package value high byte */
volatile UINT8 USBFS_Dev_Config = 0x00; /* USB2.0 full-speed device configuration value */
volatile UINT8 USBFS_Dev_Address = 0x00; /* USB2.0 full-speed device address value */
volatile UINT8 USBFS_Dev_SleepStatus = 0x00; /* USB2.0 full-speed device sleep state */
volatile UINT8 USBFS_Dev_EnumStatus = 0x00; /* USB2.0 full-speed device enumeration status */
volatile UINT8 USBFS_Dev_Endp0_Tog = 0x01; /* USB2.0 Full-speed device endpoint 0 sync flag*/
volatile UINT8 USBFS_Dev_Speed = 0x01; /* USB2.0 Full-speed device speed */
volatile UINT16 USBHD_Endp1_Up_Flag = 0x00; /* USB2.0 full-speed device endpoint 1 data upload status: 0: free; 1: upload; */
volatile UINT8 USBHD_Endp1_Down_Flag = 0x00; /* USB2.0 full-speed device endpoint 1 Pass successful logo */
volatile UINT8 USBHD_Endp1_Down_Len = 0x00; /* USB2.0 full-speed device endpoint 1 download length */
volatile BOOL USBHD_Endp1_T_Tog = 0; /* USB2.0 full speed device endpoint 1 sends tog bit flip */
volatile BOOL USBHD_Endp1_R_Tog = 0;
volatile UINT16 USBFS_Endp1_Up_Flag = 0x00; /* USB2.0 full-speed device endpoint 1 data upload status: 0: free; 1: upload; */
volatile UINT8 USBFS_Endp1_Down_Flag = 0x00; /* USB2.0 full-speed device endpoint 1 Pass successful logo */
volatile UINT8 USBFS_Endp1_Down_Len = 0x00; /* USB2.0 full-speed device endpoint 1 download length */
volatile BOOL USBFS_Endp1_T_Tog = 0; /* USB2.0 full speed device endpoint 1 sends tog bit flip */
volatile BOOL USBFS_Endp1_R_Tog = 0;
volatile UINT16 USBHD_Endp2_Up_Flag = 0x00; /* USB2.0 full-speed device endpoint 2 Data upload status: 0: free; 1: upload; */
volatile UINT16 USBHD_Endp2_Up_LoadPtr = 0x00; /* USB2.0 full-speed device endpoint 2 Data upload loading offset */
volatile UINT8 USBHD_Endp2_Down_Flag = 0x00; /* USB2.0 full-speed device endpoint 2 download success flag */
volatile BOOL USBHD_Endp2_T_Tog = 0; /* USB2.0 full speed device endpoint 2 sends tog bit flip */
volatile BOOL USBHD_Endp2_R_Tog = 0;
volatile UINT16 USBFS_Endp2_Up_Flag = 0x00; /* USB2.0 full-speed device endpoint 2 Data upload status: 0: free; 1: upload; */
volatile UINT16 USBFS_Endp2_Up_LoadPtr = 0x00; /* USB2.0 full-speed device endpoint 2 Data upload loading offset */
volatile UINT8 USBFS_Endp2_Down_Flag = 0x00; /* USB2.0 full-speed device endpoint 2 download success flag */
volatile BOOL USBFS_Endp2_T_Tog = 0; /* USB2.0 full speed device endpoint 2 sends tog bit flip */
volatile BOOL USBFS_Endp2_R_Tog = 0;
volatile UINT32V Endp2_send_seq = 0x00;
volatile UINT8 DevConfig;
@@ -117,10 +117,10 @@ const uint8_t Return1[2] = {0x31, 0x00};
const uint8_t Return2[2] = {0xC3, 0x00};
const uint8_t Return3[2] = {0x9F, 0xEE};
void USBHD_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void USBFS_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
/*********************************************************************
* @fn USBOTG_FS_DeviceInit
* @fn USBDeviceInit
*
* @brief Initializes USB device.
*
@@ -128,78 +128,78 @@ void USBHD_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
*/
void USBDeviceInit(void)
{
USBOTG_FS->BASE_CTRL = 0x00;
USBFSD->BASE_CTRL = 0x00;
USBOTG_FS->UEP4_1_MOD = USBHD_UEP4_RX_EN | USBHD_UEP4_TX_EN | USBHD_UEP1_RX_EN | USBHD_UEP1_TX_EN;
USBOTG_FS->UEP2_3_MOD = USBHD_UEP2_RX_EN | USBHD_UEP2_TX_EN | USBHD_UEP3_RX_EN | USBHD_UEP3_TX_EN;
USBOTG_FS->UEP5_6_MOD = USBHD_UEP5_RX_EN | USBHD_UEP5_TX_EN | USBHD_UEP6_RX_EN | USBHD_UEP6_TX_EN;
USBOTG_FS->UEP7_MOD = USBHD_UEP7_RX_EN | USBHD_UEP7_TX_EN;
USBFSD->UEP4_1_MOD = USBFS_UEP4_RX_EN | USBFS_UEP4_TX_EN | USBFS_UEP1_RX_EN | USBFS_UEP1_TX_EN;
USBFSD->UEP2_3_MOD = USBFS_UEP2_RX_EN | USBFS_UEP2_TX_EN | USBFS_UEP3_RX_EN | USBFS_UEP3_TX_EN;
USBFSD->UEP5_6_MOD = USBFS_UEP5_RX_EN | USBFS_UEP5_TX_EN | USBFS_UEP6_RX_EN | USBFS_UEP6_TX_EN;
USBFSD->UEP7_MOD = USBFS_UEP7_RX_EN | USBFS_UEP7_TX_EN;
USBOTG_FS->UEP0_DMA = (UINT32)pEP0_RAM_Addr;
USBOTG_FS->UEP1_DMA = (UINT32)pEP1_RAM_Addr;
USBOTG_FS->UEP2_DMA = (UINT32)pEP2_RAM_Addr;
USBOTG_FS->UEP3_DMA = (UINT32)pEP3_RAM_Addr;
USBOTG_FS->UEP4_DMA = (UINT32)pEP4_RAM_Addr;
USBOTG_FS->UEP5_DMA = (UINT32)pEP5_RAM_Addr;
USBOTG_FS->UEP6_DMA = (UINT32)pEP6_RAM_Addr;
USBOTG_FS->UEP7_DMA = (UINT32)pEP7_RAM_Addr;
USBFSD->UEP0_DMA = (UINT32)pEP0_RAM_Addr;
USBFSD->UEP1_DMA = (UINT32)pEP1_RAM_Addr;
USBFSD->UEP2_DMA = (UINT32)pEP2_RAM_Addr;
USBFSD->UEP3_DMA = (UINT32)pEP3_RAM_Addr;
USBFSD->UEP4_DMA = (UINT32)pEP4_RAM_Addr;
USBFSD->UEP5_DMA = (UINT32)pEP5_RAM_Addr;
USBFSD->UEP6_DMA = (UINT32)pEP6_RAM_Addr;
USBFSD->UEP7_DMA = (UINT32)pEP7_RAM_Addr;
USBOTG_FS->UEP0_RX_CTRL = USBHD_UEP_R_RES_ACK;
USBOTG_FS->UEP1_RX_CTRL = USBHD_UEP_R_RES_ACK;
USBOTG_FS->UEP2_RX_CTRL = USBHD_UEP_R_RES_ACK;
USBOTG_FS->UEP3_RX_CTRL = USBHD_UEP_R_RES_ACK;
USBOTG_FS->UEP4_RX_CTRL = USBHD_UEP_R_RES_ACK;
USBOTG_FS->UEP5_RX_CTRL = USBHD_UEP_R_RES_ACK;
USBOTG_FS->UEP6_RX_CTRL = USBHD_UEP_R_RES_ACK;
USBOTG_FS->UEP7_RX_CTRL = USBHD_UEP_R_RES_ACK;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBFSD->UEP1_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBFSD->UEP2_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBFSD->UEP3_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBFSD->UEP4_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBFSD->UEP5_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBFSD->UEP6_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBFSD->UEP7_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBOTG_FS->UEP0_TX_CTRL = USBHD_UEP_T_RES_NAK;
USBOTG_FS->UEP1_TX_LEN = RepDataLoadLen;
USBOTG_FS->UEP2_TX_LEN = RepDataLoadLen;
USBOTG_FS->UEP3_TX_LEN = RepDataLoadLen;
USBOTG_FS->UEP4_TX_LEN = RepDataLoadLen;
USBOTG_FS->UEP5_TX_LEN = RepDataLoadLen;
USBOTG_FS->UEP6_TX_LEN = RepDataLoadLen;
USBOTG_FS->UEP7_TX_LEN = RepDataLoadLen;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBFSD->UEP1_TX_LEN = RepDataLoadLen;
USBFSD->UEP2_TX_LEN = RepDataLoadLen;
USBFSD->UEP3_TX_LEN = RepDataLoadLen;
USBFSD->UEP4_TX_LEN = RepDataLoadLen;
USBFSD->UEP5_TX_LEN = RepDataLoadLen;
USBFSD->UEP6_TX_LEN = RepDataLoadLen;
USBFSD->UEP7_TX_LEN = RepDataLoadLen;
USBOTG_FS->UEP1_TX_CTRL = USBHD_UEP_T_RES_ACK;
USBOTG_FS->UEP2_TX_CTRL = USBHD_UEP_T_RES_ACK | USBHD_UEP_AUTO_TOG;
USBOTG_FS->UEP3_TX_CTRL = USBHD_UEP_T_RES_ACK | USBHD_UEP_AUTO_TOG;
USBOTG_FS->UEP4_TX_CTRL = USBHD_UEP_T_RES_ACK | USBHD_UEP_AUTO_TOG;
USBOTG_FS->UEP5_TX_CTRL = USBHD_UEP_T_RES_ACK | USBHD_UEP_AUTO_TOG;
USBOTG_FS->UEP6_TX_CTRL = USBHD_UEP_T_RES_ACK | USBHD_UEP_AUTO_TOG;
USBOTG_FS->UEP7_TX_CTRL = USBHD_UEP_T_RES_ACK | USBHD_UEP_AUTO_TOG;
USBFSD->UEP1_TX_CTRL = USBFS_UEP_T_RES_ACK;
USBFSD->UEP2_TX_CTRL = USBFS_UEP_T_RES_ACK | USBFS_UEP_AUTO_TOG;
USBFSD->UEP3_TX_CTRL = USBFS_UEP_T_RES_ACK | USBFS_UEP_AUTO_TOG;
USBFSD->UEP4_TX_CTRL = USBFS_UEP_T_RES_ACK | USBFS_UEP_AUTO_TOG;
USBFSD->UEP5_TX_CTRL = USBFS_UEP_T_RES_ACK | USBFS_UEP_AUTO_TOG;
USBFSD->UEP6_TX_CTRL = USBFS_UEP_T_RES_ACK | USBFS_UEP_AUTO_TOG;
USBFSD->UEP7_TX_CTRL = USBFS_UEP_T_RES_ACK | USBFS_UEP_AUTO_TOG;
USBOTG_FS->INT_FG = 0xFF;
USBOTG_FS->INT_EN = USBHD_UIE_SUSPEND | USBHD_UIE_BUS_RST | USBHD_UIE_TRANSFER;
USBOTG_FS->DEV_ADDR = 0x00;
USBFSD->INT_FG = 0xFF;
USBFSD->INT_EN = USBFS_UIE_SUSPEND | USBFS_UIE_BUS_RST | USBFS_UIE_TRANSFER;
USBFSD->DEV_ADDR = 0x00;
USBOTG_FS->BASE_CTRL = USBHD_UC_DEV_PU_EN | USBHD_UC_INT_BUSY | USBHD_UC_DMA_EN;
USBOTG_FS->UDEV_CTRL = USBHD_UD_PD_DIS | USBHD_UD_PORT_EN;
USBFSD->BASE_CTRL = USBFS_UC_DEV_PU_EN | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
USBFSD->UDEV_CTRL = USBFS_UD_PD_DIS | USBFS_UD_PORT_EN;
}
/*********************************************************************
* @fn USBOTG_RCC_Init
* @fn USBFS_RCC_Init
*
* @brief Initializes the usbotg clock configuration.
* @brief Initializes the usbfs clock configuration.
*
* @return none
*/
void USBOTG_RCC_Init(void)
void USBFS_RCC_Init(void)
{
RCC->CFGR2 &= ~RCC_USBFS_CLK_SRC; //usbotg clock selection: 0 = systick, 1 = usb20_phy
RCC->CFGR2 &= ~RCC_USBFS_CLK_SRC; //usbfs clock selection: 0 = systick, 1 = usb20_phy
RCC_USBCLKConfig(RCC_USBCLKSource_PLLCLK_Div2);
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_OTG_FS, ENABLE);
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_USBFS, ENABLE);
}
/*********************************************************************
* @fn USBOTG_Init
* @fn USBFS_Init
*
* @brief Initializes the USBOTG full speed device.
* @brief Initializes the USBFS full speed device.
*
* @return none
*/
void USBOTG_Init(void)
void USBFS_Init(void)
{
/* Endpoint buffer initialization */
pEP0_RAM_Addr = EP0_DatabufHD;
@@ -211,37 +211,37 @@ void USBOTG_Init(void)
pEP6_RAM_Addr = EP6_DatabufHD;
pEP7_RAM_Addr = EP7_DatabufHD;
/* Enable USB clock */
USBOTG_RCC_Init();
USBFS_RCC_Init();
Delay_Us(100);
/* USB device initialization */
USBDeviceInit();
/* Enable USB interrupt */
NVIC_EnableIRQ(USBHD_IRQn);
NVIC_EnableIRQ(USBFS_IRQn);
}
/*********************************************************************
* @fn USBHD_IRQHandler
* @fn USBFS_IRQHandler
*
* @brief This function handles OTG_FS exception.
* @brief This function handles HD-FS exception.
*
* @return none
*/
void USBHD_IRQHandler(void)
void USBFS_IRQHandler(void)
{
UINT8 len, chtype;
UINT8 intflag, errflag = 0;
intflag = USBOTG_FS->INT_FG;
intflag = USBFSD->INT_FG;
if(intflag & USBHD_UIF_TRANSFER)
if(intflag & USBFS_UIF_TRANSFER)
{
switch(USBOTG_FS->INT_ST & USBHD_UIS_TOKEN_MASK)
switch(USBFSD->INT_ST & USBFS_UIS_TOKEN_MASK)
{
/* Setup package processing */
case USBHD_UIS_TOKEN_SETUP:
case USBFS_UIS_TOKEN_SETUP:
USBOTG_FS->UEP0_TX_CTRL = USBHD_UEP_T_TOG | USBHD_UEP_T_RES_NAK;
USBOTG_FS->UEP0_RX_CTRL = USBHD_UEP_R_TOG | USBHD_UEP_R_RES_ACK;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_NAK;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_ACK;
SetupReqLen = pSetupReqPakHD->wLength;
SetupReqCode = pSetupReqPakHD->bRequest;
chtype = pSetupReqPakHD->bRequestType;
@@ -380,19 +380,19 @@ void USBHD_IRQHandler(void)
switch((pSetupReqPakHD->wIndex) & 0xff)
{
case 0x82:
USBOTG_FS->UEP2_TX_CTRL = (USBOTG_FS->UEP2_TX_CTRL & ~(USBHD_UEP_T_TOG | USBHD_UEP_T_RES_MASK)) | USBHD_UEP_T_RES_NAK;
USBFSD->UEP2_TX_CTRL = (USBFSD->UEP2_TX_CTRL & ~(USBFS_UEP_T_TOG | USBFS_UEP_T_RES_MASK)) | USBFS_UEP_T_RES_NAK;
break;
case 0x02:
USBOTG_FS->UEP2_RX_CTRL = (USBOTG_FS->UEP2_RX_CTRL & ~(USBHD_UEP_R_TOG | USBHD_UEP_R_RES_MASK)) | USBHD_UEP_R_RES_ACK;
USBFSD->UEP2_RX_CTRL = (USBFSD->UEP2_RX_CTRL & ~(USBFS_UEP_R_TOG | USBFS_UEP_R_RES_MASK)) | USBFS_UEP_R_RES_ACK;
break;
case 0x81:
USBOTG_FS->UEP1_TX_CTRL = (USBOTG_FS->UEP1_TX_CTRL & ~(USBHD_UEP_T_TOG | USBHD_UEP_T_RES_MASK)) | USBHD_UEP_T_RES_NAK;
USBFSD->UEP1_TX_CTRL = (USBFSD->UEP1_TX_CTRL & ~(USBFS_UEP_T_TOG | USBFS_UEP_T_RES_MASK)) | USBFS_UEP_T_RES_NAK;
break;
case 0x01:
USBOTG_FS->UEP1_RX_CTRL = (USBOTG_FS->UEP1_RX_CTRL & ~(USBHD_UEP_R_TOG | USBHD_UEP_R_RES_MASK)) | USBHD_UEP_R_RES_ACK;
USBFSD->UEP1_RX_CTRL = (USBFSD->UEP1_RX_CTRL & ~(USBFS_UEP_R_TOG | USBFS_UEP_R_RES_MASK)) | USBFS_UEP_R_RES_ACK;
break;
default:
@@ -414,7 +414,7 @@ void USBHD_IRQHandler(void)
if(MyCfgDescrHD[7] & 0x20)
{
/* Set wake-up enable flag */
USBHD_Dev_SleepStatus = 0x01;
USBFS_Dev_SleepStatus = 0x01;
}
else
{
@@ -436,25 +436,25 @@ void USBHD_IRQHandler(void)
{
case 0x82:
/* Set endpoint 2 IN STALL */
USBOTG_FS->UEP2_TX_CTRL = (USBOTG_FS->UEP2_TX_CTRL &= ~USBHD_UEP_T_RES_MASK) | USBHD_UEP_T_RES_STALL;
USBFSD->UEP2_TX_CTRL = (USBFSD->UEP2_TX_CTRL &= ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_STALL;
//USBHS->UEP2_CTRL = ( USBHS->UEP2_CTRL & ~USBHS_EP_T_RES_MASK ) | USBHS_EP_T_RES_STALL;
break;
case 0x02:
/* Set endpoint 2 OUT Stall */
USBOTG_FS->UEP2_RX_CTRL = (USBOTG_FS->UEP2_RX_CTRL &= ~USBHD_UEP_R_RES_MASK) | USBHD_UEP_R_RES_STALL;
USBFSD->UEP2_RX_CTRL = (USBFSD->UEP2_RX_CTRL &= ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_STALL;
//USBHS->UEP2_CTRL = ( USBHS->UEP2_CTRL & ~USBHS_EP_R_RES_MASK ) | USBHS_EP_R_RES_STALL;
break;
case 0x81:
/* Set endpoint 1 IN STALL */
USBOTG_FS->UEP1_TX_CTRL = (USBOTG_FS->UEP1_TX_CTRL &= ~USBHD_UEP_T_RES_MASK) | USBHD_UEP_T_RES_STALL;
USBFSD->UEP1_TX_CTRL = (USBFSD->UEP1_TX_CTRL &= ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_STALL;
//USBHS->UEP1_CTRL = ( USBHS->UEP1_CTRL & ~USBHS_EP_T_RES_MASK ) | USBHS_EP_T_RES_STALL;
break;
case 0x01:
/* Set endpoint 1 OUT STALL */
USBOTG_FS->UEP1_RX_CTRL = (USBOTG_FS->UEP1_RX_CTRL &= ~USBHD_UEP_R_RES_MASK) | USBHD_UEP_R_RES_STALL;
USBFSD->UEP1_RX_CTRL = (USBFSD->UEP1_RX_CTRL &= ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_STALL;
//USBHS->UEP1_CTRL = ( USBHS->UEP1_CTRL & ~USBHS_EP_R_RES_MASK ) | USBHS_EP_R_RES_STALL;
break;
@@ -484,9 +484,9 @@ void USBHD_IRQHandler(void)
case USB_SET_INTERFACE:
/* Set interface */
EP0_DatabufHD[0] = 0x00;
if(USBHD_Dev_SetupReqLen > 1)
if(USBFS_Dev_SetupReqLen > 1)
{
USBHD_Dev_SetupReqLen = 1;
USBFS_Dev_SetupReqLen = 1;
}
break;
@@ -496,35 +496,35 @@ void USBHD_IRQHandler(void)
EP0_DatabufHD[1] = 0x00;
if(pMySetupReqPakHD->wIndex == 0x81)
{
if((USBOTG_FS->UEP1_TX_CTRL & USBHD_UEP_T_RES_MASK) == USBHD_UEP_T_RES_STALL)
if((USBFSD->UEP1_TX_CTRL & USBFS_UEP_T_RES_MASK) == USBFS_UEP_T_RES_STALL)
{
EP0_DatabufHD[0] = 0x01;
}
}
else if(pMySetupReqPakHD->wIndex == 0x01)
{
if((USBOTG_FS->UEP1_RX_CTRL & USBHD_UEP_R_RES_MASK) == USBHD_UEP_R_RES_STALL)
if((USBFSD->UEP1_RX_CTRL & USBFS_UEP_R_RES_MASK) == USBFS_UEP_R_RES_STALL)
{
EP0_DatabufHD[0] = 0x01;
}
}
else if(pMySetupReqPakHD->wIndex == 0x82)
{
if((USBOTG_FS->UEP2_TX_CTRL & USBHD_UEP_T_RES_MASK) == USBHD_UEP_T_RES_STALL)
if((USBFSD->UEP2_TX_CTRL & USBFS_UEP_T_RES_MASK) == USBFS_UEP_T_RES_STALL)
{
EP0_DatabufHD[0] = 0x01;
}
}
else if(pMySetupReqPakHD->wIndex == 0x02)
{
if((USBOTG_FS->UEP2_RX_CTRL & USBHD_UEP_R_RES_MASK) == USBHD_UEP_R_RES_STALL)
if((USBFSD->UEP2_RX_CTRL & USBFS_UEP_R_RES_MASK) == USBFS_UEP_R_RES_STALL)
{
EP0_DatabufHD[0] = 0x01;
}
}
if(USBHD_Dev_SetupReqLen > 2)
if(USBFS_Dev_SetupReqLen > 2)
{
USBHD_Dev_SetupReqLen = 2;
USBFS_Dev_SetupReqLen = 2;
}
break;
@@ -535,8 +535,8 @@ void USBHD_IRQHandler(void)
}
if(errflag == 0xff)
{
USBOTG_FS->UEP0_TX_CTRL = USBHD_UEP_T_TOG | USBHD_UEP_T_RES_STALL;
USBOTG_FS->UEP0_RX_CTRL = USBHD_UEP_R_TOG | USBHD_UEP_R_RES_STALL;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_STALL;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_STALL;
}
else
{
@@ -548,16 +548,16 @@ void USBHD_IRQHandler(void)
else
len = 0;
USBOTG_FS->UEP0_TX_LEN = len;
USBOTG_FS->UEP0_TX_CTRL = USBHD_UEP_T_TOG | USBHD_UEP_T_RES_ACK;
USBOTG_FS->UEP0_RX_CTRL = USBHD_UEP_R_TOG | USBHD_UEP_R_RES_ACK;
USBFSD->UEP0_TX_LEN = len;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_ACK;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_ACK;
}
break;
case USBHD_UIS_TOKEN_IN:
switch(USBOTG_FS->INT_ST & (USBHD_UIS_TOKEN_MASK | USBHD_UIS_ENDP_MASK))
case USBFS_UIS_TOKEN_IN:
switch(USBFSD->INT_ST & (USBFS_UIS_TOKEN_MASK | USBFS_UIS_ENDP_MASK))
{
case USBHD_UIS_TOKEN_IN:
case USBFS_UIS_TOKEN_IN:
switch(SetupReqCode)
{
case USB_GET_DESCRIPTOR:
@@ -565,58 +565,58 @@ void USBHD_IRQHandler(void)
memcpy(pEP0_DataBuf, pDescr, len);
SetupReqLen -= len;
pDescr += len;
USBOTG_FS->UEP0_TX_LEN = len;
USBOTG_FS->UEP0_TX_CTRL ^= USBHD_UEP_T_TOG;
USBFSD->UEP0_TX_LEN = len;
USBFSD->UEP0_TX_CTRL ^= USBFS_UEP_T_TOG;
break;
case USB_SET_ADDRESS:
USBOTG_FS->DEV_ADDR = (USBOTG_FS->DEV_ADDR & USBHD_UDA_GP_BIT) | SetupReqLen;
USBOTG_FS->UEP0_TX_CTRL = USBHD_UEP_T_RES_NAK;
USBOTG_FS->UEP0_RX_CTRL = USBHD_UEP_R_RES_ACK;
USBFSD->DEV_ADDR = (USBFSD->DEV_ADDR & USBFS_UDA_GP_BIT) | SetupReqLen;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_RES_ACK;
break;
default:
USBOTG_FS->UEP0_TX_LEN = 0;
USBOTG_FS->UEP0_TX_CTRL = USBHD_UEP_T_RES_NAK;
USBOTG_FS->UEP0_RX_CTRL = USBHD_UEP_R_RES_ACK;
USBFSD->UEP0_TX_LEN = 0;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_RES_ACK;
break;
}
break;
/* Back to NCK by default */
case USBHD_UIS_TOKEN_IN | 1:
USBOTG_FS->UEP1_TX_CTRL ^= USBHD_UEP_T_TOG;
USBOTG_FS->UEP1_TX_CTRL = (USBOTG_FS->UEP1_TX_CTRL & ~USBHD_UEP_T_RES_MASK) | USBHD_UEP_T_RES_NAK;
case USBFS_UIS_TOKEN_IN | 1:
USBFSD->UEP1_TX_CTRL ^= USBFS_UEP_T_TOG;
USBFSD->UEP1_TX_CTRL = (USBFSD->UEP1_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
break;
case USBHD_UIS_TOKEN_IN | 2:
case USBFS_UIS_TOKEN_IN | 2:
USBOTG_FS->UEP2_TX_CTRL ^= USBHD_UEP_T_TOG;
USBOTG_FS->UEP2_TX_CTRL = (USBOTG_FS->UEP2_TX_CTRL & ~USBHD_UEP_T_RES_MASK) | USBHD_UEP_T_RES_NAK;
USBFSD->UEP2_TX_CTRL ^= USBFS_UEP_T_TOG;
USBFSD->UEP2_TX_CTRL = (USBFSD->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
break;
case USBHD_UIS_TOKEN_IN | 3:
USBOTG_FS->UEP3_TX_CTRL ^= USBHD_UEP_T_TOG;
USBOTG_FS->UEP3_TX_CTRL = (USBOTG_FS->UEP3_TX_CTRL & ~USBHD_UEP_T_RES_MASK) | USBHD_UEP_T_RES_NAK;
case USBFS_UIS_TOKEN_IN | 3:
USBFSD->UEP3_TX_CTRL ^= USBFS_UEP_T_TOG;
USBFSD->UEP3_TX_CTRL = (USBFSD->UEP3_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
break;
case USBHD_UIS_TOKEN_IN | 4:
USBOTG_FS->UEP4_TX_CTRL ^= USBHD_UEP_T_TOG;
USBOTG_FS->UEP4_TX_CTRL = (USBOTG_FS->UEP4_TX_CTRL & ~USBHD_UEP_T_RES_MASK) | USBHD_UEP_T_RES_NAK;
case USBFS_UIS_TOKEN_IN | 4:
USBFSD->UEP4_TX_CTRL ^= USBFS_UEP_T_TOG;
USBFSD->UEP4_TX_CTRL = (USBFSD->UEP4_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
break;
case USBHD_UIS_TOKEN_IN | 5:
USBOTG_FS->UEP5_TX_CTRL ^= USBHD_UEP_T_TOG;
USBOTG_FS->UEP5_TX_CTRL = (USBOTG_FS->UEP5_TX_CTRL & ~USBHD_UEP_T_RES_MASK) | USBHD_UEP_T_RES_NAK;
case USBFS_UIS_TOKEN_IN | 5:
USBFSD->UEP5_TX_CTRL ^= USBFS_UEP_T_TOG;
USBFSD->UEP5_TX_CTRL = (USBFSD->UEP5_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
break;
case USBHD_UIS_TOKEN_IN | 6:
USBOTG_FS->UEP6_TX_CTRL ^= USBHD_UEP_T_TOG;
USBOTG_FS->UEP6_TX_CTRL = (USBOTG_FS->UEP6_TX_CTRL & ~USBHD_UEP_T_RES_MASK) | USBHD_UEP_T_RES_NAK;
case USBFS_UIS_TOKEN_IN | 6:
USBFSD->UEP6_TX_CTRL ^= USBFS_UEP_T_TOG;
USBFSD->UEP6_TX_CTRL = (USBFSD->UEP6_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
break;
case USBHD_UIS_TOKEN_IN | 7:
USBOTG_FS->UEP7_TX_CTRL ^= USBHD_UEP_T_TOG;
USBOTG_FS->UEP7_TX_CTRL = (USBOTG_FS->UEP7_TX_CTRL & ~USBHD_UEP_T_RES_MASK) | USBHD_UEP_T_RES_NAK;
case USBFS_UIS_TOKEN_IN | 7:
USBFSD->UEP7_TX_CTRL ^= USBFS_UEP_T_TOG;
USBFSD->UEP7_TX_CTRL = (USBFSD->UEP7_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
break;
default:
@@ -624,116 +624,112 @@ void USBHD_IRQHandler(void)
}
break;
case USBHD_UIS_TOKEN_OUT:
switch(USBOTG_FS->INT_ST & (USBHD_UIS_TOKEN_MASK | USBHD_UIS_ENDP_MASK))
case USBFS_UIS_TOKEN_OUT:
switch(USBFSD->INT_ST & (USBFS_UIS_TOKEN_MASK | USBFS_UIS_ENDP_MASK))
{
case USBHD_UIS_TOKEN_OUT:
len = USBOTG_FS->RX_LEN;
case USBFS_UIS_TOKEN_OUT:
len = USBFSD->RX_LEN;
break;
case USBHD_UIS_TOKEN_OUT | 1:
if(USBOTG_FS->INT_ST & USBHD_UIS_TOG_OK)
case USBFS_UIS_TOKEN_OUT | 1:
if(USBFSD->INT_ST & USBFS_UIS_TOG_OK)
{
USBOTG_FS->UEP1_RX_CTRL ^= USBHD_UEP_R_TOG;
len = USBOTG_FS->RX_LEN;
USBFSD->UEP1_RX_CTRL ^= USBFS_UEP_R_TOG;
len = USBFSD->RX_LEN;
DevEP1_OUT_Deal(len);
}
break;
case USBHD_UIS_TOKEN_OUT | 2:
if(USBOTG_FS->INT_ST & USBHD_UIS_TOG_OK)
case USBFS_UIS_TOKEN_OUT | 2:
if(USBFSD->INT_ST & USBFS_UIS_TOG_OK)
{
USBOTG_FS->UEP2_RX_CTRL ^= USBHD_UEP_R_TOG;
len = USBOTG_FS->RX_LEN;
USBFSD->UEP2_RX_CTRL ^= USBFS_UEP_R_TOG;
len = USBFSD->RX_LEN;
DevEP2_OUT_Deal(len);
}
break;
case USBHD_UIS_TOKEN_OUT | 3:
if(USBOTG_FS->INT_ST & USBHD_UIS_TOG_OK)
case USBFS_UIS_TOKEN_OUT | 3:
if(USBFSD->INT_ST & USBFS_UIS_TOG_OK)
{
USBOTG_FS->UEP3_RX_CTRL ^= USBHD_UEP_R_TOG;
len = USBOTG_FS->RX_LEN;
USBFSD->UEP3_RX_CTRL ^= USBFS_UEP_R_TOG;
len = USBFSD->RX_LEN;
DevEP3_OUT_Deal(len);
}
break;
case USBHD_UIS_TOKEN_OUT | 4:
if(USBOTG_FS->INT_ST & USBHD_UIS_TOG_OK)
case USBFS_UIS_TOKEN_OUT | 4:
if(USBFSD->INT_ST & USBFS_UIS_TOG_OK)
{
USBOTG_FS->UEP4_RX_CTRL ^= USBHD_UEP_R_TOG;
len = USBOTG_FS->RX_LEN;
USBFSD->UEP4_RX_CTRL ^= USBFS_UEP_R_TOG;
len = USBFSD->RX_LEN;
DevEP4_OUT_Deal(len);
}
break;
case USBHD_UIS_TOKEN_OUT | 5:
if(USBOTG_FS->INT_ST & USBHD_UIS_TOG_OK)
case USBFS_UIS_TOKEN_OUT | 5:
if(USBFSD->INT_ST & USBFS_UIS_TOG_OK)
{
USBOTG_FS->UEP5_RX_CTRL ^= USBHD_UEP_R_TOG;
len = USBOTG_FS->RX_LEN;
USBFSD->UEP5_RX_CTRL ^= USBFS_UEP_R_TOG;
len = USBFSD->RX_LEN;
DevEP5_OUT_Deal(len);
}
break;
case USBHD_UIS_TOKEN_OUT | 6:
if(USBOTG_FS->INT_ST & USBHD_UIS_TOG_OK)
case USBFS_UIS_TOKEN_OUT | 6:
if(USBFSD->INT_ST & USBFS_UIS_TOG_OK)
{
USBOTG_FS->UEP6_RX_CTRL ^= USBHD_UEP_R_TOG;
len = USBOTG_FS->RX_LEN;
USBFSD->UEP6_RX_CTRL ^= USBFS_UEP_R_TOG;
len = USBFSD->RX_LEN;
DevEP6_OUT_Deal(len);
}
break;
case USBHD_UIS_TOKEN_OUT | 7:
if(USBOTG_FS->INT_ST & USBHD_UIS_TOG_OK)
case USBFS_UIS_TOKEN_OUT | 7:
if(USBFSD->INT_ST & USBFS_UIS_TOG_OK)
{
USBOTG_FS->UEP7_RX_CTRL ^= USBHD_UEP_R_TOG;
len = USBOTG_FS->RX_LEN;
USBFSD->UEP7_RX_CTRL ^= USBFS_UEP_R_TOG;
len = USBFSD->RX_LEN;
DevEP7_OUT_Deal(len);
}
break;
}
break;
case USBHD_UIS_TOKEN_SOF:
break;
default:
break;
}
USBOTG_FS->INT_FG = USBHD_UIF_TRANSFER;
USBFSD->INT_FG = USBFS_UIF_TRANSFER;
}
else if(intflag & USBHD_UIF_BUS_RST)
else if(intflag & USBFS_UIF_BUS_RST)
{
USBOTG_FS->DEV_ADDR = 0;
USBFSD->DEV_ADDR = 0;
USBOTG_FS->UEP0_RX_CTRL = USBHD_UEP_R_RES_ACK;
USBOTG_FS->UEP1_RX_CTRL = USBHD_UEP_R_RES_ACK;
USBOTG_FS->UEP2_RX_CTRL = USBHD_UEP_R_RES_ACK;
USBOTG_FS->UEP3_RX_CTRL = USBHD_UEP_R_RES_ACK;
USBOTG_FS->UEP4_RX_CTRL = USBHD_UEP_R_RES_ACK;
USBOTG_FS->UEP5_RX_CTRL = USBHD_UEP_R_RES_ACK;
USBOTG_FS->UEP6_RX_CTRL = USBHD_UEP_R_RES_ACK;
USBOTG_FS->UEP7_RX_CTRL = USBHD_UEP_R_RES_ACK;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBFSD->UEP1_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBFSD->UEP2_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBFSD->UEP3_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBFSD->UEP4_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBFSD->UEP5_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBFSD->UEP6_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBFSD->UEP7_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBOTG_FS->UEP0_TX_CTRL = USBHD_UEP_T_RES_NAK;
USBOTG_FS->UEP1_TX_CTRL = USBHD_UEP_T_RES_NAK;
USBOTG_FS->UEP2_TX_CTRL = USBHD_UEP_T_RES_NAK;
USBOTG_FS->UEP3_TX_CTRL = USBHD_UEP_T_RES_NAK;
USBOTG_FS->UEP4_TX_CTRL = USBHD_UEP_T_RES_NAK;
USBOTG_FS->UEP5_TX_CTRL = USBHD_UEP_T_RES_NAK;
USBOTG_FS->UEP6_TX_CTRL = USBHD_UEP_T_RES_NAK;
USBOTG_FS->UEP7_TX_CTRL = USBHD_UEP_T_RES_NAK;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBFSD->UEP1_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBFSD->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBFSD->UEP3_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBFSD->UEP4_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBFSD->UEP5_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBFSD->UEP6_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBFSD->UEP7_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBOTG_FS->INT_FG |= USBHD_UIF_BUS_RST;
USBFSD->INT_FG |= USBFS_UIF_BUS_RST;
}
else if(intflag & USBHD_UIF_SUSPEND)
else if(intflag & USBFS_UIF_SUSPEND)
{
if(USBOTG_FS->MIS_ST & USBHD_UMS_SUSPEND)
if(USBFSD->MIS_ST & USBFS_UMS_SUSPEND)
{
;
}
@@ -741,11 +737,11 @@ void USBHD_IRQHandler(void)
{
;
}
USBOTG_FS->INT_FG = USBHD_UIF_SUSPEND;
USBFSD->INT_FG = USBFS_UIF_SUSPEND;
}
else
{
USBOTG_FS->INT_FG = intflag;
USBFSD->INT_FG = intflag;
}
}
@@ -758,7 +754,7 @@ void USBHD_IRQHandler(void)
*/
uint8_t USBSendData(void)
{
if(USBOTG_FS->UEP2_TX_CTRL & USBHD_UEP_T_RES_MASK == USBHD_UEP_T_RES_ACK)
if(USBFSD->UEP2_TX_CTRL & USBFS_UEP_T_RES_MASK == USBFS_UEP_T_RES_ACK)
{
return FAILURE;
}
@@ -787,8 +783,8 @@ uint8_t USBSendData(void)
*/
void DevEP1_IN_Deal(UINT8 l)
{
USBOTG_FS->UEP1_TX_LEN = l;
USBOTG_FS->UEP1_TX_CTRL = (USBOTG_FS->UEP1_TX_CTRL & ~USBHD_UEP_T_RES_MASK) | USBHD_UEP_T_RES_ACK;
USBFSD->UEP1_TX_LEN = l;
USBFSD->UEP1_TX_CTRL = (USBFSD->UEP1_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_ACK;
}
/*********************************************************************
@@ -802,8 +798,8 @@ void DevEP1_IN_Deal(UINT8 l)
*/
void DevEP2_IN_Deal(UINT8 l)
{
USBOTG_FS->UEP2_TX_LEN = l;
USBOTG_FS->UEP2_TX_CTRL = (USBOTG_FS->UEP2_TX_CTRL & ~USBHD_UEP_T_RES_MASK) | USBHD_UEP_T_RES_ACK;
USBFSD->UEP2_TX_LEN = l;
USBFSD->UEP2_TX_CTRL = (USBFSD->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_ACK;
}
/*********************************************************************
@@ -817,8 +813,8 @@ void DevEP2_IN_Deal(UINT8 l)
*/
void DevEP3_IN_Deal(UINT8 l)
{
USBOTG_FS->UEP3_TX_LEN = l;
USBOTG_FS->UEP3_TX_CTRL = (USBOTG_FS->UEP3_TX_CTRL & ~USBHD_UEP_T_RES_MASK) | USBHD_UEP_T_RES_ACK;
USBFSD->UEP3_TX_LEN = l;
USBFSD->UEP3_TX_CTRL = (USBFSD->UEP3_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_ACK;
}
/*********************************************************************
@@ -832,8 +828,8 @@ void DevEP3_IN_Deal(UINT8 l)
*/
void DevEP4_IN_Deal(UINT8 l)
{
USBOTG_FS->UEP4_TX_LEN = l;
USBOTG_FS->UEP4_TX_CTRL = (USBOTG_FS->UEP4_TX_CTRL & ~USBHD_UEP_T_RES_MASK) | USBHD_UEP_T_RES_ACK;
USBFSD->UEP4_TX_LEN = l;
USBFSD->UEP4_TX_CTRL = (USBFSD->UEP4_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_ACK;
}
/*********************************************************************
@@ -847,8 +843,8 @@ void DevEP4_IN_Deal(UINT8 l)
*/
void DevEP5_IN_Deal(UINT8 l)
{
USBOTG_FS->UEP5_TX_LEN = l;
USBOTG_FS->UEP5_TX_CTRL = (USBOTG_FS->UEP5_TX_CTRL & ~USBHD_UEP_T_RES_MASK) | USBHD_UEP_T_RES_ACK;
USBFSD->UEP5_TX_LEN = l;
USBFSD->UEP5_TX_CTRL = (USBFSD->UEP5_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_ACK;
}
/*********************************************************************
@@ -862,8 +858,8 @@ void DevEP5_IN_Deal(UINT8 l)
*/
void DevEP6_IN_Deal(UINT8 l)
{
USBOTG_FS->UEP6_TX_LEN = l;
USBOTG_FS->UEP6_TX_CTRL = (USBOTG_FS->UEP6_TX_CTRL & ~USBHD_UEP_T_RES_MASK) | USBHD_UEP_T_RES_ACK;
USBFSD->UEP6_TX_LEN = l;
USBFSD->UEP6_TX_CTRL = (USBFSD->UEP6_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_ACK;
}
/*********************************************************************
@@ -877,8 +873,8 @@ void DevEP6_IN_Deal(UINT8 l)
*/
void DevEP7_IN_Deal(UINT8 l)
{
USBOTG_FS->UEP7_TX_LEN = l;
USBOTG_FS->UEP7_TX_CTRL = (USBOTG_FS->UEP7_TX_CTRL & ~USBHD_UEP_T_RES_MASK) | USBHD_UEP_T_RES_ACK;
USBFSD->UEP7_TX_LEN = l;
USBFSD->UEP7_TX_CTRL = (USBFSD->UEP7_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_ACK;
}
/*********************************************************************
EVT/EXAM/BLE/BLE_USB/APP/include/ch32v20x_usbotg_device.h → EVT/EXAM/BLE/BLE_USB/APP/include/ch32v20x_usbfs_device.h
+189 -189
View File
@@ -1,17 +1,17 @@
/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v20x_usbotg_device.h
* File Name : ch32v20x_usbfs_device.h
* Author : WCH
* Version : V1.0.0
* Date : 2021/06/06
* Description : This file contains all the functions prototypes for the
* USBOTG firmware library.
* USBFS firmware library.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH32V20X_USBOTG_DEVICE_H_
#define __CH32V20X_USBOTG_DEVICE_H_
#ifndef __CH32V20X_USBFS_DEVICE_H_
#define __CH32V20X_USBFS_DEVICE_H_
#include "debug.h"
#include "string.h"
@@ -390,19 +390,19 @@ typedef struct __PACKED _UDISK_BOC_CSW {/* status of BulkOnly USB-FlashDisk */
/* 控制性宏定义 */
#define USE_SYS_CLK 0
//#define USBHD_HOST 0
//#define USBFS_HOST 0
//#define USB_OTG 0
/******************************************************************************/
/* USBOTG_FS DEVICE USB_CONTROL */
/* USBFS DEVICE USB_CONTROL */
/* BASE USB_CTRL */
#define USBHD_BASE_CTRL (USBOTG_FS->BASE_CTRL) // USB base control
#define USBHD_UC_HOST_MODE 0x80 // enable USB host mode: 0=device mode, 1=host mode
#define USBHD_UC_LOW_SPEED 0x40 // enable USB low speed: 0=12Mbps, 1=1.5Mbps
#define USBHD_UC_DEV_PU_EN 0x20 // USB device enable and internal pullup resistance enable
#define USBHD_UC_SYS_CTRL1 0x20 // USB system control high bit
#define USBHD_UC_SYS_CTRL0 0x10 // USB system control low bit
#define USBHD_UC_SYS_CTRL_MASK 0x30 // bit mask of USB system control
#define USBFS_BASE_CTRL (USBFSD_FS->BASE_CTRL) // USB base control
#define USBFS_UC_HOST_MODE 0x80 // enable USB host mode: 0=device mode, 1=host mode
#define USBFS_UC_LOW_SPEED 0x40 // enable USB low speed: 0=12Mbps, 1=1.5Mbps
#define USBFS_UC_DEV_PU_EN 0x20 // USB device enable and internal pullup resistance enable
#define USBFS_UC_SYS_CTRL1 0x20 // USB system control high bit
#define USBFS_UC_SYS_CTRL0 0x10 // USB system control low bit
#define USBFS_UC_SYS_CTRL_MASK 0x30 // bit mask of USB system control
// UC_HOST_MODE & UC_SYS_CTRL1 & UC_SYS_CTRL0: USB system control
// 0 00: disable USB device and disable internal pullup resistance
// 0 01: enable USB device and disable internal pullup resistance, need external pullup resistance
@@ -411,79 +411,79 @@ typedef struct __PACKED _UDISK_BOC_CSW {/* status of BulkOnly USB-FlashDisk */
// 1 01: enable USB host and force UDP/UDM output SE0 state
// 1 10: enable USB host and force UDP/UDM output J state
// 1 11: enable USB host and force UDP/UDM output resume or K state
#define USBHD_UC_INT_BUSY 0x08 // enable automatic responding busy for device mode or automatic pause for host mode during interrupt flag UIF_TRANSFER valid
#define USBHD_UC_RESET_SIE 0x04 // force reset USB SIE, need software clear
#define USBHD_UC_CLR_ALL 0x02 // force clear FIFO and count of USB
#define USBHD_UC_DMA_EN 0x01 // DMA enable and DMA interrupt enable for USB
#define USBFS_UC_INT_BUSY 0x08 // enable automatic responding busy for device mode or automatic pause for host mode during interrupt flag UIF_TRANSFER valid
#define USBFS_UC_RESET_SIE 0x04 // force reset USB SIE, need software clear
#define USBFS_UC_CLR_ALL 0x02 // force clear FIFO and count of USB
#define USBFS_UC_DMA_EN 0x01 // DMA enable and DMA interrupt enable for USB
/* DEVICE USB_CTRL */
#define USBHD_UDEV_CTRL (USBOTG_FS->UDEV_CTRL) // USB device physical prot control
#define USBHD_UD_PD_DIS 0x80 // disable USB UDP/UDM pulldown resistance: 0=enable pulldown, 1=disable
#define USBHD_UD_DP_PIN 0x20 // ReadOnly: indicate current UDP pin level
#define USBHD_UD_DM_PIN 0x10 // ReadOnly: indicate current UDM pin level
#define USBHD_UD_LOW_SPEED 0x04 // enable USB physical port low speed: 0=full speed, 1=low speed
#define USBHD_UD_GP_BIT 0x02 // general purpose bit
#define USBHD_UD_PORT_EN 0x01 // enable USB physical port I/O: 0=disable, 1=enable
#define USBFS_UDEV_CTRL (USBFSD_FS->UDEV_CTRL) // USB device physical prot control
#define USBFS_UD_PD_DIS 0x80 // disable USB UDP/UDM pulldown resistance: 0=enable pulldown, 1=disable
#define USBFS_UD_DP_PIN 0x20 // ReadOnly: indicate current UDP pin level
#define USBFS_UD_DM_PIN 0x10 // ReadOnly: indicate current UDM pin level
#define USBFS_UD_LOW_SPEED 0x04 // enable USB physical port low speed: 0=full speed, 1=low speed
#define USBFS_UD_GP_BIT 0x02 // general purpose bit
#define USBFS_UD_PORT_EN 0x01 // enable USB physical port I/O: 0=disable, 1=enable
/* USB INT EN */
#define USBHD_INT_EN (USBOTG_FS->INT_EN) // USB interrupt enable
#define USBHD_UIE_DEV_SOF 0x80 // enable interrupt for SOF received for USB device mode
#define USBHD_UIE_DEV_NAK 0x40 // enable interrupt for NAK responded for USB device mode
#define USBHD_UIE_FIFO_OV 0x10 // enable interrupt for FIFO overflow
#define USBHD_UIE_HST_SOF 0x08 // enable interrupt for host SOF timer action for USB host mode
#define USBHD_UIE_SUSPEND 0x04 // enable interrupt for USB suspend or resume event
#define USBHD_UIE_TRANSFER 0x02 // enable interrupt for USB transfer completion
#define USBHD_UIE_DETECT 0x01 // enable interrupt for USB device detected event for USB host mode
#define USBHD_UIE_BUS_RST 0x01 // enable interrupt for USB bus reset event for USB device mode
#define USBFS_INT_EN (USBFSD_FS->INT_EN) // USB interrupt enable
#define USBFS_UIE_DEV_SOF 0x80 // enable interrupt for SOF received for USB device mode
#define USBFS_UIE_DEV_NAK 0x40 // enable interrupt for NAK responded for USB device mode
#define USBFS_UIE_FIFO_OV 0x10 // enable interrupt for FIFO overflow
#define USBFS_UIE_HST_SOF 0x08 // enable interrupt for host SOF timer action for USB host mode
#define USBFS_UIE_SUSPEND 0x04 // enable interrupt for USB suspend or resume event
#define USBFS_UIE_TRANSFER 0x02 // enable interrupt for USB transfer completion
#define USBFS_UIE_DETECT 0x01 // enable interrupt for USB device detected event for USB host mode
#define USBFS_UIE_BUS_RST 0x01 // enable interrupt for USB bus reset event for USB device mode
/* USB_DEV_ADDR */
#define USBHD_DEV_ADDR (USBOTG_FS->DEV_ADDR) // USB device address
#define USBHD_UDA_GP_BIT 0x80 // general purpose bit
#define USBHD_USB_ADDR_MASK 0x7F // bit mask for USB device address
/* USBOTG_FS DEVICE USB_STATUS */
#define USBFS_DEV_ADDR (USBFSD_FS->DEV_ADDR) // USB device address
#define USBFS_UDA_GP_BIT 0x80 // general purpose bit
#define USBFS_USB_ADDR_MASK 0x7F // bit mask for USB device address
/* USBFSD_FS DEVICE USB_STATUS */
/* USB_MIS_ST */
#define USBHD_MIS_ST (USBOTG_FS->MIS_ST) // USB miscellaneous status
#define USBHD_UMS_SOF_PRES 0x80 // RO, indicate host SOF timer presage status
#define USBHD_UMS_SOF_ACT 0x40 // RO, indicate host SOF timer action status for USB host
#define USBHD_UMS_SIE_FREE 0x20 // RO, indicate USB SIE free status
#define USBHD_UMS_R_FIFO_RDY 0x10 // RO, indicate USB receiving FIFO ready status (not empty)
#define USBHD_UMS_BUS_RESET 0x08 // RO, indicate USB bus reset status
#define USBHD_UMS_SUSPEND 0x04 // RO, indicate USB suspend status
#define USBHD_UMS_DM_LEVEL 0x02 // RO, indicate UDM level saved at device attached to USB host
#define USBHD_UMS_DEV_ATTACH 0x01 // RO, indicate device attached status on USB host
#define USBFS_MIS_ST (USBFSD_FS->MIS_ST) // USB miscellaneous status
#define USBFS_UMS_SOF_PRES 0x80 // RO, indicate host SOF timer presage status
#define USBFS_UMS_SOF_ACT 0x40 // RO, indicate host SOF timer action status for USB host
#define USBFS_UMS_SIE_FREE 0x20 // RO, indicate USB SIE free status
#define USBFS_UMS_R_FIFO_RDY 0x10 // RO, indicate USB receiving FIFO ready status (not empty)
#define USBFS_UMS_BUS_RESET 0x08 // RO, indicate USB bus reset status
#define USBFS_UMS_SUSPEND 0x04 // RO, indicate USB suspend status
#define USBFS_UMS_DM_LEVEL 0x02 // RO, indicate UDM level saved at device attached to USB host
#define USBFS_UMS_DEV_ATTACH 0x01 // RO, indicate device attached status on USB host
/* USB_INT_FG */
#define USBHD_INT_FG (USBOTG_FS->INT_FG) // USB interrupt flag
#define USBHD_U_IS_NAK 0x80 // RO, indicate current USB transfer is NAK received
#define USBHD_U_TOG_OK 0x40 // RO, indicate current USB transfer toggle is OK
#define USBHD_U_SIE_FREE 0x20 // RO, indicate USB SIE free status
#define USBHD_UIF_FIFO_OV 0x10 // FIFO overflow interrupt flag for USB, direct bit address clear or write 1 to clear
#define USBHD_UIF_HST_SOF 0x08 // host SOF timer interrupt flag for USB host, direct bit address clear or write 1 to clear
#define USBHD_UIF_SUSPEND 0x04 // USB suspend or resume event interrupt flag, direct bit address clear or write 1 to clear
#define USBHD_UIF_TRANSFER 0x02 // USB transfer completion interrupt flag, direct bit address clear or write 1 to clear
#define USBHD_UIF_DETECT 0x01 // device detected event interrupt flag for USB host mode, direct bit address clear or write 1 to clear
#define USBHD_UIF_BUS_RST 0x01 // bus reset event interrupt flag for USB device mode, direct bit address clear or write 1 to clear
#define USBFS_INT_FG (USBFSD_FS->INT_FG) // USB interrupt flag
#define USBFS_U_IS_NAK 0x80 // RO, indicate current USB transfer is NAK received
#define USBFS_U_TOG_OK 0x40 // RO, indicate current USB transfer toggle is OK
#define USBFS_U_SIE_FREE 0x20 // RO, indicate USB SIE free status
#define USBFS_UIF_FIFO_OV 0x10 // FIFO overflow interrupt flag for USB, direct bit address clear or write 1 to clear
#define USBFS_UIF_HST_SOF 0x08 // host SOF timer interrupt flag for USB host, direct bit address clear or write 1 to clear
#define USBFS_UIF_SUSPEND 0x04 // USB suspend or resume event interrupt flag, direct bit address clear or write 1 to clear
#define USBFS_UIF_TRANSFER 0x02 // USB transfer completion interrupt flag, direct bit address clear or write 1 to clear
#define USBFS_UIF_DETECT 0x01 // device detected event interrupt flag for USB host mode, direct bit address clear or write 1 to clear
#define USBFS_UIF_BUS_RST 0x01 // bus reset event interrupt flag for USB device mode, direct bit address clear or write 1 to clear
/* USB_INT_ST */
#define USBHD_INT_ST (USBOTG_FS->INT_ST) // USB interrupt flag
#define USBHD_UIS_IS_SETUP 0x80 // RO, indicate current USB transfer is setup received for USB device mode
#define USBHD_UIS_IS_NAK 0x80 // RO, indicate current USB transfer is NAK received for USB device mode
#define USBHD_UIS_TOG_OK 0x40 // RO, indicate current USB transfer toggle is OK
#define USBHD_UIS_TOKEN1 0x20 // RO, current token PID code bit 1 received for USB device mode
#define USBHD_UIS_TOKEN0 0x10 // RO, current token PID code bit 0 received for USB device mode
#define USBHD_UIS_TOKEN_MASK 0x30 // RO, bit mask of current token PID code received for USB device mode
#define USBHD_UIS_TOKEN_OUT 0x00
#define USBHD_UIS_TOKEN_SOF 0x10
#define USBHD_UIS_TOKEN_IN 0x20
#define USBHD_UIS_TOKEN_SETUP 0x30
#define USBFS_INT_ST (USBFSD_FS->INT_ST) // USB interrupt flag
#define USBFS_UIS_IS_SETUP 0x80 // RO, indicate current USB transfer is setup received for USB device mode
#define USBFS_UIS_IS_NAK 0x80 // RO, indicate current USB transfer is NAK received for USB device mode
#define USBFS_UIS_TOG_OK 0x40 // RO, indicate current USB transfer toggle is OK
#define USBFS_UIS_TOKEN1 0x20 // RO, current token PID code bit 1 received for USB device mode
#define USBFS_UIS_TOKEN0 0x10 // RO, current token PID code bit 0 received for USB device mode
#define USBFS_UIS_TOKEN_MASK 0x30 // RO, bit mask of current token PID code received for USB device mode
#define USBFS_UIS_TOKEN_OUT 0x00
#define USBFS_UIS_TOKEN_SOF 0x10
#define USBFS_UIS_TOKEN_IN 0x20
#define USBFS_UIS_TOKEN_SETUP 0x30
// UIS_TOKEN1 & UIS_TOKEN0: current token PID code received for USB device mode
// 00: OUT token PID received
// 01: SOF token PID received
// 10: IN token PID received
// 11: SETUP token PID received
#define USBHD_UIS_ENDP_MASK 0x0F // RO, bit mask of current transfer endpoint number for USB device mode
#define USBFS_UIS_ENDP_MASK 0x0F // RO, bit mask of current transfer endpoint number for USB device mode
/* USB_RX_LEN */
#define USBHD_RX_LEN (USBOTG_FS->Rx_Len) // USB receiving length
#define USBFS_RX_LEN (USBFSD_FS->Rx_Len) // USB receiving length
/* USB_BUF_MOD */
#define USBHD_UEP4_1_MOD (USBOTG_FS->UEP4_1_MOD) // endpoint 4/1 mode
#define USBHD_UEP1_RX_EN 0x80 // enable USB endpoint 1 receiving (OUT)
#define USBHD_UEP1_TX_EN 0x40 // enable USB endpoint 1 transmittal (IN)
#define USBHD_UEP1_BUF_MOD 0x10 // buffer mode of USB endpoint 1
#define USBFS_UEP4_1_MOD (USBFSD_FS->UEP4_1_MOD) // endpoint 4/1 mode
#define USBFS_UEP1_RX_EN 0x80 // enable USB endpoint 1 receiving (OUT)
#define USBFS_UEP1_TX_EN 0x40 // enable USB endpoint 1 transmittal (IN)
#define USBFS_UEP1_BUF_MOD 0x10 // buffer mode of USB endpoint 1
// UEPn_RX_EN & UEPn_TX_EN & UEPn_BUF_MOD: USB endpoint 1/2/3 buffer mode, buffer start address is UEPn_DMA
// 0 0 x: disable endpoint and disable buffer
// 1 0 0: 64 bytes buffer for receiving (OUT endpoint)
@@ -492,8 +492,8 @@ typedef struct __PACKED _UDISK_BOC_CSW {/* status of BulkOnly USB-FlashDisk */
// 0 1 1: dual 64 bytes buffer by toggle bit bUEP_T_TOG selection for transmittal (IN endpoint), total=128bytes
// 1 1 0: 64 bytes buffer for receiving (OUT endpoint) + 64 bytes buffer for transmittal (IN endpoint), total=128bytes
// 1 1 1: dual 64 bytes buffer by bUEP_R_TOG selection for receiving (OUT endpoint) + dual 64 bytes buffer by bUEP_T_TOG selection for transmittal (IN endpoint), total=256bytes
#define USBHD_UEP4_RX_EN 0x08 // enable USB endpoint 4 receiving (OUT)
#define USBHD_UEP4_TX_EN 0x04 // enable USB endpoint 4 transmittal (IN)
#define USBFS_UEP4_RX_EN 0x08 // enable USB endpoint 4 receiving (OUT)
#define USBFS_UEP4_TX_EN 0x04 // enable USB endpoint 4 transmittal (IN)
// UEP4_RX_EN & UEP4_TX_EN: USB endpoint 4 buffer mode, buffer start address is UEP0_DMA
// 0 0: single 64 bytes buffer for endpoint 0 receiving & transmittal (OUT & IN endpoint)
// 1 0: single 64 bytes buffer for endpoint 0 receiving & transmittal (OUT & IN endpoint) + 64 bytes buffer for endpoint 4 receiving (OUT endpoint), total=128bytes
@@ -501,152 +501,152 @@ typedef struct __PACKED _UDISK_BOC_CSW {/* status of BulkOnly USB-FlashDisk */
// 1 1: single 64 bytes buffer for endpoint 0 receiving & transmittal (OUT & IN endpoint)
// + 64 bytes buffer for endpoint 4 receiving (OUT endpoint) + 64 bytes buffer for endpoint 4 transmittal (IN endpoint), total=192bytes
#define USBHD_UEP2_3_MOD (USBOTG_FS->UEP2_3_MOD) // endpoint 2/3 mode
#define USBHD_UEP3_RX_EN 0x80 // enable USB endpoint 3 receiving (OUT)
#define USBHD_UEP3_TX_EN 0x40 // enable USB endpoint 3 transmittal (IN)
#define USBHD_UEP3_BUF_MOD 0x10 // buffer mode of USB endpoint 3
#define USBHD_UEP2_RX_EN 0x08 // enable USB endpoint 2 receiving (OUT)
#define USBHD_UEP2_TX_EN 0x04 // enable USB endpoint 2 transmittal (IN)
#define USBHD_UEP2_BUF_MOD 0x01 // buffer mode of USB endpoint 2
#define USBFS_UEP2_3_MOD (USBFSD_FS->UEP2_3_MOD) // endpoint 2/3 mode
#define USBFS_UEP3_RX_EN 0x80 // enable USB endpoint 3 receiving (OUT)
#define USBFS_UEP3_TX_EN 0x40 // enable USB endpoint 3 transmittal (IN)
#define USBFS_UEP3_BUF_MOD 0x10 // buffer mode of USB endpoint 3
#define USBFS_UEP2_RX_EN 0x08 // enable USB endpoint 2 receiving (OUT)
#define USBFS_UEP2_TX_EN 0x04 // enable USB endpoint 2 transmittal (IN)
#define USBFS_UEP2_BUF_MOD 0x01 // buffer mode of USB endpoint 2
#define USBHD_UEP5_6_MOD (USBOTG_FS->UEP5_6_MOD) // endpoint 5/6 mode
#define USBHD_UEP6_RX_EN 0x80 // enable USB endpoint 6 receiving (OUT)
#define USBHD_UEP6_TX_EN 0x40 // enable USB endpoint 6 transmittal (IN)
#define USBHD_UEP6_BUF_MOD 0x10 // buffer mode of USB endpoint 6
#define USBHD_UEP5_RX_EN 0x08 // enable USB endpoint 5 receiving (OUT)
#define USBHD_UEP5_TX_EN 0x04 // enable USB endpoint 5 transmittal (IN)
#define USBHD_UEP5_BUF_MOD 0x01 // buffer mode of USB endpoint 5
#define USBFS_UEP5_6_MOD (USBFSD_FS->UEP5_6_MOD) // endpoint 5/6 mode
#define USBFS_UEP6_RX_EN 0x80 // enable USB endpoint 6 receiving (OUT)
#define USBFS_UEP6_TX_EN 0x40 // enable USB endpoint 6 transmittal (IN)
#define USBFS_UEP6_BUF_MOD 0x10 // buffer mode of USB endpoint 6
#define USBFS_UEP5_RX_EN 0x08 // enable USB endpoint 5 receiving (OUT)
#define USBFS_UEP5_TX_EN 0x04 // enable USB endpoint 5 transmittal (IN)
#define USBFS_UEP5_BUF_MOD 0x01 // buffer mode of USB endpoint 5
#define USBHD_UEP7_MOD (USBOTG_FS->UEP7_MOD) // endpoint 7 mode
#define USBHD_UEP7_RX_EN 0x08 // enable USB endpoint 7 receiving (OUT)
#define USBHD_UEP7_TX_EN 0x04 // enable USB endpoint 7 transmittal (IN)
#define USBHD_UEP7_BUF_MOD 0x01 // buffer mode of USB endpoint 7
#define USBFS_UEP7_MOD (USBFSD_FS->UEP7_MOD) // endpoint 7 mode
#define USBFS_UEP7_RX_EN 0x08 // enable USB endpoint 7 receiving (OUT)
#define USBFS_UEP7_TX_EN 0x04 // enable USB endpoint 7 transmittal (IN)
#define USBFS_UEP7_BUF_MOD 0x01 // buffer mode of USB endpoint 7
/* USB_DMA */
#define USBHD_UEP0_DMA (USBOTG_FS->UEP0_DMA) // endpoint 0 DMA buffer address
#define USBHD_UEP1_DMA (USBOTG_FS->UEP1_DMA) // endpoint 1 DMA buffer address
#define USBHD_UEP2_DMA (USBOTG_FS->UEP2_DMA) // endpoint 2 DMA buffer address
#define USBHD_UEP3_DMA (USBOTG_FS->UEP3_DMA) // endpoint 3 DMA buffer address
#define USBHD_UEP4_DMA (USBOTG_FS->UEP4_DMA) // endpoint 4 DMA buffer address
#define USBHD_UEP5_DMA (USBOTG_FS->UEP5_DMA) // endpoint 5 DMA buffer address
#define USBHD_UEP6_DMA (USBOTG_FS->UEP6_DMA) // endpoint 6 DMA buffer address
#define USBHD_UEP7_DMA (USBOTG_FS->UEP7_DMA) // endpoint 7 DMA buffer address
#define USBFS_UEP0_DMA (USBFSD_FS->UEP0_DMA) // endpoint 0 DMA buffer address
#define USBFS_UEP1_DMA (USBFSD_FS->UEP1_DMA) // endpoint 1 DMA buffer address
#define USBFS_UEP2_DMA (USBFSD_FS->UEP2_DMA) // endpoint 2 DMA buffer address
#define USBFS_UEP3_DMA (USBFSD_FS->UEP3_DMA) // endpoint 3 DMA buffer address
#define USBFS_UEP4_DMA (USBFSD_FS->UEP4_DMA) // endpoint 4 DMA buffer address
#define USBFS_UEP5_DMA (USBFSD_FS->UEP5_DMA) // endpoint 5 DMA buffer address
#define USBFS_UEP6_DMA (USBFSD_FS->UEP6_DMA) // endpoint 6 DMA buffer address
#define USBFS_UEP7_DMA (USBFSD_FS->UEP7_DMA) // endpoint 7 DMA buffer address
/* USB_EP_CTRL */
#define USBHD_UEP0_T_LEN (USBOTG_FS->UEP0_TX_LEN) // endpoint 0 transmittal length
#define USBHD_UEP0_TX_CTRL (USBOTG_FS->UEP0_TX_CTRL) // endpoint 0 control
#define USBHD_UEP0_RX_CTRL (USBOTG_FS->UEP0_RX_CTRL) // endpoint 0 control
#define USBFS_UEP0_T_LEN (USBFSD_FS->UEP0_TX_LEN) // endpoint 0 transmittal length
#define USBFS_UEP0_TX_CTRL (USBFSD_FS->UEP0_TX_CTRL) // endpoint 0 control
#define USBFS_UEP0_RX_CTRL (USBFSD_FS->UEP0_RX_CTRL) // endpoint 0 control
#define USBHD_UEP1_T_LEN (USBOTG_FS->UEP1_TX_LEN) // endpoint 1 transmittal length
#define USBHD_UEP1_TX_CTRL (USBOTG_FS->UEP1_TX_CTRL) // endpoint 1 control
#define USBHD_UEP1_RX_CTRL (USBOTG_FS->UEP1_RX_CTRL) // endpoint 1 control
#define USBFS_UEP1_T_LEN (USBFSD_FS->UEP1_TX_LEN) // endpoint 1 transmittal length
#define USBFS_UEP1_TX_CTRL (USBFSD_FS->UEP1_TX_CTRL) // endpoint 1 control
#define USBFS_UEP1_RX_CTRL (USBFSD_FS->UEP1_RX_CTRL) // endpoint 1 control
#define USBHD_UEP2_T_LEN (USBOTG_FS->UEP2_TX_LEN) // endpoint 2 transmittal length
#define USBHD_UEP2_TX_CTRL (USBOTG_FS->UEP2_TX_CTRL) // endpoint 2 control
#define USBHD_UEP2_RX_CTRL (USBOTG_FS->UEP2_RX_CTRL) // endpoint 2 control
#define USBFS_UEP2_T_LEN (USBFSD_FS->UEP2_TX_LEN) // endpoint 2 transmittal length
#define USBFS_UEP2_TX_CTRL (USBFSD_FS->UEP2_TX_CTRL) // endpoint 2 control
#define USBFS_UEP2_RX_CTRL (USBFSD_FS->UEP2_RX_CTRL) // endpoint 2 control
#define USBHD_UEP3_T_LEN (USBOTG_FS->UEP3_TX_LEN) // endpoint 3 transmittal length
#define USBHD_UEP3_TX_CTRL (USBOTG_FS->UEP3_TX_CTRL) // endpoint 3 control
#define USBHD_UEP3_RX_CTRL (USBOTG_FS->UEP3_RX_CTRL) // endpoint 3 control
#define USBFS_UEP3_T_LEN (USBFSD_FS->UEP3_TX_LEN) // endpoint 3 transmittal length
#define USBFS_UEP3_TX_CTRL (USBFSD_FS->UEP3_TX_CTRL) // endpoint 3 control
#define USBFS_UEP3_RX_CTRL (USBFSD_FS->UEP3_RX_CTRL) // endpoint 3 control
#define USBHD_UEP4_T_LEN (USBOTG_FS->UEP4_TX_LEN) // endpoint 4 transmittal length
#define USBHD_UEP4_TX_CTRL (USBOTG_FS->UEP4_TX_CTRL) // endpoint 4 control
#define USBHD_UEP4_RX_CTRL (USBOTG_FS->UEP4_RX_CTRL) // endpoint 4 control
#define USBFS_UEP4_T_LEN (USBFSD_FS->UEP4_TX_LEN) // endpoint 4 transmittal length
#define USBFS_UEP4_TX_CTRL (USBFSD_FS->UEP4_TX_CTRL) // endpoint 4 control
#define USBFS_UEP4_RX_CTRL (USBFSD_FS->UEP4_RX_CTRL) // endpoint 4 control
#define USBHD_UEP5_T_LEN (USBOTG_FS->UEP5_TX_LEN) // endpoint 5 transmittal length
#define USBHD_UEP5_TX_CTRL (USBOTG_FS->UEP5_TX_CTRL) // endpoint 5 control
#define USBHD_UEP5_RX_CTRL (USBOTG_FS->UEP5_RX_CTRL) // endpoint 5 control
#define USBFS_UEP5_T_LEN (USBFSD_FS->UEP5_TX_LEN) // endpoint 5 transmittal length
#define USBFS_UEP5_TX_CTRL (USBFSD_FS->UEP5_TX_CTRL) // endpoint 5 control
#define USBFS_UEP5_RX_CTRL (USBFSD_FS->UEP5_RX_CTRL) // endpoint 5 control
#define USBHD_UEP6_T_LEN (USBOTG_FS->UEP6_TX_LEN) // endpoint 6 transmittal length
#define USBHD_UEP6_TX_CTRL (USBOTG_FS->UEP6_TX_CTRL) // endpoint 6 control
#define USBHD_UEP6_RX_CTRL (USBOTG_FS->UEP6_RX_CTRL) // endpoint 6 control
#define USBFS_UEP6_T_LEN (USBFSD_FS->UEP6_TX_LEN) // endpoint 6 transmittal length
#define USBFS_UEP6_TX_CTRL (USBFSD_FS->UEP6_TX_CTRL) // endpoint 6 control
#define USBFS_UEP6_RX_CTRL (USBFSD_FS->UEP6_RX_CTRL) // endpoint 6 control
#define USBHD_UEP7_T_LEN (USBOTG_FS->UEP7_TX_LEN) // endpoint 7 transmittal length
#define USBHD_UEP7_TX_CTRL (USBOTG_FS->UEP7_TX_CTRL) // endpoint 7 control
#define USBHD_UEP7_RX_CTRL (USBOTG_FS->UEP7_RX_CTRL) // endpoint 7 control
#define USBFS_UEP7_T_LEN (USBFSD_FS->UEP7_TX_LEN) // endpoint 7 transmittal length
#define USBFS_UEP7_TX_CTRL (USBFSD_FS->UEP7_TX_CTRL) // endpoint 7 control
#define USBFS_UEP7_RX_CTRL (USBFSD_FS->UEP7_RX_CTRL) // endpoint 7 control
#define USBHD_UEP_AUTO_TOG 0x08 // enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle
#define USBHD_UEP_R_TOG 0x04 // expected data toggle flag of USB endpoint X receiving (OUT): 0=DATA0, 1=DATA1
#define USBHD_UEP_T_TOG 0x04 // prepared data toggle flag of USB endpoint X transmittal (IN): 0=DATA0, 1=DATA1
#define USBFS_UEP_AUTO_TOG 0x08 // enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle
#define USBFS_UEP_R_TOG 0x04 // expected data toggle flag of USB endpoint X receiving (OUT): 0=DATA0, 1=DATA1
#define USBFS_UEP_T_TOG 0x04 // prepared data toggle flag of USB endpoint X transmittal (IN): 0=DATA0, 1=DATA1
#define USBHD_UEP_R_RES1 0x02 // handshake response type high bit for USB endpoint X receiving (OUT)
#define USBHD_UEP_R_RES0 0x01 // handshake response type low bit for USB endpoint X receiving (OUT)
#define USBHD_UEP_R_RES_MASK 0x03 // bit mask of handshake response type for USB endpoint X receiving (OUT)
#define USBHD_UEP_R_RES_ACK 0x00
#define USBHD_UEP_R_RES_TOUT 0x01
#define USBHD_UEP_R_RES_NAK 0x02
#define USBHD_UEP_R_RES_STALL 0x03
#define USBFS_UEP_R_RES1 0x02 // handshake response type high bit for USB endpoint X receiving (OUT)
#define USBFS_UEP_R_RES0 0x01 // handshake response type low bit for USB endpoint X receiving (OUT)
#define USBFS_UEP_R_RES_MASK 0x03 // bit mask of handshake response type for USB endpoint X receiving (OUT)
#define USBFS_UEP_R_RES_ACK 0x00
#define USBFS_UEP_R_RES_TOUT 0x01
#define USBFS_UEP_R_RES_NAK 0x02
#define USBFS_UEP_R_RES_STALL 0x03
// RB_UEP_R_RES1 & RB_UEP_R_RES0: handshake response type for USB endpoint X receiving (OUT)
// 00: ACK (ready)
// 01: no response, time out to host, for non-zero endpoint isochronous transactions
// 10: NAK (busy)
// 11: STALL (error)
#define USBHD_UEP_T_RES1 0x02 // handshake response type high bit for USB endpoint X transmittal (IN)
#define USBHD_UEP_T_RES0 0x01 // handshake response type low bit for USB endpoint X transmittal (IN)
#define USBHD_UEP_T_RES_MASK 0x03 // bit mask of handshake response type for USB endpoint X transmittal (IN)
#define USBHD_UEP_T_RES_ACK 0x00
#define USBHD_UEP_T_RES_TOUT 0x01
#define USBHD_UEP_T_RES_NAK 0x02
#define USBHD_UEP_T_RES_STALL 0x03
#define USBFS_UEP_T_RES1 0x02 // handshake response type high bit for USB endpoint X transmittal (IN)
#define USBFS_UEP_T_RES0 0x01 // handshake response type low bit for USB endpoint X transmittal (IN)
#define USBFS_UEP_T_RES_MASK 0x03 // bit mask of handshake response type for USB endpoint X transmittal (IN)
#define USBFS_UEP_T_RES_ACK 0x00
#define USBFS_UEP_T_RES_TOUT 0x01
#define USBFS_UEP_T_RES_NAK 0x02
#define USBFS_UEP_T_RES_STALL 0x03
// bUEP_T_RES1 & bUEP_T_RES0: handshake response type for USB endpoint X transmittal (IN)
// 00: DATA0 or DATA1 then expecting ACK (ready)
// 01: DATA0 or DATA1 then expecting no response, time out from host, for non-zero endpoint isochronous transactions
// 10: NAK (busy)
// 11: TALL (error)
#ifdef USBHD_HOST
/* USBOTG_FS HOST CONTROL&CFG */
#ifdef USBFS_HOST
/* USBFSD_FS HOST CONTROL&CFG */
/* HOST USB_CTRL */
#define USBHD_UHOST_CTRL (USBOTG_FS->UDEV_CTRL) // USB host physical prot control
#define USBHD_UH_PD_DIS 0x80 // disable USB UDP/UDM pulldown resistance: 0=enable pulldown, 1=disable
#define USBHD_UH_DP_PIN 0x20 // ReadOnly: indicate current UDP pin level
#define USBHD_UH_DM_PIN 0x10 // ReadOnly: indicate current UDM pin level
#define USBHD_UH_LOW_SPEED 0x04 // enable USB port low speed: 0=full speed, 1=low speed
#define USBHD_UH_BUS_RESET 0x02 // control USB bus reset: 0=normal, 1=force bus reset
#define USBHD_UH_PORT_EN 0x01 // enable USB port: 0=disable, 1=enable port, automatic disabled if USB device detached
#define USBFS_UHOST_CTRL (USBFSD_FS->UDEV_CTRL) // USB host physical prot control
#define USBFS_UH_PD_DIS 0x80 // disable USB UDP/UDM pulldown resistance: 0=enable pulldown, 1=disable
#define USBFS_UH_DP_PIN 0x20 // ReadOnly: indicate current UDP pin level
#define USBFS_UH_DM_PIN 0x10 // ReadOnly: indicate current UDM pin level
#define USBFS_UH_LOW_SPEED 0x04 // enable USB port low speed: 0=full speed, 1=low speed
#define USBFS_UH_BUS_RESET 0x02 // control USB bus reset: 0=normal, 1=force bus reset
#define USBFS_UH_PORT_EN 0x01 // enable USB port: 0=disable, 1=enable port, automatic disabled if USB device detached
/* USB_INT_ST */
#define USBHD_UIS_H_RES_MASK 0x0F // RO, bit mask of current transfer handshake response for USB host mode: 0000=no response, time out from device, others=handshake response PID received
#define USBFS_UIS_H_RES_MASK 0x0F // RO, bit mask of current transfer handshake response for USB host mode: 0000=no response, time out from device, others=handshake response PID received
/* USB_BUF_MOD */
#define USBHD_UH_EP_MOD USBHD_UEP2_3_MOD //host endpoint mode
#define USBHD__UH_EP_TX_EN 0x40 // enable USB host OUT endpoint transmittal
#define USBHD__UH_EP_TBUF_MOD 0x10 // buffer mode of USB host OUT endpoint
#define USBFS_UH_EP_MOD USBFS_UEP2_3_MOD //host endpoint mode
#define USBFS__UH_EP_TX_EN 0x40 // enable USB host OUT endpoint transmittal
#define USBFS__UH_EP_TBUF_MOD 0x10 // buffer mode of USB host OUT endpoint
// UH_EP_TX_EN & UH_EP_TBUF_MOD: USB host OUT endpoint buffer mode, buffer start address is UH_TX_DMA
// 0 x: disable endpoint and disable buffer
// 1 0: 64 bytes buffer for transmittal (OUT endpoint)
// 1 1: dual 64 bytes buffer by toggle bit bUH_T_TOG selection for transmittal (OUT endpoint), total=128bytes
#define USBHD_UH_EP_RX_EN 0x08 // enable USB host IN endpoint receiving
#define USBHD_UH_EP_RBUF_MOD 0x01 // buffer mode of USB host IN endpoint
#define USBFS_UH_EP_RX_EN 0x08 // enable USB host IN endpoint receiving
#define USBFS_UH_EP_RBUF_MOD 0x01 // buffer mode of USB host IN endpoint
// UH_EP_RX_EN & UH_EP_RBUF_MOD: USB host IN endpoint buffer mode, buffer start address is UH_RX_DMA
// 0 x: disable endpoint and disable buffer
// 1 0: 64 bytes buffer for receiving (IN endpoint)
// 1 1: dual 64 bytes buffer by toggle bit bUH_R_TOG selection for receiving (IN endpoint), total=128bytes
/* USB_DMA */
#define USBHD_UH_RX_DMA USBHD_UEP2_DMA // host rx endpoint buffer high address
#define USBHD_UH_TX_DMA USBHD_UEP3_DMA // host tx endpoint buffer high address
#define USBFS_UH_RX_DMA USBFS_UEP2_DMA // host rx endpoint buffer high address
#define USBFS_UH_TX_DMA USBFS_UEP3_DMA // host tx endpoint buffer high address
/* USB_HOST_SETUP */
#define USBHD_UH_SETUP (*((PUINT16V)(0x50000036))) // host aux setup
#define USBHD_UH_PRE_PID_EN 0x0400 // USB host PRE PID enable for low speed device via hub
#define USBHD_UH_SOF_EN 0x04 // USB host automatic SOF enable
#define USBHD_UH_EP_PID USBHD_UEP2_T_LEN // host endpoint and PID
#define USBHD_UH_TOKEN_MASK 0xF0 // bit mask of token PID for USB host transfer
#define USBHD_UH_ENDP_MASK 0x0F // bit mask of endpoint number for USB host transfer
#define USBFS_UH_SETUP (*((PUINT16V)(0x50000036))) // host aux setup
#define USBFS_UH_PRE_PID_EN 0x0400 // USB host PRE PID enable for low speed device via hub
#define USBFS_UH_SOF_EN 0x04 // USB host automatic SOF enable
#define USBFS_UH_EP_PID USBFS_UEP2_T_LEN // host endpoint and PID
#define USBFS_UH_TOKEN_MASK 0xF0 // bit mask of token PID for USB host transfer
#define USBFS_UH_ENDP_MASK 0x0F // bit mask of endpoint number for USB host transfer
#define USBHD_UH_RX_CTRL USBHD_UEP2_RX_CTRL // host receiver endpoint control
#define USBHD_UH_R_AUTO_TOG 0x08 // enable automatic toggle after successful transfer completion: 0=manual toggle, 1=automatic toggle
#define USBHD_UH_R_TOG 0x04 // expected data toggle flag of host receiving (IN): 0=DATA0, 1=DATA1
#define USBHD_UH_R_RES 0x01 // prepared handshake response type for host receiving (IN): 0=ACK (ready), 1=no response, time out to device, for isochronous transactions
#define USBFS_UH_RX_CTRL USBFS_UEP2_RX_CTRL // host receiver endpoint control
#define USBFS_UH_R_AUTO_TOG 0x08 // enable automatic toggle after successful transfer completion: 0=manual toggle, 1=automatic toggle
#define USBFS_UH_R_TOG 0x04 // expected data toggle flag of host receiving (IN): 0=DATA0, 1=DATA1
#define USBFS_UH_R_RES 0x01 // prepared handshake response type for host receiving (IN): 0=ACK (ready), 1=no response, time out to device, for isochronous transactions
#define USBHD_UH_RX_CTRL USBHD_UEP2_RX_CTRL // host receiver endpoint control
#define USBHD_UH_R_AUTO_TOG 0x08 // enable automatic toggle after successful transfer completion: 0=manual toggle, 1=automatic toggle
#define USBHD_UH_R_TOG 0x04 // expected data toggle flag of host receiving (IN): 0=DATA0, 1=DATA1
#define USBHD_UH_R_RES 0x01 // prepared handshake response type for host receiving (IN): 0=ACK (ready), 1=no response, time out to device, for isochronous transactions
#define USBHD_UH_TX_LEN USBHD_UEP3_T_LEN // host transmittal endpoint transmittal length
#define USBFS_UH_RX_CTRL USBFS_UEP2_RX_CTRL // host receiver endpoint control
#define USBFS_UH_R_AUTO_TOG 0x08 // enable automatic toggle after successful transfer completion: 0=manual toggle, 1=automatic toggle
#define USBFS_UH_R_TOG 0x04 // expected data toggle flag of host receiving (IN): 0=DATA0, 1=DATA1
#define USBFS_UH_R_RES 0x01 // prepared handshake response type for host receiving (IN): 0=ACK (ready), 1=no response, time out to device, for isochronous transactions
#define USBFS_UH_TX_LEN USBFS_UEP3_T_LEN // host transmittal endpoint transmittal length
#define USBHD_UH_TX_CTRL USBHD_UEP3_TX_CTRL // host transmittal endpoint control
#define USBHD_UH_T_AUTO_TOG 0x08 // enable automatic toggle after successful transfer completion: 0=manual toggle, 1=automatic toggle
#define USBHD_UH_T_TOG 0x04 // prepared data toggle flag of host transmittal (SETUP/OUT): 0=DATA0, 1=DATA1
#define USBHD_UH_T_RES 0x01 // expected handshake response type for host transmittal (SETUP/OUT): 0=ACK (ready), 1=no response, time out from device, for isochronous transactions
#define USBFS_UH_TX_CTRL USBFS_UEP3_TX_CTRL // host transmittal endpoint control
#define USBFS_UH_T_AUTO_TOG 0x08 // enable automatic toggle after successful transfer completion: 0=manual toggle, 1=automatic toggle
#define USBFS_UH_T_TOG 0x04 // prepared data toggle flag of host transmittal (SETUP/OUT): 0=DATA0, 1=DATA1
#define USBFS_UH_T_RES 0x01 // expected handshake response type for host transmittal (SETUP/OUT): 0=ACK (ready), 1=no response, time out from device, for isochronous transactions
#endif
#ifdef USB_OTG
#define USB_OTG_CR (USBOTG_FS->OTG_CR) // usb otg control
#define USB_OTG_CR (USBFSD_FS->OTG_CR) // usb otg control
#define USB_OTG_CR_SESS 0x20 // usb otg control,会话电平使能
#define USB_OTG_CR_VBUS 0x10 // usb otg control,VBUS电平使能
#define USB_OTG_CR_OTG_EN 0x08 // usb otg control,OTG功能使能
@@ -654,7 +654,7 @@ typedef struct __PACKED _UDISK_BOC_CSW {/* status of BulkOnly USB-FlashDisk */
#define USB_OTG_CR_CHARGEVBUS 0x02 // usb otg control,VBUS充电
#define USB_OTG_CR_DISCHARGEVBUS 0x01 // usb otg control,VBUS放电
#define USB_OTG_SR (USBOTG_FS->OTG_CR) // usb otg status
#define USB_OTG_SR (USBFSD_FS->OTG_CR) // usb otg status
#define USB_OTG_SR_VBUS_VLD 0x01 // usb otg status,A设备VBUS输入电平有效
#define USB_OTG_SR_SESS_VLD 0x02 // usb otg status,会话有效电平有效标志
#define USB_OTG_SR_SESS_END 0x04 // usb otg status,会话结束电平有效标志
@@ -734,15 +734,15 @@ extern PUINT8 pEP5_RAM_Addr; /
extern PUINT8 pEP6_RAM_Addr; //ep6_out(64)+ep6_in(64)
extern PUINT8 pEP7_RAM_Addr; //ep7_out(64)+ep7_in(64)
extern volatile UINT16 USBHD_Endp1_Up_Flag; /* USB2.0高速设备端点1数据上传状态: 0:空闲; 1:正在上传; */
extern volatile UINT8 USBHD_Endp1_Down_Flag; /* USB2.0高速设备端点1下传成功标志 */
extern volatile UINT8 USBHD_Endp1_Down_Len; /* USB2.0高速设备端点1下传长度 */
extern volatile BOOL USBHD_Endp1_T_Tog; /* USB2.0高速设备端点1发送tog位翻转 */
extern volatile BOOL USBHD_Endp1_R_Tog;
extern volatile UINT16 USBFS_Endp1_Up_Flag; /* USB2.0高速设备端点1数据上传状态: 0:空闲; 1:正在上传; */
extern volatile UINT8 USBFS_Endp1_Down_Flag; /* USB2.0高速设备端点1下传成功标志 */
extern volatile UINT8 USBFS_Endp1_Down_Len; /* USB2.0高速设备端点1下传长度 */
extern volatile BOOL USBFS_Endp1_T_Tog; /* USB2.0高速设备端点1发送tog位翻转 */
extern volatile BOOL USBFS_Endp1_R_Tog;
extern volatile UINT16 USBHD_Endp2_Up_Flag; /* USB2.0高速设备端点2数据上传状态: 0:空闲; 1:正在上传; */
extern volatile UINT16 USBHD_Endp2_Up_LoadPtr; /* USB2.0高速设备端点2数据上传装载偏移 */
extern volatile UINT8 USBHD_Endp2_Down_Flag; /* USB2.0高速设备端点2下传成功标志 */
extern volatile UINT16 USBFS_Endp2_Up_Flag; /* USB2.0高速设备端点2数据上传状态: 0:空闲; 1:正在上传; */
extern volatile UINT16 USBFS_Endp2_Up_LoadPtr; /* USB2.0高速设备端点2数据上传装载偏移 */
extern volatile UINT8 USBFS_Endp2_Down_Flag; /* USB2.0高速设备端点2下传成功标志 */
/******************************************************************************/
/* DMA地址和缓冲区相关宏定义 */
@@ -791,7 +791,7 @@ extern void DevEP6_IN_Deal( UINT8 l );
extern void DevEP7_IN_Deal( UINT8 l );
extern void USBDeviceInit( void );
extern void USBOTG_Init( void );
extern void USBFS_Init( void );
extern uint8_t USBSendData(void);
EVT/EXAM/BLE/BLE_USB/APP/peripheral.c
+4 -4
View File
@@ -16,12 +16,12 @@
/*********************************************************************
* INCLUDES
*/
#include <ch32v20x_usbfs_device.h>
#include "CONFIG.h"
#include "devinfoservice.h"
#include "gattprofile.h"
#include "peripheral.h"
#include "ble_usb_service.h"
#include "ch32v20x_usbotg_device.h"
/*********************************************************************
* MACROS
@@ -214,9 +214,6 @@ void Peripheral_Init()
GAPRole_SetParameter(GAPROLE_MAX_CONN_INTERVAL, sizeof(uint16_t), &desired_max_interval);
}
// Set the GAP Characteristics
GGS_SetParameter(GGS_DEVICE_NAME_ATT, sizeof(attDeviceName), attDeviceName);
{
uint16_t advInt = DEFAULT_ADVERTISING_INTERVAL;
@@ -249,6 +246,9 @@ void Peripheral_Init()
SimpleProfile_AddService(GATT_ALL_SERVICES); // Simple GATT Profile
ble_usb_add_service(ble_usb_ServiceEvt);
// Set the GAP Characteristics
GGS_SetParameter(GGS_DEVICE_NAME_ATT, sizeof(attDeviceName), attDeviceName);
// Setup the SimpleProfile Characteristic Values
{
uint8_t charValue1[SIMPLEPROFILE_CHAR1_LEN] = {1};
EVT/EXAM/BLE/BLE_USB/APP/peripheral_main.c
+2 -2
View File
@@ -12,11 +12,11 @@
/******************************************************************************/
/* Header file contains */
#include <ch32v20x_usbfs_device.h>
#include "CONFIG.h"
#include "HAL.h"
#include "gattprofile.h"
#include "peripheral.h"
#include "ch32v20x_usbotg_device.h"
/*********************************************************************
* GLOBAL TYPEDEFS
@@ -63,7 +63,7 @@ int main(void)
HAL_Init();
GAPRole_PeripheralInit();
Peripheral_Init();
USBOTG_Init( );
USBFS_Init( );
Main_Circulation();
}
EVT/EXAM/BLE/BLE_USB/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/BackupUpgrade_IAP/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/BackupUpgrade_OTA/APP/peripheral.c
+3 -3
View File
@@ -238,9 +238,6 @@ void Peripheral_Init()
//GAPRole_PeripheralRegisterAppCBs( (gapRolesParamUpdateCB_t *)&PeripheralParamUpdate );
}
// Set the GAP Characteristics
GGS_SetParameter(GGS_DEVICE_NAME_ATT, GAP_DEVICE_NAME_LEN, attDeviceName);
// Set advertising interval
{
uint16_t advInt = DEFAULT_ADVERTISING_INTERVAL;
@@ -270,6 +267,9 @@ void Peripheral_Init()
SimpleProfile_AddService(GATT_ALL_SERVICES); // Simple GATT Profile
OTAProfile_AddService(GATT_ALL_SERVICES);
// Set the GAP Characteristics
GGS_SetParameter(GGS_DEVICE_NAME_ATT, GAP_DEVICE_NAME_LEN, attDeviceName);
// Setup the SimpleProfile Characteristic Values
{
uint8_t charValue1 = 1;
EVT/EXAM/BLE/BackupUpgrade_OTA/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/Broadcaster/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/CentPeri/APP/central.c
+2 -2
View File
@@ -245,8 +245,6 @@ void Central_Init()
GAP_SetParamValue(TGAP_CONN_EST_INT_MAX, DEFAULT_MAX_CONNECTION_INTERVAL);
GAP_SetParamValue(TGAP_CONN_EST_SUPERV_TIMEOUT, DEFAULT_CONNECTION_TIMEOUT);
GGS_SetParameter(GGS_DEVICE_NAME_ATT, GAP_DEVICE_NAME_LEN, (uint8_t *)centralDeviceName);
// Setup the GAP Bond Manager
{
uint32_t passkey = DEFAULT_PASSCODE;
@@ -270,6 +268,8 @@ void Central_Init()
GGS_AddService(GATT_ALL_SERVICES); // GAP
GATTServApp_AddService(GATT_ALL_SERVICES); // GATT attributes
GGS_SetParameter(GGS_DEVICE_NAME_ATT, GAP_DEVICE_NAME_LEN, (uint8_t *)centralDeviceName);
// Setup a delayed profile startup
tmos_set_event(centralTaskId, START_DEVICE_EVT);
}
EVT/EXAM/BLE/CentPeri/APP/peripheral.c
+3 -3
View File
@@ -210,9 +210,6 @@ void Peripheral_Init()
GAPRole_SetParameter(GAPROLE_MAX_CONN_INTERVAL, sizeof(uint16_t), &desired_max_interval);
}
// Set the GAP Characteristics
GGS_SetParameter(GGS_DEVICE_NAME_ATT, sizeof(attDeviceName), attDeviceName);
// Set advertising interval
{
uint16_t advInt = DEFAULT_ADVERTISING_INTERVAL;
@@ -241,6 +238,9 @@ void Peripheral_Init()
DevInfo_AddService(); // Device Information Service
SimpleProfile_AddService(GATT_ALL_SERVICES); // Simple GATT Profile
// Set the GAP Characteristics
GGS_SetParameter(GGS_DEVICE_NAME_ATT, sizeof(attDeviceName), attDeviceName);
// Setup the SimpleProfile Characteristic Values
{
uint8_t charValue1[SIMPLEPROFILE_CHAR1_LEN] = {1};
EVT/EXAM/BLE/CentPeri/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/Central/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/CyclingSensor/APP/cyclingsensor.c
+3 -3
View File
@@ -239,9 +239,6 @@ void CyclingSensor_Init()
GAPRole_SetParameter(GAPROLE_ADVERT_DATA, sizeof(advertData), advertData);
}
// Set the GAP Characteristics
GGS_SetParameter(GGS_DEVICE_NAME_ATT, sizeof(attDeviceName), attDeviceName);
// Setup the GAP Bond Manager
{
uint32_t passkey = 0; // passkey "000000"
@@ -265,6 +262,9 @@ void CyclingSensor_Init()
Cycling_AddService(GATT_ALL_SERVICES);
DevInfo_AddService();
// Set the GAP Characteristics
GGS_SetParameter(GGS_DEVICE_NAME_ATT, sizeof(attDeviceName), attDeviceName);
// Register for cycling service callback
Cycling_Register(SensorCB);
EVT/EXAM/BLE/CyclingSensor/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/Direct_Test_Mode/.cproject
+2 -1
View File
@@ -69,6 +69,7 @@
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.std.2020844713" name="Language standard" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.std" useByScannerDiscovery="true" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.std.gnu99" valueType="enumerated"/>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.defs.177116515" name="Defined symbols (-D)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.defs" useByScannerDiscovery="true" valueType="definedSymbols">
<listOptionValue builtIn="false" value="BLE_DIRECT_TEST=1"/>
<listOptionValue builtIn="false" value="DEBUG=DEBUG_UART2"/>
<listOptionValue builtIn="false" value="HAL_KEY=1"/>
<listOptionValue builtIn="false" value="HAL_LED=1"/>
<listOptionValue builtIn="false" value="CH32V20x_D8W"/>
@@ -160,5 +161,5 @@
</storageModule>
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
<storageModule moduleId="refreshScope"/>
</cproject>
EVT/EXAM/BLE/Direct_Test_Mode/APP/ch32v20x_usbfs_device.c
+66 -71
View File
@@ -3,7 +3,7 @@
* Author : WCH
* Version : V1.0.0
* Date : 2022/08/20
* Description : This file provides all the USBOTG firmware functions.
* Description : This file provides all the USBFS firmware functions.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
@@ -42,12 +42,12 @@ volatile uint8_t USBFS_Endp_Busy[ DEF_UEP_NUM ];
/******************************************************************************/
/* Interrupt Service Routine Declaration*/
void USBHD_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void USBFS_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
/*********************************************************************
* @fn USBFS_RCC_Init
*
* @brief Initializes the usbotg clock configuration.
* @brief Initializes the usbfs clock configuration.
*
* @return none
*/
@@ -65,7 +65,7 @@ void USBFS_RCC_Init( void )
{
RCC_USBCLKConfig( RCC_USBCLKSource_PLLCLK_Div1 );
}
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_OTG_FS, ENABLE );
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_USBFS, ENABLE );
}
/*********************************************************************
@@ -79,24 +79,24 @@ void USBFS_Device_Endp_Init( void )
{
uint8_t i;
USBOTG_FS->UEP4_1_MOD = USBFS_UEP1_TX_EN;
USBOTG_FS->UEP2_3_MOD = USBFS_UEP2_RX_EN|USBFS_UEP3_TX_EN;
USBFSD->UEP4_1_MOD = USBFS_UEP1_TX_EN;
USBFSD->UEP2_3_MOD = USBFS_UEP2_RX_EN|USBFS_UEP3_TX_EN;
USBOTG_FS->UEP0_DMA = (uint32_t)USBFS_EP0_Buf;
USBFSD->UEP0_DMA = (uint32_t)USBFS_EP0_Buf;
USBOTG_FS->UEP1_DMA = (uint32_t)USBFS_EP1_Buf;
USBOTG_FS->UEP2_DMA = (uint32_t)UART2_Tx_Buf;
USBOTG_FS->UEP3_DMA = (uint32_t)USBFS_EP3_Buf;
USBFSD->UEP1_DMA = (uint32_t)USBFS_EP1_Buf;
USBFSD->UEP2_DMA = (uint32_t)UART2_Tx_Buf;
USBFSD->UEP3_DMA = (uint32_t)USBFS_EP3_Buf;
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBOTG_FS->UEP2_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBFSD->UEP2_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBOTG_FS->UEP1_TX_LEN = 0;
USBOTG_FS->UEP3_TX_LEN = 0;
USBFSD->UEP1_TX_LEN = 0;
USBFSD->UEP3_TX_LEN = 0;
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBOTG_FS->UEP1_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBOTG_FS->UEP3_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBFSD->UEP1_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBFSD->UEP3_TX_CTRL = USBFS_UEP_T_RES_NAK;
/* Clear End-points Busy Status */
for( i=0; i<DEF_UEP_NUM; i++ )
@@ -116,20 +116,20 @@ void USBFS_Device_Init( FunctionalState sta )
{
if( sta )
{
USBOTG_H_FS->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
USBFSH->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
Delay_Us( 10 );
USBOTG_H_FS->BASE_CTRL = 0x00;
USBOTG_FS->INT_EN = USBFS_UIE_SUSPEND | USBFS_UIE_BUS_RST | USBFS_UIE_TRANSFER;
USBOTG_FS->BASE_CTRL = USBFS_UC_DEV_PU_EN | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
USBFSH->BASE_CTRL = 0x00;
USBFSD->INT_EN = USBFS_UIE_SUSPEND | USBFS_UIE_BUS_RST | USBFS_UIE_TRANSFER;
USBFSD->BASE_CTRL = USBFS_UC_DEV_PU_EN | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
USBFS_Device_Endp_Init( );
USBOTG_FS->UDEV_CTRL = USBFS_UD_PD_DIS | USBFS_UD_PORT_EN;
USBFSD->UDEV_CTRL = USBFS_UD_PD_DIS | USBFS_UD_PORT_EN;
NVIC_EnableIRQ( USBHD_IRQn );
}
else
{
USBOTG_H_FS->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
USBFSH->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
Delay_Us( 10 );
USBOTG_FS->BASE_CTRL = 0x00;
USBFSD->BASE_CTRL = 0x00;
NVIC_DisableIRQ( USBHD_IRQn );
}
}
@@ -161,7 +161,6 @@ void DevEP2_OUT_Deal( uint8_t l )
*/
uint8_t USBSendData(uint8_t *buf, uint16_t len)
{
USBFS_Endp_DataUp(DEF_UEP3, buf, len, DEF_UEP_CPY_LOAD);
return 0;
@@ -267,20 +266,20 @@ uint8_t USBFS_Endp_DataUp(uint8_t endp, uint8_t *pbuf, uint16_t len, uint8_t mod
/*********************************************************************
* @fn USBHD_IRQHandler
* @fn USBFS_IRQHandler
*
* @brief This function handles HD-FS exception.
* @brief This function handles FS exception.
*
* @return none
*/
void USBHD_IRQHandler( void )
void USBFS_IRQHandler( void )
{
uint8_t intflag, intst, errflag;
uint16_t len;
uint32_t baudrate;
intflag = USBOTG_FS->INT_FG;
intst = USBOTG_FS->INT_ST;
intflag = USBFSD->INT_FG;
intst = USBFSD->INT_ST;
if( intflag & USBFS_UIF_TRANSFER )
{
@@ -294,7 +293,7 @@ void USBHD_IRQHandler( void )
case USBFS_UIS_TOKEN_IN | DEF_UEP0:
if( USBFS_SetupReqLen == 0 )
{
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_ACK;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_ACK;
}
if ( ( USBFS_SetupReqType & USB_REQ_TYP_MASK ) != USB_REQ_TYP_STANDARD )
{
@@ -310,12 +309,12 @@ void USBHD_IRQHandler( void )
memcpy( USBFS_EP0_Buf, pUSBFS_Descr, len );
USBFS_SetupReqLen -= len;
pUSBFS_Descr += len;
USBOTG_FS->UEP0_TX_LEN = len;
USBOTG_FS->UEP0_TX_CTRL ^= USBFS_UEP_T_TOG;
USBFSD->UEP0_TX_LEN = len;
USBFSD->UEP0_TX_CTRL ^= USBFS_UEP_T_TOG;
break;
case USB_SET_ADDRESS:
USBOTG_FS->DEV_ADDR = (USBOTG_FS->DEV_ADDR & USBFS_UDA_GP_BIT) | USBFS_DevAddr;
USBFSD->DEV_ADDR = (USBFSD->DEV_ADDR & USBFS_UDA_GP_BIT) | USBFS_DevAddr;
break;
default:
@@ -326,15 +325,15 @@ void USBHD_IRQHandler( void )
/* end-point 1 data in interrupt */
case ( USBFS_UIS_TOKEN_IN | DEF_UEP1 ):
USBOTG_FS->UEP1_TX_CTRL ^= USBFS_UEP_T_TOG;
USBOTG_FS->UEP1_TX_CTRL = (USBOTG_FS->UEP1_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
USBFSD->UEP1_TX_CTRL ^= USBFS_UEP_T_TOG;
USBFSD->UEP1_TX_CTRL = (USBFSD->UEP1_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
USBFS_Endp_Busy[ DEF_UEP1 ] = 0;
break;
/* end-point 3 data in interrupt */
case ( USBFS_UIS_TOKEN_IN | DEF_UEP3 ):
USBOTG_FS->UEP3_TX_CTRL ^= USBFS_UEP_T_TOG;
USBOTG_FS->UEP3_TX_CTRL = (USBOTG_FS->UEP3_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
USBFSD->UEP3_TX_CTRL ^= USBFS_UEP_T_TOG;
USBFSD->UEP3_TX_CTRL = (USBFSD->UEP3_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
USBFS_Endp_Busy[ DEF_UEP3 ] = 0;
// Uart.USB_Up_IngFlag = 0x00;
break;
@@ -350,7 +349,7 @@ void USBHD_IRQHandler( void )
{
/* end-point 0 data out interrupt */
case USBFS_UIS_TOKEN_OUT | DEF_UEP0:
len = USBOTG_FS->RX_LEN;
len = USBFSD->RX_LEN;
if ( intst & USBFS_UIS_TOG_OK )
{
if ( ( USBFS_SetupReqType & USB_REQ_TYP_MASK ) != USB_REQ_TYP_STANDARD )
@@ -370,16 +369,16 @@ void USBHD_IRQHandler( void )
}
if( USBFS_SetupReqLen == 0 )
{
USBOTG_FS->UEP0_TX_LEN = 0;
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_ACK;
USBFSD->UEP0_TX_LEN = 0;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_ACK;
}
}
break;
/* end-point 1 data out interrupt */
case USBFS_UIS_TOKEN_OUT | DEF_UEP2:
USBOTG_FS->UEP2_RX_CTRL ^= USBFS_UEP_R_TOG;
DevEP2_OUT_Deal(USBOTG_FS->RX_LEN);
USBFSD->UEP2_RX_CTRL ^= USBFS_UEP_R_TOG;
DevEP2_OUT_Deal(USBFSD->RX_LEN);
break;
default:
@@ -389,8 +388,8 @@ void USBHD_IRQHandler( void )
/* Setup stage processing */
case USBFS_UIS_TOKEN_SETUP:
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_NAK;
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_NAK;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_NAK;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_NAK;
/* Store All Setup Values */
USBFS_SetupReqType = pUSBFS_SetupReqPak->bRequestType;
USBFS_SetupReqCode = pUSBFS_SetupReqPak->bRequest;
@@ -548,17 +547,17 @@ void USBHD_IRQHandler( void )
{
case ( DEF_UEP_IN | DEF_UEP1 ):
/* Set End-point 1 IN NAK */
USBOTG_FS->UEP1_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBFSD->UEP1_TX_CTRL = USBFS_UEP_T_RES_NAK;
break;
case ( DEF_UEP_OUT | DEF_UEP2 ):
/* Set End-point 2 OUT ACK */
USBOTG_FS->UEP2_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBFSD->UEP2_RX_CTRL = USBFS_UEP_R_RES_ACK;
break;
case ( DEF_UEP_IN | DEF_UEP3 ):
/* Set End-point 3 IN NAK */
USBOTG_FS->UEP3_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBFSD->UEP3_TX_CTRL = USBFS_UEP_T_RES_NAK;
break;
default:
@@ -609,17 +608,17 @@ void USBHD_IRQHandler( void )
{
case ( DEF_UEP_IN | DEF_UEP1 ):
/* Set End-point 1 IN STALL */
USBOTG_FS->UEP1_TX_CTRL = ( USBOTG_FS->UEP1_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
USBFSD->UEP1_TX_CTRL = ( USBFSD->UEP1_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
break;
case ( DEF_UEP_OUT | DEF_UEP2 ):
/* Set End-point 2 OUT STALL */
USBOTG_FS->UEP2_RX_CTRL = ( USBOTG_FS->UEP2_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
USBFSD->UEP2_RX_CTRL = ( USBFSD->UEP2_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
break;
case ( DEF_UEP_IN | DEF_UEP3 ):
/* Set End-point 3 IN STALL */
USBOTG_FS->UEP3_TX_CTRL = ( USBOTG_FS->UEP3_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
USBFSD->UEP3_TX_CTRL = ( USBFSD->UEP3_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
break;
default:
@@ -666,21 +665,21 @@ void USBHD_IRQHandler( void )
switch( (uint8_t)( USBFS_SetupReqIndex & 0xFF ) )
{
case ( DEF_UEP_IN | DEF_UEP1 ):
if( ( (USBOTG_FS->UEP1_TX_CTRL) & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
if( ( (USBFSD->UEP1_TX_CTRL) & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
{
USBFS_EP0_Buf[ 0 ] = 0x01;
}
break;
case ( DEF_UEP_OUT | DEF_UEP2 ):
if( ( (USBOTG_FS->UEP2_RX_CTRL) & USBFS_UEP_R_RES_MASK ) == USBFS_UEP_R_RES_STALL )
if( ( (USBFSD->UEP2_RX_CTRL) & USBFS_UEP_R_RES_MASK ) == USBFS_UEP_R_RES_STALL )
{
USBFS_EP0_Buf[ 0 ] = 0x01;
}
break;
case ( DEF_UEP_IN | DEF_UEP3 ):
if( ( (USBOTG_FS->UEP3_TX_CTRL) & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
if( ( (USBFSD->UEP3_TX_CTRL) & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
{
USBFS_EP0_Buf[ 0 ] = 0x01;
}
@@ -712,8 +711,8 @@ void USBHD_IRQHandler( void )
if( errflag == 0xff)
{
/* if one request not support, return stall */
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_STALL;
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_STALL;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_STALL;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_STALL;
}
else
{
@@ -723,45 +722,41 @@ void USBHD_IRQHandler( void )
/* tx */
len = (USBFS_SetupReqLen>DEF_USBD_UEP0_SIZE) ? DEF_USBD_UEP0_SIZE : USBFS_SetupReqLen;
USBFS_SetupReqLen -= len;
USBOTG_FS->UEP0_TX_LEN = len;
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
USBFSD->UEP0_TX_LEN = len;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
}
else
{
/* rx */
if( USBFS_SetupReqLen == 0 )
{
USBOTG_FS->UEP0_TX_LEN = 0;
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
USBFSD->UEP0_TX_LEN = 0;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
}
else
{
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_ACK;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_ACK;
}
}
}
break;
/* Sof pack processing */
case USBFS_UIS_TOKEN_SOF:
break;
default :
break;
}
USBOTG_FS->INT_FG = USBFS_UIF_TRANSFER;
USBFSD->INT_FG = USBFS_UIF_TRANSFER;
}
else if( intflag & USBFS_UIF_BUS_RST )
{
/* usb reset interrupt processing */
USBOTG_FS->DEV_ADDR = 0;
USBFSD->DEV_ADDR = 0;
USBFS_Device_Endp_Init( );
USBOTG_FS->INT_FG = USBFS_UIF_BUS_RST;
USBFSD->INT_FG = USBFS_UIF_BUS_RST;
}
else if( intflag & USBFS_UIF_SUSPEND )
{
/* usb suspend interrupt processing */
if ( USBOTG_FS->MIS_ST & USBFS_UMS_SUSPEND )
if ( USBFSD->MIS_ST & USBFS_UMS_SUSPEND )
{
USBFS_DevSleepStatus |= 0x02;
if( USBFS_DevSleepStatus == 0x03 )
@@ -773,12 +768,12 @@ void USBHD_IRQHandler( void )
{
USBFS_DevSleepStatus &= ~0x02;
}
USBOTG_FS->INT_FG = USBFS_UIF_SUSPEND;
USBFSD->INT_FG = USBFS_UIF_SUSPEND;
}
else
{
/* other interrupts */
USBOTG_FS->INT_FG = intflag;
USBFSD->INT_FG = intflag;
}
}
EVT/EXAM/BLE/Direct_Test_Mode/APP/include/ch32v20x_usbfs_device.h
+1 -1
View File
@@ -4,7 +4,7 @@
* Version : V1.0.0
* Date : 2022/08/20
* Description : This file contains all the functions prototypes for the
* USBOTG firmware library.
* USBFS firmware library.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
EVT/EXAM/BLE/HAL/Link.ld
+4 -4
View File
@@ -186,19 +186,19 @@ SECTIONS
PROVIDE( _end = _ebss);
PROVIDE( end = . );
/*.stack ORIGIN(RAM) + LENGTH(RAM) - __stack_size :
.stack ORIGIN(RAM) + LENGTH(RAM) - __stack_size :
{
PROVIDE( _heap_end = . );
. = ALIGN(4);
PROVIDE(_susrstack = . );
. = . + __stack_size;
PROVIDE( _eusrstack = .);
} >RAM */
} >RAM
.stack ORIGIN(RAM)+LENGTH(RAM) :
/*.stack ORIGIN(RAM)+LENGTH(RAM) :
{
PROVIDE( _heap_end = . );
. = ALIGN(4);
PROVIDE(_eusrstack = . );
} >RAM
} >RAM */
}
EVT/EXAM/BLE/HID_Consumer/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/HID_Keyboard/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/HID_Mouse/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/HID_Touch/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/HeartRate/APP/heartrate.c
+3 -3
View File
@@ -221,9 +221,6 @@ void HeartRate_Init()
GAPRole_SetParameter(GAPROLE_SCAN_RSP_DATA, sizeof(scanRspData), scanRspData);
GAPRole_SetParameter(GAPROLE_ADVERT_DATA, sizeof(advertData), advertData);
}
// Set the GAP Characteristics
GGS_SetParameter(GGS_DEVICE_NAME_ATT, sizeof(attDeviceName), attDeviceName);
// Setup the GAP Bond Manager
{
uint32_t passkey = 0; // passkey "000000"
@@ -257,6 +254,9 @@ void HeartRate_Init()
DevInfo_AddService();
Batt_AddService();
// Set the GAP Characteristics
GGS_SetParameter(GGS_DEVICE_NAME_ATT, sizeof(attDeviceName), attDeviceName);
// Register for Heart Rate service callback
HeartRate_Register(heartRateCB);
EVT/EXAM/BLE/HeartRate/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/LIB/libwchble.a
BIN
View File
Binary file not shown.
EVT/EXAM/BLE/LIB/wchble.h
+17 -4
View File
@@ -1,8 +1,8 @@
/********************************** (C) COPYRIGHT ******************************
* File Name : wchble.h
* Author : WCH
* Version : V1.30
* Date : 2023/07/01
* Version : V1.40
* Date : 2024/01/02
* Description : head file
* Copyright (c) 2022 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
@@ -143,7 +143,7 @@ typedef struct
/*********************************************************************
* GLOBAL MACROS
*/
#define VER_FILE "CH32V20x_BLE_LIB_V1.3"
#define VER_FILE "CH32V20x_BLE_LIB_V1.4"
extern const uint8_t VER_LIB[]; // LIB version
#define SYSTEM_TIME_MICROSEN 625 // unit of process event timer is 625us
#define MS1_TO_SYSTEM_TIME(x) ((x)*1000/SYSTEM_TIME_MICROSEN) // transform unit in ms to unit in 625us ( attentional bias )
@@ -857,7 +857,9 @@ extern const uint8_t VER_LIB[]; // LIB version
#define TGAP_ADV_PRIMARY_PHY_OPTIONS 64 //!< Indicate the Host's preference or requirement concerning coding scheme.Default GAP_PHY_OPTIONS_NOPRE.
#define TGAP_ADV_SECONDARY_PHY_OPTIONS 65 //!< indicate the Host's preference or requirement concerning coding scheme (including for periodic advertising).Default GAP_PHY_OPTIONS_NOPRE.
#define TGAP_PARAMID_MAX 66 //!< ID MAX-valid Parameter ID
#define TGAP_ADV_RSP_RSSI_MIN 66 //!< The minimum RSSI for advertising to send scanning response. Default -127.
#define TGAP_PARAMID_MAX 67 //!< ID MAX-valid Parameter ID
// GAP_DEVDISC_MODE_DEFINES GAP Device Discovery Modes
#define DEVDISC_MODE_NONDISCOVERABLE 0x00 //!< No discoverable setting
@@ -4759,6 +4761,17 @@ extern bStatus_t RF_Shut( void );
*/
extern void RF_SetChannel( uint32_t channel );
/**
* @brief rf mode set radio frequency and whitening channel index
* note: LLEMode bit6 set 1
*
* @param frequency -
* @param ch - the whitening channel index
*
* @return 0 - success.
*/
extern bStatus_t RF_SetFrequency( uint32_t frequency, uint8_t ch );
/**
* @brief shut down rf frequency hopping
*
EVT/EXAM/BLE/LIB/wchble_rom.h
+17 -4
View File
@@ -1,8 +1,8 @@
/********************************** (C) COPYRIGHT ******************************
* File Name : wchble_rom.h
* Author : WCH
* Version : V1.30
* Date : 2023/07/01
* Version : V1.40
* Date : 2024/01/02
* Description : head file
* Address Space
* CODE: 00040000H - 0006FFFFH 192K
@@ -151,7 +151,7 @@ typedef struct
/*********************************************************************
* GLOBAL MACROS
*/
#define VER_FILE "CH32V20x_BLE_LIB_V1.3"
#define VER_FILE "CH32V20x_BLE_LIB_V1.4"
extern const uint8_t VER_LIB[]; // LIB version
#define SYSTEM_TIME_MICROSEN 625 // unit of process event timer is 625us
#define MS1_TO_SYSTEM_TIME(x) ((x)*1000/SYSTEM_TIME_MICROSEN) // transform unit in ms to unit in 625us ( attentional bias )
@@ -865,7 +865,9 @@ extern const uint8_t VER_LIB[]; // LIB version
#define TGAP_ADV_PRIMARY_PHY_OPTIONS 64 //!< Indicate the Host's preference or requirement concerning coding scheme.Default GAP_PHY_OPTIONS_NOPRE.
#define TGAP_ADV_SECONDARY_PHY_OPTIONS 65 //!< indicate the Host's preference or requirement concerning coding scheme (including for periodic advertising).Default GAP_PHY_OPTIONS_NOPRE.
#define TGAP_PARAMID_MAX 66 //!< ID MAX-valid Parameter ID
#define TGAP_ADV_RSP_RSSI_MIN 66 //!< The minimum RSSI for advertising to send scanning response. Default -127.
#define TGAP_PARAMID_MAX 67 //!< ID MAX-valid Parameter ID
// GAP_DEVDISC_MODE_DEFINES GAP Device Discovery Modes
#define DEVDISC_MODE_NONDISCOVERABLE 0x00 //!< No discoverable setting
@@ -4782,6 +4784,17 @@ typedef struct tag_rf_config
*/
#define RF_SetChannel (( void (*) ( uint32_t channel )) BLE_LIB_JT(115) )
/**
* @brief rf mode set radio frequency and whitening channel index
* note: LLEMode bit6 set 1
*
* @param frequency -
* @param ch - the whitening channel index
*
* @return 0 - success.
*/
#define RF_SetFrequency (( bStatus_t (*) ( uint32_t frequency, uint8_t channel )) BLE_LIB_JT(148) )
/**
* @brief shut down rf frequency hopping
*
EVT/EXAM/BLE/LIB/wchble_rom.hex
+11997 -11965
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File diff suppressed because it is too large Load Diff
EVT/EXAM/BLE/LWNS/APP/system_ch32v20x.c
+2 -2
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@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/MESH/MESH_LIB/wchble_rom_mesh.hex
+8022 -8011
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File diff suppressed because it is too large Load Diff
EVT/EXAM/BLE/MESH/adv_ali_light/APP/system_ch32v20x.c
+2 -2
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@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/MESH/adv_ali_light_add_lightness/APP/system_ch32v20x.c
+2 -2
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@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/MESH/adv_ali_light_add_windspeed/APP/system_ch32v20x.c
+2 -2
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@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/MESH/adv_ali_light_multi_element/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/MESH/adv_ali_light_with_peripheral/APP/peripheral.c
+3 -3
View File
@@ -217,9 +217,6 @@ void Peripheral_Init(void)
GAPRole_SetParameter(GAPROLE_MAX_CONN_INTERVAL, sizeof(uint16_t), &desired_max_interval);
}
// Set the GAP Characteristics
GGS_SetParameter(GGS_DEVICE_NAME_ATT, sizeof(attDeviceName), attDeviceName);
// Set advertising interval
{
uint16_t advInt = DEFAULT_ADVERTISING_INTERVAL;
@@ -247,6 +244,9 @@ void Peripheral_Init(void)
GATTServApp_AddService(GATT_ALL_SERVICES); // GATT attributes
SimpleProfile_AddService(GATT_ALL_SERVICES); // Simple GATT Profile
// Set the GAP Characteristics
GGS_SetParameter(GGS_DEVICE_NAME_ATT, sizeof(attDeviceName), attDeviceName);
// Setup the SimpleProfile Characteristic Values
{
uint8_t charValue1[SIMPLEPROFILE_CHAR1_LEN] = {1};
EVT/EXAM/BLE/MESH/adv_ali_light_with_peripheral/APP/system_ch32v20x.c
+2 -2
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@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/MESH/adv_proxy/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/MESH/adv_vendor/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/MESH/adv_vendor_friend/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/MESH/adv_vendor_low_power/.cproject
-2
View File
@@ -70,7 +70,6 @@
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.defs.177116515" name="Defined symbols (-D)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.defs" useByScannerDiscovery="true" valueType="definedSymbols">
<listOptionValue builtIn="false" value="BLE_MEMHEAP_SIZE=4096"/>
<listOptionValue builtIn="false" value="CH32V20x_D8W"/>
<listOptionValue builtIn="false" value="HAL_KEY=1"/>
</option>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="true" id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.include.files.288896968" name="Include files (-include)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.include.files" useByScannerDiscovery="true" valueType="includeFiles"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.preprocessonly.1594987158" name="Preprocess only (-E)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.preprocessonly" useByScannerDiscovery="false" value="false" valueType="boolean"/>
@@ -159,5 +158,4 @@
</storageModule>
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
</cproject>
EVT/EXAM/BLE/MESH/adv_vendor_low_power/APP/app.c
+3 -1
View File
@@ -610,9 +610,11 @@ void App_Init()
vendor_model_srv_init(vnd_models);
blemesh_on_sync();
#if(defined HAL_KEY) && (HAL_KEY == TRUE)
HAL_KeyInit();
HalKeyConfig(keyPress);
tmos_start_task(App_TaskID, APP_NODE_TEST_EVT, 1600);
#endif
// tmos_start_task(App_TaskID, APP_NODE_TEST_EVT, 1600);
}
/*********************************************************************
EVT/EXAM/BLE/MESH/adv_vendor_low_power/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/MESH/adv_vendor_self_provision/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/MESH/adv_vendor_self_provision_IAP/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/MESH/adv_vendor_self_provision_with_peripheral/APP/peripheral.c
+3 -3
View File
@@ -209,9 +209,6 @@ void Peripheral_Init()
GAPRole_SetParameter(GAPROLE_MAX_CONN_INTERVAL, sizeof(uint16_t), &desired_max_interval);
}
// Set the GAP Characteristics
GGS_SetParameter(GGS_DEVICE_NAME_ATT, sizeof(attDeviceName), attDeviceName);
// Set advertising interval
{
uint16_t advInt = DEFAULT_ADVERTISING_INTERVAL;
@@ -239,6 +236,9 @@ void Peripheral_Init()
GATTServApp_AddService(GATT_ALL_SERVICES); // GATT attributes
SimpleProfile_AddService(GATT_ALL_SERVICES); // Simple GATT Profile
// Set the GAP Characteristics
GGS_SetParameter(GGS_DEVICE_NAME_ATT, sizeof(attDeviceName), attDeviceName);
// Setup the SimpleProfile Characteristic Values
{
uint8_t charValue1[SIMPLEPROFILE_CHAR1_LEN] = {1};
EVT/EXAM/BLE/MESH/adv_vendor_self_provision_with_peripheral/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/MESH/self_provisioner_vendor/.cproject → EVT/EXAM/BLE/MESH/provisioner_vendor/.cproject
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EVT/EXAM/BLE/MESH/self_provisioner_vendor/.project → EVT/EXAM/BLE/MESH/provisioner_vendor/.project
+1 -1
View File
@@ -1,6 +1,6 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<projectDescription>
<name>self_provisioner_vendor</name>
<name>provisioner_vendor</name>
<comment/>
<projects>
</projects>
EVT/EXAM/BLE/MESH/self_provisioner_vendor/APP/app.c → EVT/EXAM/BLE/MESH/provisioner_vendor/APP/app.c
View File
EVT/EXAM/BLE/MESH/self_provisioner_vendor/APP/app_main.c → EVT/EXAM/BLE/MESH/provisioner_vendor/APP/app_main.c
View File
EVT/EXAM/BLE/MESH/self_provisioner_vendor/APP/app_mesh_config.c → EVT/EXAM/BLE/MESH/provisioner_vendor/APP/app_mesh_config.c
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EVT/EXAM/BLE/MESH/self_provisioner_vendor/APP/app_vendor_model_cli.c → EVT/EXAM/BLE/MESH/provisioner_vendor/APP/app_vendor_model_cli.c
View File
EVT/EXAM/BLE/MESH/self_provisioner_vendor/APP/ch32v20x_it.c → EVT/EXAM/BLE/MESH/provisioner_vendor/APP/ch32v20x_it.c
View File
EVT/EXAM/BLE/MESH/self_provisioner_vendor/APP/include/app.h → EVT/EXAM/BLE/MESH/provisioner_vendor/APP/include/app.h
View File
EVT/EXAM/BLE/MESH/self_provisioner_vendor/APP/include/app_mesh_config.h → EVT/EXAM/BLE/MESH/provisioner_vendor/APP/include/app_mesh_config.h
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EVT/EXAM/BLE/MESH/self_provisioner_vendor/APP/include/app_vendor_model_cli.h → EVT/EXAM/BLE/MESH/provisioner_vendor/APP/include/app_vendor_model_cli.h
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EVT/EXAM/BLE/MESH/self_provisioner_vendor/APP/include/app_vendor_model_srv.h → EVT/EXAM/BLE/MESH/provisioner_vendor/APP/include/app_vendor_model_srv.h
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EVT/EXAM/BLE/MESH/self_provisioner_vendor/APP/include/ch32v20x_conf.h → EVT/EXAM/BLE/MESH/provisioner_vendor/APP/include/ch32v20x_conf.h
View File
EVT/EXAM/BLE/MESH/self_provisioner_vendor/APP/include/ch32v20x_it.h → EVT/EXAM/BLE/MESH/provisioner_vendor/APP/include/ch32v20x_it.h
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EVT/EXAM/BLE/MESH/self_provisioner_vendor/APP/include/system_ch32v20x.h → EVT/EXAM/BLE/MESH/provisioner_vendor/APP/include/system_ch32v20x.h
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EVT/EXAM/BLE/MESH/self_provisioner_vendor_with_peripheral/APP/system_ch32v20x.c → EVT/EXAM/BLE/MESH/provisioner_vendor/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/MESH/self_provisioner_vendor/self_provisioner_vendor.wvproj → EVT/EXAM/BLE/MESH/provisioner_vendor/provisioner_vendor.wvproj
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EVT/EXAM/BLE/MESH/self_provisioner_vendor_with_peripheral/.cproject → EVT/EXAM/BLE/MESH/provisioner_vendor_with_peripheral/.cproject
View File
EVT/EXAM/BLE/MESH/self_provisioner_vendor_with_peripheral/.project → EVT/EXAM/BLE/MESH/provisioner_vendor_with_peripheral/.project
+1 -1
View File
@@ -1,6 +1,6 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<projectDescription>
<name>self_provisioner_vendor_with_peripheral</name>
<name>provisioner_vendor_with_peripheral</name>
<comment/>
<projects>
</projects>
EVT/EXAM/BLE/MESH/self_provisioner_vendor_with_peripheral/APP/app.c → EVT/EXAM/BLE/MESH/provisioner_vendor_with_peripheral/APP/app.c
View File
EVT/EXAM/BLE/MESH/self_provisioner_vendor_with_peripheral/APP/app_main.c → EVT/EXAM/BLE/MESH/provisioner_vendor_with_peripheral/APP/app_main.c
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EVT/EXAM/BLE/MESH/self_provisioner_vendor_with_peripheral/APP/app_mesh_config.c → EVT/EXAM/BLE/MESH/provisioner_vendor_with_peripheral/APP/app_mesh_config.c
View File
EVT/EXAM/BLE/MESH/self_provisioner_vendor_with_peripheral/APP/app_vendor_model_cli.c → EVT/EXAM/BLE/MESH/provisioner_vendor_with_peripheral/APP/app_vendor_model_cli.c
View File
EVT/EXAM/BLE/MESH/self_provisioner_vendor_with_peripheral/APP/ch32v20x_it.c → EVT/EXAM/BLE/MESH/provisioner_vendor_with_peripheral/APP/ch32v20x_it.c
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EVT/EXAM/BLE/MESH/self_provisioner_vendor_with_peripheral/APP/include/app.h → EVT/EXAM/BLE/MESH/provisioner_vendor_with_peripheral/APP/include/app.h
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EVT/EXAM/BLE/MESH/self_provisioner_vendor_with_peripheral/APP/include/app_mesh_config.h → EVT/EXAM/BLE/MESH/provisioner_vendor_with_peripheral/APP/include/app_mesh_config.h
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EVT/EXAM/BLE/MESH/self_provisioner_vendor_with_peripheral/APP/include/app_vendor_model_cli.h → EVT/EXAM/BLE/MESH/provisioner_vendor_with_peripheral/APP/include/app_vendor_model_cli.h
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EVT/EXAM/BLE/MESH/self_provisioner_vendor_with_peripheral/APP/include/app_vendor_model_srv.h → EVT/EXAM/BLE/MESH/provisioner_vendor_with_peripheral/APP/include/app_vendor_model_srv.h
View File
EVT/EXAM/BLE/MESH/self_provisioner_vendor_with_peripheral/APP/include/ch32v20x_conf.h → EVT/EXAM/BLE/MESH/provisioner_vendor_with_peripheral/APP/include/ch32v20x_conf.h
View File
EVT/EXAM/BLE/MESH/self_provisioner_vendor_with_peripheral/APP/include/ch32v20x_it.h → EVT/EXAM/BLE/MESH/provisioner_vendor_with_peripheral/APP/include/ch32v20x_it.h
View File
EVT/EXAM/BLE/MESH/self_provisioner_vendor_with_peripheral/APP/include/peripheral.h → EVT/EXAM/BLE/MESH/provisioner_vendor_with_peripheral/APP/include/peripheral.h
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EVT/EXAM/BLE/MESH/self_provisioner_vendor_with_peripheral/APP/include/system_ch32v20x.h → EVT/EXAM/BLE/MESH/provisioner_vendor_with_peripheral/APP/include/system_ch32v20x.h
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EVT/EXAM/BLE/MESH/self_provisioner_vendor_with_peripheral/APP/peripheral.c → EVT/EXAM/BLE/MESH/provisioner_vendor_with_peripheral/APP/peripheral.c
+3 -3
View File
@@ -214,9 +214,6 @@ void Peripheral_Init()
GAPRole_SetParameter(GAPROLE_MAX_CONN_INTERVAL, sizeof(uint16_t), &desired_max_interval);
}
// Set the GAP Characteristics
GGS_SetParameter(GGS_DEVICE_NAME_ATT, sizeof(attDeviceName), attDeviceName);
// Set advertising interval
{
uint16_t advInt = DEFAULT_ADVERTISING_INTERVAL;
@@ -244,6 +241,9 @@ void Peripheral_Init()
GATTServApp_AddService(GATT_ALL_SERVICES); // GATT attributes
SimpleProfile_AddService(GATT_ALL_SERVICES); // Simple GATT Profile
// Set the GAP Characteristics
GGS_SetParameter(GGS_DEVICE_NAME_ATT, sizeof(attDeviceName), attDeviceName);
// Setup the SimpleProfile Characteristic Values
{
uint8_t charValue1[SIMPLEPROFILE_CHAR1_LEN] = {1};
EVT/EXAM/BLE/MESH/self_provisioner_vendor/APP/system_ch32v20x.c → EVT/EXAM/BLE/MESH/provisioner_vendor_with_peripheral/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/MESH/self_provisioner_vendor_with_peripheral/Profile/gattprofile.c → EVT/EXAM/BLE/MESH/provisioner_vendor_with_peripheral/Profile/gattprofile.c
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EVT/EXAM/BLE/MESH/self_provisioner_vendor_with_peripheral/Profile/include/gattprofile.h → EVT/EXAM/BLE/MESH/provisioner_vendor_with_peripheral/Profile/include/gattprofile.h
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EVT/EXAM/BLE/MESH/self_provisioner_vendor_with_peripheral/self_provisioner_vendor_with_peripheral.wvproj → EVT/EXAM/BLE/MESH/provisioner_vendor_with_peripheral/provisioner_vendor_with_peripheral.wvproj
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EVT/EXAM/BLE/MultiCentPeri/APP/multiPeripheral.c
+3 -3
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@@ -228,9 +228,6 @@ void Peripheral_Init()
GAPRole_SetParameter(GAPROLE_MAX_CONN_INTERVAL, sizeof(uint16_t), &desired_max_interval);
}
// Set the GAP Characteristics
GGS_SetParameter(GGS_DEVICE_NAME_ATT, sizeof(attDeviceName), attDeviceName);
{
uint16_t advInt = DEFAULT_ADVERTISING_INTERVAL;
@@ -262,6 +259,9 @@ void Peripheral_Init()
DevInfo_AddService(); // Device Information Service
SimpleProfile_AddService(GATT_ALL_SERVICES); // Simple GATT Profile
// Set the GAP Characteristics
GGS_SetParameter(GGS_DEVICE_NAME_ATT, sizeof(attDeviceName), attDeviceName);
// Setup the SimpleProfile Characteristic Values
{
uint8_t charValue1[SIMPLEPROFILE_CHAR1_LEN] = {1};
EVT/EXAM/BLE/MultiCentPeri/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/MultiCentral/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/Observer/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/OnlyUpdateApp_IAP/APP/peripheral.c
+3 -3
View File
@@ -226,9 +226,6 @@ void Peripheral_Init()
GAPRole_SetParameter(GAPROLE_ADVERT_DATA, sizeof(advertData), advertData);
}
// Set the GAP Characteristics
GGS_SetParameter(GGS_DEVICE_NAME_ATT, sizeof(attDeviceName), attDeviceName);
// Set advertising interval
{
uint16_t advInt = DEFAULT_ADVERTISING_INTERVAL;
@@ -242,6 +239,9 @@ void Peripheral_Init()
GATTServApp_AddService(GATT_ALL_SERVICES); // GATT attributes
OTAProfile_AddService(GATT_ALL_SERVICES);
// Set the GAP Characteristics
GGS_SetParameter(GGS_DEVICE_NAME_ATT, sizeof(attDeviceName), attDeviceName);
// Register callback with OTAGATTprofile
OTAProfile_RegisterAppCBs(&Peripheral_OTA_IAPProfileCBs);
EVT/EXAM/BLE/OnlyUpdateApp_IAP/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/OnlyUpdateApp_Peripheral/APP/peripheral.c
+3 -3
View File
@@ -222,9 +222,6 @@ void Peripheral_Init()
GAPRole_SetParameter(GAPROLE_MAX_CONN_INTERVAL, sizeof(uint16_t), &desired_max_interval);
}
// Set the GAP Characteristics
GGS_SetParameter(GGS_DEVICE_NAME_ATT, sizeof(attDeviceName), attDeviceName);
{
uint16_t advInt = DEFAULT_ADVERTISING_INTERVAL;
@@ -256,6 +253,9 @@ void Peripheral_Init()
DevInfo_AddService(); // Device Information Service
SimpleProfile_AddService(GATT_ALL_SERVICES); // Simple GATT Profile
// Set the GAP Characteristics
GGS_SetParameter(GGS_DEVICE_NAME_ATT, sizeof(attDeviceName), attDeviceName);
// Setup the SimpleProfile Characteristic Values
{
uint8_t charValue1[SIMPLEPROFILE_CHAR1_LEN] = {1};
EVT/EXAM/BLE/OnlyUpdateApp_Peripheral/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/PAwR_ADV/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/PAwR_RSP/APP/rsp_peripheral.c
+3 -3
View File
@@ -210,9 +210,6 @@ void Peripheral_Init(void)
GAPRole_SetParameter(GAPROLE_MAX_CONN_INTERVAL, sizeof(uint16_t), &desired_max_interval);
}
// Set the GAP Characteristics
GGS_SetParameter(GGS_DEVICE_NAME_ATT, sizeof(attDeviceName), attDeviceName);
{
uint16_t advInt = DEFAULT_ADVERTISING_INTERVAL;
@@ -244,6 +241,9 @@ void Peripheral_Init(void)
DevInfo_AddService(); // Device Information Service
SimpleProfile_AddService(GATT_ALL_SERVICES); // Simple GATT Profile
// Set the GAP Characteristics
GGS_SetParameter(GGS_DEVICE_NAME_ATT, sizeof(attDeviceName), attDeviceName);
// Setup the SimpleProfile Characteristic Values
{
uint8_t charValue1[SIMPLEPROFILE_CHAR1_LEN] = {1};
EVT/EXAM/BLE/PAwR_RSP/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/Peripheral/.template
-13
View File
@@ -1,13 +0,0 @@
Vendor=WCH
Link=WCH-Link
Toolchain=
Series=
Description=
Mcu Type=
Address=
Target Path=
Erase All=true
Program=true
Verify=true
Reset=true
EVT/EXAM/BLE/Peripheral/APP/peripheral.c
+3 -3
View File
@@ -222,9 +222,6 @@ void Peripheral_Init()
GAPRole_SetParameter(GAPROLE_MAX_CONN_INTERVAL, sizeof(uint16_t), &desired_max_interval);
}
// Set the GAP Characteristics
GGS_SetParameter(GGS_DEVICE_NAME_ATT, sizeof(attDeviceName), attDeviceName);
{
uint16_t advInt = DEFAULT_ADVERTISING_INTERVAL;
@@ -256,6 +253,9 @@ void Peripheral_Init()
DevInfo_AddService(); // Device Information Service
SimpleProfile_AddService(GATT_ALL_SERVICES); // Simple GATT Profile
// Set the GAP Characteristics
GGS_SetParameter(GGS_DEVICE_NAME_ATT, sizeof(attDeviceName), attDeviceName);
// Setup the SimpleProfile Characteristic Values
{
uint8_t charValue1[SIMPLEPROFILE_CHAR1_LEN] = {1};
EVT/EXAM/BLE/Peripheral/APP/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/BLE/Peripheral_ETH/.template
-13
View File
@@ -1,13 +0,0 @@
Vendor=WCH
Link=WCH-Link
Toolchain=
Series=
Description=
Mcu Type=
Address=
Target Path=
Erase All=true
Program=true
Verify=true
Reset=true

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