V2.0
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@@ -2,7 +2,7 @@
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* File Name : ch32v20x_it.c
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* Author : WCH
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* Version : V1.0.0
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* Date : 2021/06/06
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* Date : 2023/12/29
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* Description : Main Interrupt Service Routines.
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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@@ -24,6 +24,9 @@ void DMA1_Channel6_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast
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*/
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void NMI_Handler(void)
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{
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while (1)
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{
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}
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}
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/*********************************************************************
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@@ -82,11 +82,6 @@ void IIC_Init(u32 bound, u16 address)
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I2C_DMACmd( I2C1, ENABLE );
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I2C_Cmd( I2C1, ENABLE );
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#if (I2C_MODE == HOST_MODE)
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I2C_AcknowledgeConfig( I2C1, ENABLE );
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#endif
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}
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/*********************************************************************
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@@ -177,7 +172,7 @@ int main(void)
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{
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uint8_t i ,t;
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uint8_t j ;
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NVIC_PriorityGroupConfig( NVIC_PriorityGroup_4 );
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NVIC_PriorityGroupConfig( NVIC_PriorityGroup_1 );
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SystemCoreClockUpdate();
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Delay_Init();
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USART_Printf_Init( 460800 );
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@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
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void SystemInit (void)
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{
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RCC->CTLR |= (uint32_t)0x00000001;
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RCC->CFGR0 &= (uint32_t)0xF8FF0000;
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RCC->CFGR0 &= (uint32_t)0xF0FF0000;
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RCC->CTLR &= (uint32_t)0xFEF6FFFF;
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RCC->CTLR &= (uint32_t)0xFFFBFFFF;
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RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
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RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
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RCC->INTR = 0x009F0000;
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SetSysClock();
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}
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