bstanwell/ch32v20x-examples
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This commit is contained in:
qiyongshuang
2024-02-26 13:22:09 +08:00
parent 0ad592325e
commit 9596a13c17
573 changed files with 36301 additions and 23003 deletions
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EVT/EXAM/IAP/USB_UART/CH32V20x_IAP/.template
+2 -1
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@@ -1,6 +1,6 @@
Mcu Type=CH32V20x
Address=0x08000000
Target Path=obj/CH32V20x_IAP.hex
Target Path=obj\CH32V20x_IAP.hex
Erase All=true
Program=true
Verify=true
@@ -14,3 +14,4 @@ Description=ROM(byte): 64K, SRAM(byte): 20K, CHIP PINS: 32, GPIO PORTS: 27.\nWCH
PeripheralVersion=1.0
MCU=CH32V203RBT6
CLKSpeed=1
EVT/EXAM/IAP/USB_UART/CH32V20x_IAP/User/ch32v20x_it.c
+4 -1
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@@ -2,7 +2,7 @@
* File Name : ch32v20x_it.c
* Author : WCH
* Version : V1.0.0
* Date : 2021/06/06
* Date : 2023/12/29
* Description : Main Interrupt Service Routines.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
@@ -23,6 +23,9 @@ void SW_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
*/
void NMI_Handler(void)
{
while (1)
{
}
}
/*********************************************************************
EVT/EXAM/IAP/USB_UART/CH32V20x_IAP/User/ch32v20x_usbotg_device.c → EVT/EXAM/IAP/USB_UART/CH32V20x_IAP/User/ch32v20x_usbfs_device.c
+104 -108
View File
@@ -1,15 +1,15 @@
/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v20x_usbotg_device.c
* File Name : ch32v20x_usbfs_device.c
* Author : WCH
* Version : V1.0.0
* Date : 2021/06/06
* Description : This file provides all the USBOTG firmware functions.
* Date : 2024/01/06
* Description : This file provides all the USBFS firmware functions.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "ch32v20x_usbotg_device.h"
#include "ch32v20x_usbfs_device.h"
#include "iap.h"
/* Global define */
/* OTH */
@@ -33,10 +33,10 @@ PUINT8 pEP2_RAM_Addr; //ep2_out(64)+ep2_in(64)
const UINT8 *pDescr;
volatile UINT16 USBHD_Dev_SetupReqLen = 0x00;
volatile UINT8 USBHD_Dev_Config = 0x00;
volatile UINT8 USBHD_Dev_Address = 0x00;
volatile UINT8 USBHD_Dev_SleepStatus = 0x00;
volatile UINT16 USBFS_Dev_SetupReqLen = 0x00;
volatile UINT8 USBFS_Dev_Config = 0x00;
volatile UINT8 USBFS_Dev_Address = 0x00;
volatile UINT8 USBFS_Dev_SleepStatus = 0x00;
volatile UINT8 DevConfig;
volatile UINT8 SetupReqCode;
volatile UINT16 SetupReqLen;
@@ -52,10 +52,10 @@ const UINT8 MyCfgDescrHD[] = { 0x09, 0x02, 0x20, 0x00, 0x01, 0x01, 0x00, 0x80,
0x32, 0x09, 0x04, 0x00, 0x00, 0x02, 0xFF, 0x80, 0x55, 0x00, 0x07, 0x05,
0x82, 0x02, 0x40, 0x00, 0x00, 0x07, 0x05, 0x02, 0x02, 0x40, 0x00, 0x00 };
void USBHD_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void USBFS_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
/*********************************************************************
* @fn USBOTG_FS_DeviceInit
* @fn USBFSD_DeviceInit
*
* @brief Initializes USB device.
*
@@ -63,86 +63,86 @@ void USBHD_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
*/
void USBDeviceInit( void )
{
USBOTG_FS->BASE_CTRL = 0x00;
USBFSD->BASE_CTRL = 0x00;
USBOTG_FS->UEP2_3_MOD = USBHD_UEP2_RX_EN|USBHD_UEP2_TX_EN;
USBOTG_FS->UEP0_DMA = (UINT32)pEP0_RAM_Addr;
USBOTG_FS->UEP2_DMA = (UINT32)pEP2_RAM_Addr;
USBFSD->UEP2_3_MOD = USBFS_UEP2_RX_EN|USBFS_UEP2_TX_EN;
USBFSD->UEP0_DMA = (UINT32)pEP0_RAM_Addr;
USBFSD->UEP2_DMA = (UINT32)pEP2_RAM_Addr;
USBOTG_FS->UEP0_RX_CTRL = USBHD_UEP_R_RES_ACK;
USBOTG_FS->UEP1_RX_CTRL = USBHD_UEP_R_RES_NAK;
USBOTG_FS->UEP2_RX_CTRL = USBHD_UEP_R_RES_ACK;
USBOTG_FS->UEP3_RX_CTRL = USBHD_UEP_R_RES_NAK;
USBOTG_FS->UEP4_RX_CTRL = USBHD_UEP_R_RES_NAK;
USBOTG_FS->UEP5_RX_CTRL = USBHD_UEP_R_RES_NAK;
USBOTG_FS->UEP6_RX_CTRL = USBHD_UEP_R_RES_NAK;
USBOTG_FS->UEP7_RX_CTRL = USBHD_UEP_R_RES_NAK;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBFSD->UEP1_RX_CTRL = USBFS_UEP_R_RES_NAK;
USBFSD->UEP2_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBFSD->UEP3_RX_CTRL = USBFS_UEP_R_RES_NAK;
USBFSD->UEP4_RX_CTRL = USBFS_UEP_R_RES_NAK;
USBFSD->UEP5_RX_CTRL = USBFS_UEP_R_RES_NAK;
USBFSD->UEP6_RX_CTRL = USBFS_UEP_R_RES_NAK;
USBFSD->UEP7_RX_CTRL = USBFS_UEP_R_RES_NAK;
USBOTG_FS->UEP2_TX_LEN = 8;
USBOTG_FS->UEP0_TX_CTRL = USBHD_UEP_T_RES_NAK;
USBOTG_FS->UEP2_TX_CTRL = USBHD_UEP_T_RES_ACK|USBHD_UEP_AUTO_TOG;
USBFSD->UEP2_TX_LEN = 8;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBFSD->UEP2_TX_CTRL = USBFS_UEP_T_RES_ACK|USBFS_UEP_AUTO_TOG;
USBOTG_FS->INT_FG = 0xFF;
USBOTG_FS->INT_EN = USBHD_UIE_SUSPEND | USBHD_UIE_BUS_RST | USBHD_UIE_TRANSFER;
USBOTG_FS->DEV_ADDR = 0x00;
USBFSD->INT_FG = 0xFF;
USBFSD->INT_EN = USBFS_UIE_SUSPEND | USBFS_UIE_BUS_RST | USBFS_UIE_TRANSFER;
USBFSD->DEV_ADDR = 0x00;
USBOTG_FS->BASE_CTRL = USBHD_UC_DEV_PU_EN | USBHD_UC_INT_BUSY | USBHD_UC_DMA_EN;
USBOTG_FS->UDEV_CTRL = USBHD_UD_PD_DIS|USBHD_UD_PORT_EN;
USBFSD->BASE_CTRL = USBFS_UC_DEV_PU_EN | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
USBFSD->UDEV_CTRL = USBFS_UD_PD_DIS|USBFS_UD_PORT_EN;
}
/*********************************************************************
* @fn USBOTG_RCC_Init
* @fn USBFS_RCC_Init
*
* @brief Initializes the usbotg clock configuration.
* @brief Initializes the USB clock configuration.
*
* @return none
*/
void USBOTG_RCC_Init(void)
void USBFS_RCC_Init(void)
{
RCC_USBCLKConfig(RCC_USBCLKSource_PLLCLK_Div2);
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_OTG_FS, ENABLE );
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_USBFS, ENABLE );
}
/*********************************************************************
* @fn USBOTG_Init
* @fn USBFS_Init
*
* @brief Initializes the USBOTG full speed device.
* @brief Initializes the USB full speed device.
*
* @return none
*/
void USBOTG_Init( void )
void USBFS_Init( void )
{
pEP0_RAM_Addr = EP0_DatabufHD;
pEP2_RAM_Addr = EP2_DatabufHD;
USBOTG_RCC_Init( );
USBFS_RCC_Init( );
Delay_Us(100);
USBDeviceInit( );
NVIC_EnableIRQ( USBHD_IRQn );
NVIC_EnableIRQ( USBFS_IRQn );
}
/*********************************************************************
* @fn USBHD_IRQHandler
* @fn USBFS_IRQHandler
*
* @brief This function handles OTG_FS exception.
*
* @return none
*/
void USBHD_IRQHandler( void )
void USBFS_IRQHandler( void )
{
UINT8 len, chtype;
UINT8 intflag, errflag = 0;
intflag = USBOTG_FS->INT_FG;
intflag = USBFSD->INT_FG;
if( intflag & USBHD_UIF_TRANSFER )
if( intflag & USBFS_UIF_TRANSFER )
{
switch ( USBOTG_FS->INT_ST & USBHD_UIS_TOKEN_MASK )
switch ( USBFSD->INT_ST & USBFS_UIS_TOKEN_MASK )
{
/* SETUP */
case USBHD_UIS_TOKEN_SETUP:
case USBFS_UIS_TOKEN_SETUP:
USBOTG_FS->UEP0_TX_CTRL = USBHD_UEP_T_TOG|USBHD_UEP_T_RES_NAK;
USBOTG_FS->UEP0_RX_CTRL = USBHD_UEP_R_TOG|USBHD_UEP_R_RES_ACK;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_NAK;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_ACK;
SetupReqLen = pSetupReqPakHD->wLength;
SetupReqCode = pSetupReqPakHD->bRequest;
chtype = pSetupReqPakHD->bRequestType;
@@ -188,7 +188,7 @@ void USBHD_IRQHandler( void )
{
SetupReqLen = len;
}
len = ( USBHD_Dev_SetupReqLen >= DevEP0SIZE ) ? DevEP0SIZE : USBHD_Dev_SetupReqLen;
len = ( USBFS_Dev_SetupReqLen >= DevEP0SIZE ) ? DevEP0SIZE : USBFS_Dev_SetupReqLen;
memcpy( EP0_DatabufHD, pDescr, len );
pDescr += len;
}
@@ -276,19 +276,19 @@ void USBHD_IRQHandler( void )
switch( (pSetupReqPakHD->wIndex)&0xff )
{
case 0x82:
USBOTG_FS->UEP2_TX_CTRL = (USBOTG_FS->UEP2_TX_CTRL & ~( USBHD_UEP_T_TOG|USBHD_UEP_T_RES_MASK )) | USBHD_UEP_T_RES_NAK;
USBFSD->UEP2_TX_CTRL = (USBFSD->UEP2_TX_CTRL & ~( USBFS_UEP_T_TOG|USBFS_UEP_T_RES_MASK )) | USBFS_UEP_T_RES_NAK;
break;
case 0x02:
USBOTG_FS->UEP2_RX_CTRL = (USBOTG_FS->UEP2_RX_CTRL & ~( USBHD_UEP_R_TOG|USBHD_UEP_R_RES_MASK )) | USBHD_UEP_R_RES_ACK;
USBFSD->UEP2_RX_CTRL = (USBFSD->UEP2_RX_CTRL & ~( USBFS_UEP_R_TOG|USBFS_UEP_R_RES_MASK )) | USBFS_UEP_R_RES_ACK;
break;
case 0x81:
USBOTG_FS->UEP1_TX_CTRL = (USBOTG_FS->UEP1_TX_CTRL & ~( USBHD_UEP_T_TOG|USBHD_UEP_T_RES_MASK )) | USBHD_UEP_T_RES_NAK;
USBFSD->UEP1_TX_CTRL = (USBFSD->UEP1_TX_CTRL & ~( USBFS_UEP_T_TOG|USBFS_UEP_T_RES_MASK )) | USBFS_UEP_T_RES_NAK;
break;
case 0x01:
USBOTG_FS->UEP1_RX_CTRL = (USBOTG_FS->UEP1_RX_CTRL & ~( USBHD_UEP_R_TOG|USBHD_UEP_R_RES_MASK )) | USBHD_UEP_R_RES_ACK;
USBFSD->UEP1_RX_CTRL = (USBFSD->UEP1_RX_CTRL & ~( USBFS_UEP_R_TOG|USBFS_UEP_R_RES_MASK )) | USBFS_UEP_R_RES_ACK;
break;
default:
@@ -307,7 +307,7 @@ void USBHD_IRQHandler( void )
{
if( MyCfgDescrHD[ 7 ] & 0x20 )
{
USBHD_Dev_SleepStatus = 0x01;
USBFS_Dev_SleepStatus = 0x01;
}
else
{
@@ -326,11 +326,11 @@ void USBHD_IRQHandler( void )
switch( ( pMySetupReqPakHD->wIndex ) & 0xff )
{
case 0x82:
USBOTG_FS->UEP2_TX_CTRL = ( USBOTG_FS->UEP2_TX_CTRL &= ~USBHD_UEP_T_RES_MASK ) | USBHD_UEP_T_RES_STALL;
USBFSD->UEP2_TX_CTRL = ( USBFSD->UEP2_TX_CTRL &= ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
break;
case 0x02:
USBOTG_FS->UEP2_RX_CTRL = ( USBOTG_FS->UEP2_RX_CTRL &= ~USBHD_UEP_R_RES_MASK ) | USBHD_UEP_R_RES_STALL;
USBFSD->UEP2_RX_CTRL = ( USBFSD->UEP2_RX_CTRL &= ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
break;
default:
@@ -356,9 +356,9 @@ void USBHD_IRQHandler( void )
case USB_SET_INTERFACE:
EP0_DatabufHD[ 0 ] = 0x00;
if( USBHD_Dev_SetupReqLen > 1 )
if( USBFS_Dev_SetupReqLen > 1 )
{
USBHD_Dev_SetupReqLen = 1;
USBFS_Dev_SetupReqLen = 1;
}
break;
@@ -367,35 +367,35 @@ void USBHD_IRQHandler( void )
EP0_DatabufHD[ 1 ] = 0x00;
if( pMySetupReqPakHD->wIndex == 0x81 )
{
if( ( USBOTG_FS->UEP1_TX_CTRL & USBHD_UEP_T_RES_MASK ) == USBHD_UEP_T_RES_STALL )
if( ( USBFSD->UEP1_TX_CTRL & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
{
EP0_DatabufHD[ 0 ] = 0x01;
}
}
else if( pMySetupReqPakHD->wIndex == 0x01 )
{
if( ( USBOTG_FS->UEP1_RX_CTRL & USBHD_UEP_R_RES_MASK ) == USBHD_UEP_R_RES_STALL )
if( ( USBFSD->UEP1_RX_CTRL & USBFS_UEP_R_RES_MASK ) == USBFS_UEP_R_RES_STALL )
{
EP0_DatabufHD[ 0 ] = 0x01;
}
}
else if( pMySetupReqPakHD->wIndex == 0x82 )
{
if( ( USBOTG_FS->UEP2_TX_CTRL & USBHD_UEP_T_RES_MASK ) == USBHD_UEP_T_RES_STALL )
if( ( USBFSD->UEP2_TX_CTRL & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
{
EP0_DatabufHD[ 0 ] = 0x01;
}
}
else if( pMySetupReqPakHD->wIndex == 0x02 )
{
if( ( USBOTG_FS->UEP2_RX_CTRL & USBHD_UEP_R_RES_MASK ) == USBHD_UEP_R_RES_STALL )
if( ( USBFSD->UEP2_RX_CTRL & USBFS_UEP_R_RES_MASK ) == USBFS_UEP_R_RES_STALL )
{
EP0_DatabufHD[ 0 ] = 0x01;
}
}
if( USBHD_Dev_SetupReqLen > 2 )
if( USBFS_Dev_SetupReqLen > 2 )
{
USBHD_Dev_SetupReqLen = 2;
USBFS_Dev_SetupReqLen = 2;
}
break;
@@ -406,8 +406,8 @@ void USBHD_IRQHandler( void )
}
if( errflag == 0xff)
{
USBOTG_FS->UEP0_TX_CTRL = USBHD_UEP_T_TOG|USBHD_UEP_T_RES_STALL;
USBOTG_FS->UEP0_RX_CTRL = USBHD_UEP_R_TOG|USBHD_UEP_R_RES_STALL;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_STALL;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_STALL;
}
else
{
@@ -418,16 +418,16 @@ void USBHD_IRQHandler( void )
}
else len = 0;
USBOTG_FS->UEP0_TX_LEN = len;
USBOTG_FS->UEP0_TX_CTRL = USBHD_UEP_T_TOG|USBHD_UEP_T_RES_ACK;
USBOTG_FS->UEP0_RX_CTRL = USBHD_UEP_R_TOG|USBHD_UEP_R_RES_ACK;
USBFSD->UEP0_TX_LEN = len;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_ACK;
}
break;
case USBHD_UIS_TOKEN_IN:
switch ( USBOTG_FS->INT_ST & ( USBHD_UIS_TOKEN_MASK | USBHD_UIS_ENDP_MASK ) )
case USBFS_UIS_TOKEN_IN:
switch ( USBFSD->INT_ST & ( USBFS_UIS_TOKEN_MASK | USBFS_UIS_ENDP_MASK ) )
{
case USBHD_UIS_TOKEN_IN:
case USBFS_UIS_TOKEN_IN:
switch( SetupReqCode )
{
case USB_GET_DESCRIPTOR:
@@ -435,30 +435,30 @@ void USBHD_IRQHandler( void )
memcpy( pEP0_DataBuf, pDescr, len );
SetupReqLen -= len;
pDescr += len;
USBOTG_FS->UEP0_TX_LEN = len;
USBOTG_FS->UEP0_TX_CTRL ^= USBHD_UEP_T_TOG;
USBFSD->UEP0_TX_LEN = len;
USBFSD->UEP0_TX_CTRL ^= USBFS_UEP_T_TOG;
break;
case USB_SET_ADDRESS:
USBOTG_FS->DEV_ADDR = (USBOTG_FS->DEV_ADDR&USBHD_UDA_GP_BIT) | SetupReqLen;
USBOTG_FS->UEP0_TX_CTRL = USBHD_UEP_T_RES_NAK;
USBOTG_FS->UEP0_RX_CTRL = USBHD_UEP_R_RES_ACK;
USBFSD->DEV_ADDR = (USBFSD->DEV_ADDR&USBFS_UDA_GP_BIT) | SetupReqLen;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_RES_ACK;
break;
default:
USBOTG_FS->UEP0_TX_LEN = 0;
USBOTG_FS->UEP0_TX_CTRL = USBHD_UEP_T_RES_NAK;
USBOTG_FS->UEP0_RX_CTRL = USBHD_UEP_R_RES_ACK;
USBFSD->UEP0_TX_LEN = 0;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_RES_ACK;
break;
}
break;
case USBHD_UIS_TOKEN_IN | 2:
case USBFS_UIS_TOKEN_IN | 2:
USBOTG_FS->UEP2_TX_CTRL ^= USBHD_UEP_T_TOG;
USBOTG_FS->UEP2_TX_CTRL = (USBOTG_FS->UEP2_TX_CTRL & ~USBHD_UEP_T_RES_MASK) | USBHD_UEP_T_RES_NAK;
USBFSD->UEP2_TX_CTRL ^= USBFS_UEP_T_TOG;
USBFSD->UEP2_TX_CTRL = (USBFSD->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
break;
default :
break;
@@ -466,18 +466,18 @@ void USBHD_IRQHandler( void )
}
break;
case USBHD_UIS_TOKEN_OUT:
switch ( USBOTG_FS->INT_ST & ( USBHD_UIS_TOKEN_MASK | USBHD_UIS_ENDP_MASK ) )
case USBFS_UIS_TOKEN_OUT:
switch ( USBFSD->INT_ST & ( USBFS_UIS_TOKEN_MASK | USBFS_UIS_ENDP_MASK ) )
{
case USBHD_UIS_TOKEN_OUT:
len = USBOTG_FS->RX_LEN;
case USBFS_UIS_TOKEN_OUT:
len = USBFSD->RX_LEN;
break;
case USBHD_UIS_TOKEN_OUT | 2:
if ( USBOTG_FS->INT_ST & USBHD_UIS_TOG_OK )
case USBFS_UIS_TOKEN_OUT | 2:
if ( USBFSD->INT_ST & USBFS_UIS_TOG_OK )
{
USBOTG_FS->UEP2_RX_CTRL ^= USBHD_UEP_R_TOG;
len = USBOTG_FS->RX_LEN;
USBFSD->UEP2_RX_CTRL ^= USBFS_UEP_R_TOG;
len = USBFSD->RX_LEN;
DevEP2_OUT_Deal( len );
}
break;
@@ -485,35 +485,31 @@ void USBHD_IRQHandler( void )
break;
case USBHD_UIS_TOKEN_SOF:
break;
default :
break;
}
USBOTG_FS->INT_FG = USBHD_UIF_TRANSFER;
USBFSD->INT_FG = USBFS_UIF_TRANSFER;
}
else if( intflag & USBHD_UIF_BUS_RST )
else if( intflag & USBFS_UIF_BUS_RST )
{
USBOTG_FS->DEV_ADDR = 0;
USBOTG_FS->UEP0_RX_CTRL = USBHD_UEP_R_RES_ACK;
USBOTG_FS->UEP2_RX_CTRL = USBHD_UEP_R_RES_ACK;
USBOTG_FS->UEP0_TX_CTRL = USBHD_UEP_T_RES_NAK;
USBOTG_FS->UEP2_TX_CTRL = USBHD_UEP_T_RES_NAK;
USBOTG_FS->INT_FG |= USBHD_UIF_BUS_RST;
USBFSD->DEV_ADDR = 0;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBFSD->UEP2_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBFSD->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBFSD->INT_FG |= USBFS_UIF_BUS_RST;
}
else if( intflag & USBHD_UIF_SUSPEND )
else if( intflag & USBFS_UIF_SUSPEND )
{
if ( USBOTG_FS->MIS_ST & USBHD_UMS_SUSPEND ) {;}
if ( USBFSD->MIS_ST & USBFS_UMS_SUSPEND ) {;}
else{;}
USBOTG_FS->INT_FG = USBHD_UIF_SUSPEND;
USBFSD->INT_FG = USBFS_UIF_SUSPEND;
}
else
{
USBOTG_FS->INT_FG = intflag;
USBFSD->INT_FG = intflag;
}
}
@@ -529,8 +525,8 @@ void USBHD_IRQHandler( void )
*/
void DevEP2_IN_Deal( UINT8 l )
{
USBOTG_FS->UEP2_TX_LEN = l;
USBOTG_FS->UEP2_TX_CTRL = (USBOTG_FS->UEP2_TX_CTRL & ~USBHD_UEP_T_RES_MASK)| USBHD_UEP_T_RES_ACK;
USBFSD->UEP2_TX_LEN = l;
USBFSD->UEP2_TX_CTRL = (USBFSD->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK)| USBFS_UEP_T_RES_ACK;
}
/*********************************************************************
EVT/EXAM/IAP/USB_UART/CH32V20x_IAP/User/ch32v20x_usbotg_device.h → EVT/EXAM/IAP/USB_UART/CH32V20x_IAP/User/ch32v20x_usbfs_device.h
+180 -183
View File
@@ -1,16 +1,16 @@
/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v20x_usbotg_device.h
* File Name : ch32v20x_usbfs_device.h
* Author : WCH
* Version : V1.0.0
* Date : 2021/06/06
* Description : This file provides all the USBOTG firmware functions.
* Description : This file provides all the USBFS firmware functions.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH32V20x_USBOTG_DEVICE_H_
#define __CH32V20x_USBOTG_DEVICE_H_
#ifndef __CH32V20x_USBFS_DEVICE_H_
#define __CH32V20x_USBFS_DEVICE_H_
#include "debug.h"
#include "string.h"
@@ -388,19 +388,19 @@ typedef struct __PACKED _UDISK_BOC_CSW {/* status of BulkOnly USB-FlashDisk */
#define USE_SYS_CLK 0
//#define USBHD_HOST 0
//#define USBFS_HOST 0
//#define USB_OTG 0
/******************************************************************************/
/* USBOTG_FS DEVICE USB_CONTROL */
/* USBFSD DEVICE USB_CONTROL */
/* BASE USB_CTRL */
#define USBHD_BASE_CTRL (USBOTG_FS->BASE_CTRL) // USB base control
#define USBHD_UC_HOST_MODE 0x80 // enable USB host mode: 0=device mode, 1=host mode
#define USBHD_UC_LOW_SPEED 0x40 // enable USB low speed: 0=12Mbps, 1=1.5Mbps
#define USBHD_UC_DEV_PU_EN 0x20 // USB device enable and internal pullup resistance enable
#define USBHD_UC_SYS_CTRL1 0x20 // USB system control high bit
#define USBHD_UC_SYS_CTRL0 0x10 // USB system control low bit
#define USBHD_UC_SYS_CTRL_MASK 0x30 // bit mask of USB system control
#define USBFS_BASE_CTRL (USBFSD->BASE_CTRL) // USB base control
#define USBFS_UC_HOST_MODE 0x80 // enable USB host mode: 0=device mode, 1=host mode
#define USBFS_UC_LOW_SPEED 0x40 // enable USB low speed: 0=12Mbps, 1=1.5Mbps
#define USBFS_UC_DEV_PU_EN 0x20 // USB device enable and internal pullup resistance enable
#define USBFS_UC_SYS_CTRL1 0x20 // USB system control high bit
#define USBFS_UC_SYS_CTRL0 0x10 // USB system control low bit
#define USBFS_UC_SYS_CTRL_MASK 0x30 // bit mask of USB system control
// UC_HOST_MODE & UC_SYS_CTRL1 & UC_SYS_CTRL0: USB system control
// 0 00: disable USB device and disable internal pullup resistance
// 0 01: enable USB device and disable internal pullup resistance, need external pullup resistance
@@ -409,79 +409,76 @@ typedef struct __PACKED _UDISK_BOC_CSW {/* status of BulkOnly USB-FlashDisk */
// 1 01: enable USB host and force UDP/UDM output SE0 state
// 1 10: enable USB host and force UDP/UDM output J state
// 1 11: enable USB host and force UDP/UDM output resume or K state
#define USBHD_UC_INT_BUSY 0x08 // enable automatic responding busy for device mode or automatic pause for host mode during interrupt flag UIF_TRANSFER valid
#define USBHD_UC_RESET_SIE 0x04 // force reset USB SIE, need software clear
#define USBHD_UC_CLR_ALL 0x02 // force clear FIFO and count of USB
#define USBHD_UC_DMA_EN 0x01 // DMA enable and DMA interrupt enable for USB
#define USBFS_UC_INT_BUSY 0x08 // enable automatic responding busy for device mode or automatic pause for host mode during interrupt flag UIF_TRANSFER valid
#define USBFS_UC_RESET_SIE 0x04 // force reset USB SIE, need software clear
#define USBFS_UC_CLR_ALL 0x02 // force clear FIFO and count of USB
#define USBFS_UC_DMA_EN 0x01 // DMA enable and DMA interrupt enable for USB
/* DEVICE USB_CTRL */
#define USBHD_UDEV_CTRL (USBOTG_FS->UDEV_CTRL) // USB device physical prot control
#define USBHD_UD_PD_DIS 0x80 // disable USB UDP/UDM pulldown resistance: 0=enable pulldown, 1=disable
#define USBHD_UD_DP_PIN 0x20 // ReadOnly: indicate current UDP pin level
#define USBHD_UD_DM_PIN 0x10 // ReadOnly: indicate current UDM pin level
#define USBHD_UD_LOW_SPEED 0x04 // enable USB physical port low speed: 0=full speed, 1=low speed
#define USBHD_UD_GP_BIT 0x02 // general purpose bit
#define USBHD_UD_PORT_EN 0x01 // enable USB physical port I/O: 0=disable, 1=enable
#define USBFS_UDEV_CTRL (USBFSD->UDEV_CTRL) // USB device physical prot control
#define USBFS_UD_PD_DIS 0x80 // disable USB UDP/UDM pulldown resistance: 0=enable pulldown, 1=disable
#define USBFS_UD_DP_PIN 0x20 // ReadOnly: indicate current UDP pin level
#define USBFS_UD_DM_PIN 0x10 // ReadOnly: indicate current UDM pin level
#define USBFS_UD_LOW_SPEED 0x04 // enable USB physical port low speed: 0=full speed, 1=low speed
#define USBFS_UD_GP_BIT 0x02 // general purpose bit
#define USBFS_UD_PORT_EN 0x01 // enable USB physical port I/O: 0=disable, 1=enable
/* USB INT EN */
#define USBHD_INT_EN (USBOTG_FS->INT_EN) // USB interrupt enable
#define USBHD_UIE_DEV_SOF 0x80 // enable interrupt for SOF received for USB device mode
#define USBHD_UIE_DEV_NAK 0x40 // enable interrupt for NAK responded for USB device mode
#define USBHD_UIE_FIFO_OV 0x10 // enable interrupt for FIFO overflow
#define USBHD_UIE_HST_SOF 0x08 // enable interrupt for host SOF timer action for USB host mode
#define USBHD_UIE_SUSPEND 0x04 // enable interrupt for USB suspend or resume event
#define USBHD_UIE_TRANSFER 0x02 // enable interrupt for USB transfer completion
#define USBHD_UIE_DETECT 0x01 // enable interrupt for USB device detected event for USB host mode
#define USBHD_UIE_BUS_RST 0x01 // enable interrupt for USB bus reset event for USB device mode
#define USBFS_INT_EN (USBFSD->INT_EN) // USB interrupt enable
#define USBFS_UIE_DEV_NAK 0x40 // enable interrupt for NAK responded for USB device mode
#define USBFS_UIE_FIFO_OV 0x10 // enable interrupt for FIFO overflow
#define USBFS_UIE_HST_SOF 0x08 // enable interrupt for host SOF timer action for USB host mode
#define USBFS_UIE_SUSPEND 0x04 // enable interrupt for USB suspend or resume event
#define USBFS_UIE_TRANSFER 0x02 // enable interrupt for USB transfer completion
#define USBFS_UIE_DETECT 0x01 // enable interrupt for USB device detected event for USB host mode
#define USBFS_UIE_BUS_RST 0x01 // enable interrupt for USB bus reset event for USB device mode
/* USB_DEV_ADDR */
#define USBHD_DEV_ADDR (USBOTG_FS->DEV_ADDR) // USB device address
#define USBHD_UDA_GP_BIT 0x80 // general purpose bit
#define USBHD_USB_ADDR_MASK 0x7F // bit mask for USB device address
/* USBOTG_FS DEVICE USB_STATUS */
#define USBFS_DEV_ADDR (USBFSD->DEV_ADDR) // USB device address
#define USBFS_UDA_GP_BIT 0x80 // general purpose bit
#define USBFS_USB_ADDR_MASK 0x7F // bit mask for USB device address
/* USBFSD DEVICE USB_STATUS */
/* USB_MIS_ST */
#define USBHD_MIS_ST (USBOTG_FS->MIS_ST) // USB miscellaneous status
#define USBHD_UMS_SOF_PRES 0x80 // RO, indicate host SOF timer presage status
#define USBHD_UMS_SOF_ACT 0x40 // RO, indicate host SOF timer action status for USB host
#define USBHD_UMS_SIE_FREE 0x20 // RO, indicate USB SIE free status
#define USBHD_UMS_R_FIFO_RDY 0x10 // RO, indicate USB receiving FIFO ready status (not empty)
#define USBHD_UMS_BUS_RESET 0x08 // RO, indicate USB bus reset status
#define USBHD_UMS_SUSPEND 0x04 // RO, indicate USB suspend status
#define USBHD_UMS_DM_LEVEL 0x02 // RO, indicate UDM level saved at device attached to USB host
#define USBHD_UMS_DEV_ATTACH 0x01 // RO, indicate device attached status on USB host
#define USBFS_MIS_ST (USBFSD->MIS_ST) // USB miscellaneous status
#define USBFS_UMS_SOF_PRES 0x80 // RO, indicate host SOF timer presage status
#define USBFS_UMS_SOF_ACT 0x40 // RO, indicate host SOF timer action status for USB host
#define USBFS_UMS_SIE_FREE 0x20 // RO, indicate USB SIE free status
#define USBFS_UMS_R_FIFO_RDY 0x10 // RO, indicate USB receiving FIFO ready status (not empty)
#define USBFS_UMS_BUS_RESET 0x08 // RO, indicate USB bus reset status
#define USBFS_UMS_SUSPEND 0x04 // RO, indicate USB suspend status
#define USBFS_UMS_DM_LEVEL 0x02 // RO, indicate UDM level saved at device attached to USB host
#define USBFS_UMS_DEV_ATTACH 0x01 // RO, indicate device attached status on USB host
/* USB_INT_FG */
#define USBHD_INT_FG (USBOTG_FS->INT_FG) // USB interrupt flag
#define USBHD_U_IS_NAK 0x80 // RO, indicate current USB transfer is NAK received
#define USBHD_U_TOG_OK 0x40 // RO, indicate current USB transfer toggle is OK
#define USBHD_U_SIE_FREE 0x20 // RO, indicate USB SIE free status
#define USBHD_UIF_FIFO_OV 0x10 // FIFO overflow interrupt flag for USB, direct bit address clear or write 1 to clear
#define USBHD_UIF_HST_SOF 0x08 // host SOF timer interrupt flag for USB host, direct bit address clear or write 1 to clear
#define USBHD_UIF_SUSPEND 0x04 // USB suspend or resume event interrupt flag, direct bit address clear or write 1 to clear
#define USBHD_UIF_TRANSFER 0x02 // USB transfer completion interrupt flag, direct bit address clear or write 1 to clear
#define USBHD_UIF_DETECT 0x01 // device detected event interrupt flag for USB host mode, direct bit address clear or write 1 to clear
#define USBHD_UIF_BUS_RST 0x01 // bus reset event interrupt flag for USB device mode, direct bit address clear or write 1 to clear
#define USBFS_INT_FG (USBFSD->INT_FG) // USB interrupt flag
#define USBFS_U_IS_NAK 0x80 // RO, indicate current USB transfer is NAK received
#define USBFS_U_TOG_OK 0x40 // RO, indicate current USB transfer toggle is OK
#define USBFS_U_SIE_FREE 0x20 // RO, indicate USB SIE free status
#define USBFS_UIF_FIFO_OV 0x10 // FIFO overflow interrupt flag for USB, direct bit address clear or write 1 to clear
#define USBFS_UIF_HST_SOF 0x08 // host SOF timer interrupt flag for USB host, direct bit address clear or write 1 to clear
#define USBFS_UIF_SUSPEND 0x04 // USB suspend or resume event interrupt flag, direct bit address clear or write 1 to clear
#define USBFS_UIF_TRANSFER 0x02 // USB transfer completion interrupt flag, direct bit address clear or write 1 to clear
#define USBFS_UIF_DETECT 0x01 // device detected event interrupt flag for USB host mode, direct bit address clear or write 1 to clear
#define USBFS_UIF_BUS_RST 0x01 // bus reset event interrupt flag for USB device mode, direct bit address clear or write 1 to clear
/* USB_INT_ST */
#define USBHD_INT_ST (USBOTG_FS->INT_ST) // USB interrupt flag
#define USBHD_UIS_IS_SETUP 0x80 // RO, indicate current USB transfer is setup received for USB device mode
#define USBHD_UIS_IS_NAK 0x80 // RO, indicate current USB transfer is NAK received for USB device mode
#define USBHD_UIS_TOG_OK 0x40 // RO, indicate current USB transfer toggle is OK
#define USBHD_UIS_TOKEN1 0x20 // RO, current token PID code bit 1 received for USB device mode
#define USBHD_UIS_TOKEN0 0x10 // RO, current token PID code bit 0 received for USB device mode
#define USBHD_UIS_TOKEN_MASK 0x30 // RO, bit mask of current token PID code received for USB device mode
#define USBHD_UIS_TOKEN_OUT 0x00
#define USBHD_UIS_TOKEN_SOF 0x10
#define USBHD_UIS_TOKEN_IN 0x20
#define USBHD_UIS_TOKEN_SETUP 0x30
#define USBFS_INT_ST (USBFSD->INT_ST) // USB interrupt flag
#define USBFS_UIS_IS_SETUP 0x80 // RO, indicate current USB transfer is setup received for USB device mode
#define USBFS_UIS_IS_NAK 0x80 // RO, indicate current USB transfer is NAK received for USB device mode
#define USBFS_UIS_TOG_OK 0x40 // RO, indicate current USB transfer toggle is OK
#define USBFS_UIS_TOKEN1 0x20 // RO, current token PID code bit 1 received for USB device mode
#define USBFS_UIS_TOKEN0 0x10 // RO, current token PID code bit 0 received for USB device mode
#define USBFS_UIS_TOKEN_MASK 0x30 // RO, bit mask of current token PID code received for USB device mode
#define USBFS_UIS_TOKEN_OUT 0x00
#define USBFS_UIS_TOKEN_IN 0x20
#define USBFS_UIS_TOKEN_SETUP 0x30
// UIS_TOKEN1 & UIS_TOKEN0: current token PID code received for USB device mode
// 00: OUT token PID received
// 01: SOF token PID received
// 10: IN token PID received
// 11: SETUP token PID received
#define USBHD_UIS_ENDP_MASK 0x0F // RO, bit mask of current transfer endpoint number for USB device mode
#define USBFS_UIS_ENDP_MASK 0x0F // RO, bit mask of current transfer endpoint number for USB device mode
/* USB_RX_LEN */
#define USBHD_RX_LEN (USBOTG_FS->Rx_Len) // USB receiving length
#define USBFS_RX_LEN (USBFSD->Rx_Len) // USB receiving length
/* USB_BUF_MOD */
#define USBHD_UEP4_1_MOD (USBOTG_FS->UEP4_1_MOD) // endpoint 4/1 mode
#define USBHD_UEP1_RX_EN 0x80 // enable USB endpoint 1 receiving (OUT)
#define USBHD_UEP1_TX_EN 0x40 // enable USB endpoint 1 transmittal (IN)
#define USBHD_UEP1_BUF_MOD 0x10 // buffer mode of USB endpoint 1
#define USBFS_UEP4_1_MOD (USBFSD->UEP4_1_MOD) // endpoint 4/1 mode
#define USBFS_UEP1_RX_EN 0x80 // enable USB endpoint 1 receiving (OUT)
#define USBFS_UEP1_TX_EN 0x40 // enable USB endpoint 1 transmittal (IN)
#define USBFS_UEP1_BUF_MOD 0x10 // buffer mode of USB endpoint 1
// UEPn_RX_EN & UEPn_TX_EN & UEPn_BUF_MOD: USB endpoint 1/2/3 buffer mode, buffer start address is UEPn_DMA
// 0 0 x: disable endpoint and disable buffer
// 1 0 0: 64 bytes buffer for receiving (OUT endpoint)
@@ -490,8 +487,8 @@ typedef struct __PACKED _UDISK_BOC_CSW {/* status of BulkOnly USB-FlashDisk */
// 0 1 1: dual 64 bytes buffer by toggle bit bUEP_T_TOG selection for transmittal (IN endpoint), total=128bytes
// 1 1 0: 64 bytes buffer for receiving (OUT endpoint) + 64 bytes buffer for transmittal (IN endpoint), total=128bytes
// 1 1 1: dual 64 bytes buffer by bUEP_R_TOG selection for receiving (OUT endpoint) + dual 64 bytes buffer by bUEP_T_TOG selection for transmittal (IN endpoint), total=256bytes
#define USBHD_UEP4_RX_EN 0x08 // enable USB endpoint 4 receiving (OUT)
#define USBHD_UEP4_TX_EN 0x04 // enable USB endpoint 4 transmittal (IN)
#define USBFS_UEP4_RX_EN 0x08 // enable USB endpoint 4 receiving (OUT)
#define USBFS_UEP4_TX_EN 0x04 // enable USB endpoint 4 transmittal (IN)
// UEP4_RX_EN & UEP4_TX_EN: USB endpoint 4 buffer mode, buffer start address is UEP0_DMA
// 0 0: single 64 bytes buffer for endpoint 0 receiving & transmittal (OUT & IN endpoint)
// 1 0: single 64 bytes buffer for endpoint 0 receiving & transmittal (OUT & IN endpoint) + 64 bytes buffer for endpoint 4 receiving (OUT endpoint), total=128bytes
@@ -499,152 +496,152 @@ typedef struct __PACKED _UDISK_BOC_CSW {/* status of BulkOnly USB-FlashDisk */
// 1 1: single 64 bytes buffer for endpoint 0 receiving & transmittal (OUT & IN endpoint)
// + 64 bytes buffer for endpoint 4 receiving (OUT endpoint) + 64 bytes buffer for endpoint 4 transmittal (IN endpoint), total=192bytes
#define USBHD_UEP2_3_MOD (USBOTG_FS->UEP2_3_MOD) // endpoint 2/3 mode
#define USBHD_UEP3_RX_EN 0x80 // enable USB endpoint 3 receiving (OUT)
#define USBHD_UEP3_TX_EN 0x40 // enable USB endpoint 3 transmittal (IN)
#define USBHD_UEP3_BUF_MOD 0x10 // buffer mode of USB endpoint 3
#define USBHD_UEP2_RX_EN 0x08 // enable USB endpoint 2 receiving (OUT)
#define USBHD_UEP2_TX_EN 0x04 // enable USB endpoint 2 transmittal (IN)
#define USBHD_UEP2_BUF_MOD 0x01 // buffer mode of USB endpoint 2
#define USBFS_UEP2_3_MOD (USBFSD->UEP2_3_MOD) // endpoint 2/3 mode
#define USBFS_UEP3_RX_EN 0x80 // enable USB endpoint 3 receiving (OUT)
#define USBFS_UEP3_TX_EN 0x40 // enable USB endpoint 3 transmittal (IN)
#define USBFS_UEP3_BUF_MOD 0x10 // buffer mode of USB endpoint 3
#define USBFS_UEP2_RX_EN 0x08 // enable USB endpoint 2 receiving (OUT)
#define USBFS_UEP2_TX_EN 0x04 // enable USB endpoint 2 transmittal (IN)
#define USBFS_UEP2_BUF_MOD 0x01 // buffer mode of USB endpoint 2
#define USBHD_UEP5_6_MOD (USBOTG_FS->UEP5_6_MOD) // endpoint 5/6 mode
#define USBHD_UEP6_RX_EN 0x80 // enable USB endpoint 6 receiving (OUT)
#define USBHD_UEP6_TX_EN 0x40 // enable USB endpoint 6 transmittal (IN)
#define USBHD_UEP6_BUF_MOD 0x10 // buffer mode of USB endpoint 6
#define USBHD_UEP5_RX_EN 0x08 // enable USB endpoint 5 receiving (OUT)
#define USBHD_UEP5_TX_EN 0x04 // enable USB endpoint 5 transmittal (IN)
#define USBHD_UEP5_BUF_MOD 0x01 // buffer mode of USB endpoint 5
#define USBFS_UEP5_6_MOD (USBFSD->UEP5_6_MOD) // endpoint 5/6 mode
#define USBFS_UEP6_RX_EN 0x80 // enable USB endpoint 6 receiving (OUT)
#define USBFS_UEP6_TX_EN 0x40 // enable USB endpoint 6 transmittal (IN)
#define USBFS_UEP6_BUF_MOD 0x10 // buffer mode of USB endpoint 6
#define USBFS_UEP5_RX_EN 0x08 // enable USB endpoint 5 receiving (OUT)
#define USBFS_UEP5_TX_EN 0x04 // enable USB endpoint 5 transmittal (IN)
#define USBFS_UEP5_BUF_MOD 0x01 // buffer mode of USB endpoint 5
#define USBHD_UEP7_MOD (USBOTG_FS->UEP7_MOD) // endpoint 7 mode
#define USBHD_UEP7_RX_EN 0x08 // enable USB endpoint 7 receiving (OUT)
#define USBHD_UEP7_TX_EN 0x04 // enable USB endpoint 7 transmittal (IN)
#define USBHD_UEP7_BUF_MOD 0x01 // buffer mode of USB endpoint 7
#define USBFS_UEP7_MOD (USBFSD->UEP7_MOD) // endpoint 7 mode
#define USBFS_UEP7_RX_EN 0x08 // enable USB endpoint 7 receiving (OUT)
#define USBFS_UEP7_TX_EN 0x04 // enable USB endpoint 7 transmittal (IN)
#define USBFS_UEP7_BUF_MOD 0x01 // buffer mode of USB endpoint 7
/* USB_DMA */
#define USBHD_UEP0_DMA (USBOTG_FS->UEP0_DMA) // endpoint 0 DMA buffer address
//#define USBHD_UEP1_DMA (USBOTG_FS->UEP1_DMA) // endpoint 1 DMA buffer address
#define USBHD_UEP2_DMA (USBOTG_FS->UEP2_DMA) // endpoint 2 DMA buffer address
//#define USBHD_UEP3_DMA (USBOTG_FS->UEP3_DMA) // endpoint 3 DMA buffer address
//#define USBHD_UEP4_DMA (USBOTG_FS->UEP4_DMA) // endpoint 4 DMA buffer address
//#define USBHD_UEP5_DMA (USBOTG_FS->UEP5_DMA) // endpoint 5 DMA buffer address
//#define USBHD_UEP6_DMA (USBOTG_FS->UEP6_DMA) // endpoint 6 DMA buffer address
//#define USBHD_UEP7_DMA (USBOTG_FS->UEP7_DMA) // endpoint 7 DMA buffer address
#define USBFS_UEP0_DMA (USBFSD->UEP0_DMA) // endpoint 0 DMA buffer address
//#define USBFS_UEP1_DMA (USBFSD->UEP1_DMA) // endpoint 1 DMA buffer address
#define USBFS_UEP2_DMA (USBFSD->UEP2_DMA) // endpoint 2 DMA buffer address
//#define USBFS_UEP3_DMA (USBFSD->UEP3_DMA) // endpoint 3 DMA buffer address
//#define USBFS_UEP4_DMA (USBFSD->UEP4_DMA) // endpoint 4 DMA buffer address
//#define USBFS_UEP5_DMA (USBFSD->UEP5_DMA) // endpoint 5 DMA buffer address
//#define USBFS_UEP6_DMA (USBFSD->UEP6_DMA) // endpoint 6 DMA buffer address
//#define USBFS_UEP7_DMA (USBFSD->UEP7_DMA) // endpoint 7 DMA buffer address
/* USB_EP_CTRL */
#define USBHD_UEP0_T_LEN (USBOTG_FS->UEP0_TX_LEN) // endpoint 0 transmittal length
#define USBHD_UEP0_TX_CTRL (USBOTG_FS->UEP0_TX_CTRL) // endpoint 0 control
#define USBHD_UEP0_RX_CTRL (USBOTG_FS->UEP0_RX_CTRL) // endpoint 0 control
#define USBFS_UEP0_T_LEN (USBFSD->UEP0_TX_LEN) // endpoint 0 transmittal length
#define USBFS_UEP0_TX_CTRL (USBFSD->UEP0_TX_CTRL) // endpoint 0 control
#define USBFS_UEP0_RX_CTRL (USBFSD->UEP0_RX_CTRL) // endpoint 0 control
//#define USBHD_UEP1_T_LEN (USBOTG_FS->UEP1_TX_LEN) // endpoint 1 transmittal length
//#define USBHD_UEP1_TX_CTRL (USBOTG_FS->UEP1_TX_CTRL) // endpoint 1 control
//#define USBHD_UEP1_RX_CTRL (USBOTG_FS->UEP1_RX_CTRL) // endpoint 1 control
//#define USBFS_UEP1_T_LEN (USBFSD->UEP1_TX_LEN) // endpoint 1 transmittal length
//#define USBFS_UEP1_TX_CTRL (USBFSD->UEP1_TX_CTRL) // endpoint 1 control
//#define USBFS_UEP1_RX_CTRL (USBFSD->UEP1_RX_CTRL) // endpoint 1 control
#define USBHD_UEP2_T_LEN (USBOTG_FS->UEP2_TX_LEN) // endpoint 2 transmittal length
#define USBHD_UEP2_TX_CTRL (USBOTG_FS->UEP2_TX_CTRL) // endpoint 2 control
#define USBHD_UEP2_RX_CTRL (USBOTG_FS->UEP2_RX_CTRL) // endpoint 2 control
#define USBFS_UEP2_T_LEN (USBFSD->UEP2_TX_LEN) // endpoint 2 transmittal length
#define USBFS_UEP2_TX_CTRL (USBFSD->UEP2_TX_CTRL) // endpoint 2 control
#define USBFS_UEP2_RX_CTRL (USBFSD->UEP2_RX_CTRL) // endpoint 2 control
//#define USBHD_UEP3_T_LEN (USBOTG_FS->UEP3_TX_LEN) // endpoint 3 transmittal length
//#define USBHD_UEP3_TX_CTRL (USBOTG_FS->UEP3_TX_CTRL) // endpoint 3 control
//#define USBHD_UEP3_RX_CTRL (USBOTG_FS->UEP3_RX_CTRL) // endpoint 3 control
//#define USBFS_UEP3_T_LEN (USBFSD->UEP3_TX_LEN) // endpoint 3 transmittal length
//#define USBFS_UEP3_TX_CTRL (USBFSD->UEP3_TX_CTRL) // endpoint 3 control
//#define USBFS_UEP3_RX_CTRL (USBFSD->UEP3_RX_CTRL) // endpoint 3 control
//
//#define USBHD_UEP4_T_LEN (USBOTG_FS->UEP4_TX_LEN) // endpoint 4 transmittal length
//#define USBHD_UEP4_TX_CTRL (USBOTG_FS->UEP4_TX_CTRL) // endpoint 4 control
//#define USBHD_UEP4_RX_CTRL (USBOTG_FS->UEP4_RX_CTRL) // endpoint 4 control
//#define USBFS_UEP4_T_LEN (USBFSD->UEP4_TX_LEN) // endpoint 4 transmittal length
//#define USBFS_UEP4_TX_CTRL (USBFSD->UEP4_TX_CTRL) // endpoint 4 control
//#define USBFS_UEP4_RX_CTRL (USBFSD->UEP4_RX_CTRL) // endpoint 4 control
//
//#define USBHD_UEP5_T_LEN (USBOTG_FS->UEP5_TX_LEN) // endpoint 5 transmittal length
//#define USBHD_UEP5_TX_CTRL (USBOTG_FS->UEP5_TX_CTRL) // endpoint 5 control
//#define USBHD_UEP5_RX_CTRL (USBOTG_FS->UEP5_RX_CTRL) // endpoint 5 control
//#define USBFS_UEP5_T_LEN (USBFSD->UEP5_TX_LEN) // endpoint 5 transmittal length
//#define USBFS_UEP5_TX_CTRL (USBFSD->UEP5_TX_CTRL) // endpoint 5 control
//#define USBFS_UEP5_RX_CTRL (USBFSD->UEP5_RX_CTRL) // endpoint 5 control
//
//#define USBHD_UEP6_T_LEN (USBOTG_FS->UEP6_TX_LEN) // endpoint 6 transmittal length
//#define USBHD_UEP6_TX_CTRL (USBOTG_FS->UEP6_TX_CTRL) // endpoint 6 control
//#define USBHD_UEP6_RX_CTRL (USBOTG_FS->UEP6_RX_CTRL) // endpoint 6 control
//#define USBFS_UEP6_T_LEN (USBFSD->UEP6_TX_LEN) // endpoint 6 transmittal length
//#define USBFS_UEP6_TX_CTRL (USBFSD->UEP6_TX_CTRL) // endpoint 6 control
//#define USBFS_UEP6_RX_CTRL (USBFSD->UEP6_RX_CTRL) // endpoint 6 control
//
//#define USBHD_UEP7_T_LEN (USBOTG_FS->UEP7_TX_LEN) // endpoint 7 transmittal length
//#define USBHD_UEP7_TX_CTRL (USBOTG_FS->UEP7_TX_CTRL) // endpoint 7 control
//#define USBHD_UEP7_RX_CTRL (USBOTG_FS->UEP7_RX_CTRL) // endpoint 7 control
//#define USBFS_UEP7_T_LEN (USBFSD->UEP7_TX_LEN) // endpoint 7 transmittal length
//#define USBFS_UEP7_TX_CTRL (USBFSD->UEP7_TX_CTRL) // endpoint 7 control
//#define USBFS_UEP7_RX_CTRL (USBFSD->UEP7_RX_CTRL) // endpoint 7 control
#define USBHD_UEP_AUTO_TOG 0x08 // enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle
#define USBHD_UEP_R_TOG 0x04 // expected data toggle flag of USB endpoint X receiving (OUT): 0=DATA0, 1=DATA1
#define USBHD_UEP_T_TOG 0x04 // prepared data toggle flag of USB endpoint X transmittal (IN): 0=DATA0, 1=DATA1
#define USBFS_UEP_AUTO_TOG 0x08 // enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle
#define USBFS_UEP_R_TOG 0x04 // expected data toggle flag of USB endpoint X receiving (OUT): 0=DATA0, 1=DATA1
#define USBFS_UEP_T_TOG 0x04 // prepared data toggle flag of USB endpoint X transmittal (IN): 0=DATA0, 1=DATA1
#define USBHD_UEP_R_RES1 0x02 // handshake response type high bit for USB endpoint X receiving (OUT)
#define USBHD_UEP_R_RES0 0x01 // handshake response type low bit for USB endpoint X receiving (OUT)
#define USBHD_UEP_R_RES_MASK 0x03 // bit mask of handshake response type for USB endpoint X receiving (OUT)
#define USBHD_UEP_R_RES_ACK 0x00
#define USBHD_UEP_R_RES_TOUT 0x01
#define USBHD_UEP_R_RES_NAK 0x02
#define USBHD_UEP_R_RES_STALL 0x03
#define USBFS_UEP_R_RES1 0x02 // handshake response type high bit for USB endpoint X receiving (OUT)
#define USBFS_UEP_R_RES0 0x01 // handshake response type low bit for USB endpoint X receiving (OUT)
#define USBFS_UEP_R_RES_MASK 0x03 // bit mask of handshake response type for USB endpoint X receiving (OUT)
#define USBFS_UEP_R_RES_ACK 0x00
#define USBFS_UEP_R_RES_TOUT 0x01
#define USBFS_UEP_R_RES_NAK 0x02
#define USBFS_UEP_R_RES_STALL 0x03
// RB_UEP_R_RES1 & RB_UEP_R_RES0: handshake response type for USB endpoint X receiving (OUT)
// 00: ACK (ready)
// 01: no response, time out to host, for non-zero endpoint isochronous transactions
// 10: NAK (busy)
// 11: STALL (error)
#define USBHD_UEP_T_RES1 0x02 // handshake response type high bit for USB endpoint X transmittal (IN)
#define USBHD_UEP_T_RES0 0x01 // handshake response type low bit for USB endpoint X transmittal (IN)
#define USBHD_UEP_T_RES_MASK 0x03 // bit mask of handshake response type for USB endpoint X transmittal (IN)
#define USBHD_UEP_T_RES_ACK 0x00
#define USBHD_UEP_T_RES_TOUT 0x01
#define USBHD_UEP_T_RES_NAK 0x02
#define USBHD_UEP_T_RES_STALL 0x03
#define USBFS_UEP_T_RES1 0x02 // handshake response type high bit for USB endpoint X transmittal (IN)
#define USBFS_UEP_T_RES0 0x01 // handshake response type low bit for USB endpoint X transmittal (IN)
#define USBFS_UEP_T_RES_MASK 0x03 // bit mask of handshake response type for USB endpoint X transmittal (IN)
#define USBFS_UEP_T_RES_ACK 0x00
#define USBFS_UEP_T_RES_TOUT 0x01
#define USBFS_UEP_T_RES_NAK 0x02
#define USBFS_UEP_T_RES_STALL 0x03
// bUEP_T_RES1 & bUEP_T_RES0: handshake response type for USB endpoint X transmittal (IN)
// 00: DATA0 or DATA1 then expecting ACK (ready)
// 01: DATA0 or DATA1 then expecting no response, time out from host, for non-zero endpoint isochronous transactions
// 10: NAK (busy)
// 11: TALL (error)
#ifdef USBHD_HOST
/* USBOTG_FS HOST CONTROL&CFG */
#ifdef USBFS_HOST
/* USBFSD HOST CONTROL&CFG */
/* HOST USB_CTRL */
#define USBHD_UHOST_CTRL (USBOTG_FS->UDEV_CTRL) // USB host physical prot control
#define USBHD_UH_PD_DIS 0x80 // disable USB UDP/UDM pulldown resistance: 0=enable pulldown, 1=disable
#define USBHD_UH_DP_PIN 0x20 // ReadOnly: indicate current UDP pin level
#define USBHD_UH_DM_PIN 0x10 // ReadOnly: indicate current UDM pin level
#define USBHD_UH_LOW_SPEED 0x04 // enable USB port low speed: 0=full speed, 1=low speed
#define USBHD_UH_BUS_RESET 0x02 // control USB bus reset: 0=normal, 1=force bus reset
#define USBHD_UH_PORT_EN 0x01 // enable USB port: 0=disable, 1=enable port, automatic disabled if USB device detached
#define USBFS_UHOST_CTRL (USBFSD->UDEV_CTRL) // USB host physical prot control
#define USBFS_UH_PD_DIS 0x80 // disable USB UDP/UDM pulldown resistance: 0=enable pulldown, 1=disable
#define USBFS_UH_DP_PIN 0x20 // ReadOnly: indicate current UDP pin level
#define USBFS_UH_DM_PIN 0x10 // ReadOnly: indicate current UDM pin level
#define USBFS_UH_LOW_SPEED 0x04 // enable USB port low speed: 0=full speed, 1=low speed
#define USBFS_UH_BUS_RESET 0x02 // control USB bus reset: 0=normal, 1=force bus reset
#define USBFS_UH_PORT_EN 0x01 // enable USB port: 0=disable, 1=enable port, automatic disabled if USB device detached
/* USB_INT_ST */
#define USBHD_UIS_H_RES_MASK 0x0F // RO, bit mask of current transfer handshake response for USB host mode: 0000=no response, time out from device, others=handshake response PID received
#define USBFS_UIS_H_RES_MASK 0x0F // RO, bit mask of current transfer handshake response for USB host mode: 0000=no response, time out from device, others=handshake response PID received
/* USB_BUF_MOD */
#define USBHD_UH_EP_MOD USBHD_UEP2_3_MOD //host endpoint mode
#define USBHD__UH_EP_TX_EN 0x40 // enable USB host OUT endpoint transmittal
#define USBHD__UH_EP_TBUF_MOD 0x10 // buffer mode of USB host OUT endpoint
#define USBFS_UH_EP_MOD USBFS_UEP2_3_MOD //host endpoint mode
#define USBFS__UH_EP_TX_EN 0x40 // enable USB host OUT endpoint transmittal
#define USBFS__UH_EP_TBUF_MOD 0x10 // buffer mode of USB host OUT endpoint
// UH_EP_TX_EN & UH_EP_TBUF_MOD: USB host OUT endpoint buffer mode, buffer start address is UH_TX_DMA
// 0 x: disable endpoint and disable buffer
// 1 0: 64 bytes buffer for transmittal (OUT endpoint)
// 1 1: dual 64 bytes buffer by toggle bit bUH_T_TOG selection for transmittal (OUT endpoint), total=128bytes
#define USBHD_UH_EP_RX_EN 0x08 // enable USB host IN endpoint receiving
#define USBHD_UH_EP_RBUF_MOD 0x01 // buffer mode of USB host IN endpoint
#define USBFS_UH_EP_RX_EN 0x08 // enable USB host IN endpoint receiving
#define USBFS_UH_EP_RBUF_MOD 0x01 // buffer mode of USB host IN endpoint
// UH_EP_RX_EN & UH_EP_RBUF_MOD: USB host IN endpoint buffer mode, buffer start address is UH_RX_DMA
// 0 x: disable endpoint and disable buffer
// 1 0: 64 bytes buffer for receiving (IN endpoint)
// 1 1: dual 64 bytes buffer by toggle bit bUH_R_TOG selection for receiving (IN endpoint), total=128bytes
/* USB_DMA */
#define USBHD_UH_RX_DMA USBHD_UEP2_DMA // host rx endpoint buffer high address
#define USBHD_UH_TX_DMA USBHD_UEP3_DMA // host tx endpoint buffer high address
#define USBFS_UH_RX_DMA USBFS_UEP2_DMA // host rx endpoint buffer high address
#define USBFS_UH_TX_DMA USBFS_UEP3_DMA // host tx endpoint buffer high address
/* USB_HOST_SETUP */
#define USBHD_UH_SETUP (*((PUINT16V)(0x50000036))) // host aux setup
#define USBHD_UH_PRE_PID_EN 0x0400 // USB host PRE PID enable for low speed device via hub
#define USBHD_UH_SOF_EN 0x04 // USB host automatic SOF enable
#define USBHD_UH_EP_PID USBHD_UEP2_T_LEN // host endpoint and PID
#define USBHD_UH_TOKEN_MASK 0xF0 // bit mask of token PID for USB host transfer
#define USBHD_UH_ENDP_MASK 0x0F // bit mask of endpoint number for USB host transfer
#define USBFS_UH_SETUP (*((PUINT16V)(0x50000036))) // host aux setup
#define USBFS_UH_PRE_PID_EN 0x0400 // USB host PRE PID enable for low speed device via hub
#define USBFS_UH_SOF_EN 0x04 // USB host automatic SOF enable
#define USBFS_UH_EP_PID USBFS_UEP2_T_LEN // host endpoint and PID
#define USBFS_UH_TOKEN_MASK 0xF0 // bit mask of token PID for USB host transfer
#define USBFS_UH_ENDP_MASK 0x0F // bit mask of endpoint number for USB host transfer
#define USBHD_UH_RX_CTRL USBHD_UEP2_RX_CTRL // host receiver endpoint control
#define USBHD_UH_R_AUTO_TOG 0x08 // enable automatic toggle after successful transfer completion: 0=manual toggle, 1=automatic toggle
#define USBHD_UH_R_TOG 0x04 // expected data toggle flag of host receiving (IN): 0=DATA0, 1=DATA1
#define USBHD_UH_R_RES 0x01 // prepared handshake response type for host receiving (IN): 0=ACK (ready), 1=no response, time out to device, for isochronous transactions
#define USBFS_UH_RX_CTRL USBFS_UEP2_RX_CTRL // host receiver endpoint control
#define USBFS_UH_R_AUTO_TOG 0x08 // enable automatic toggle after successful transfer completion: 0=manual toggle, 1=automatic toggle
#define USBFS_UH_R_TOG 0x04 // expected data toggle flag of host receiving (IN): 0=DATA0, 1=DATA1
#define USBFS_UH_R_RES 0x01 // prepared handshake response type for host receiving (IN): 0=ACK (ready), 1=no response, time out to device, for isochronous transactions
#define USBHD_UH_RX_CTRL USBHD_UEP2_RX_CTRL // host receiver endpoint control
#define USBHD_UH_R_AUTO_TOG 0x08 // enable automatic toggle after successful transfer completion: 0=manual toggle, 1=automatic toggle
#define USBHD_UH_R_TOG 0x04 // expected data toggle flag of host receiving (IN): 0=DATA0, 1=DATA1
#define USBHD_UH_R_RES 0x01 // prepared handshake response type for host receiving (IN): 0=ACK (ready), 1=no response, time out to device, for isochronous transactions
#define USBHD_UH_TX_LEN USBHD_UEP3_T_LEN // host transmittal endpoint transmittal length
#define USBFS_UH_RX_CTRL USBFS_UEP2_RX_CTRL // host receiver endpoint control
#define USBFS_UH_R_AUTO_TOG 0x08 // enable automatic toggle after successful transfer completion: 0=manual toggle, 1=automatic toggle
#define USBFS_UH_R_TOG 0x04 // expected data toggle flag of host receiving (IN): 0=DATA0, 1=DATA1
#define USBFS_UH_R_RES 0x01 // prepared handshake response type for host receiving (IN): 0=ACK (ready), 1=no response, time out to device, for isochronous transactions
#define USBFS_UH_TX_LEN USBFS_UEP3_T_LEN // host transmittal endpoint transmittal length
#define USBHD_UH_TX_CTRL USBHD_UEP3_TX_CTRL // host transmittal endpoint control
#define USBHD_UH_T_AUTO_TOG 0x08 // enable automatic toggle after successful transfer completion: 0=manual toggle, 1=automatic toggle
#define USBHD_UH_T_TOG 0x04 // prepared data toggle flag of host transmittal (SETUP/OUT): 0=DATA0, 1=DATA1
#define USBHD_UH_T_RES 0x01 // expected handshake response type for host transmittal (SETUP/OUT): 0=ACK (ready), 1=no response, time out from device, for isochronous transactions
#define USBFS_UH_TX_CTRL USBFS_UEP3_TX_CTRL // host transmittal endpoint control
#define USBFS_UH_T_AUTO_TOG 0x08 // enable automatic toggle after successful transfer completion: 0=manual toggle, 1=automatic toggle
#define USBFS_UH_T_TOG 0x04 // prepared data toggle flag of host transmittal (SETUP/OUT): 0=DATA0, 1=DATA1
#define USBFS_UH_T_RES 0x01 // expected handshake response type for host transmittal (SETUP/OUT): 0=ACK (ready), 1=no response, time out from device, for isochronous transactions
#endif
#ifdef USB_OTG
#define USB_OTG_CR (USBOTG_FS->OTG_CR) // usb otg control
#define USB_OTG_CR (USBFSD->OTG_CR) // usb otg control
#define USB_OTG_CR_SESS 0x20
#define USB_OTG_CR_VBUS 0x10
#define USB_OTG_CR_OTG_EN 0x08
@@ -652,7 +649,7 @@ typedef struct __PACKED _UDISK_BOC_CSW {/* status of BulkOnly USB-FlashDisk */
#define USB_OTG_CR_CHARGEVBUS 0x02
#define USB_OTG_CR_DISCHARGEVBUS 0x01
#define USB_OTG_SR (USBOTG_FS->OTG_CR)
#define USB_OTG_SR (USBFSD->OTG_CR)
#define USB_OTG_SR_VBUS_VLD 0x01
#define USB_OTG_SR_SESS_VLD 0x02
#define USB_OTG_SR_SESS_END 0x04
@@ -700,7 +697,7 @@ typedef struct __PACKED _UDISK_BOC_CSW {/* status of BulkOnly USB-FlashDisk */
extern PUINT8 pEP0_RAM_Addr; //ep0(64)
extern PUINT8 pEP2_RAM_Addr; //ep2_out(64)+ep2_in(64)
extern volatile UINT8 USBHD_Endp1_Down_Flag;
extern volatile UINT8 USBFS_Endp1_Down_Flag;
#define pSetupReqPakHD ((PUSB_SETUP_REQ)pEP0_RAM_Addr)
#define pEP0_DataBuf (pEP0_RAM_Addr)
@@ -713,7 +710,7 @@ extern volatile UINT8 USBHD_Endp1_Down_Flag;
extern void DevEP2_OUT_Deal( UINT8 l );
extern void DevEP2_IN_Deal( UINT8 l );
extern void USBDeviceInit( void );
extern void USBOTG_Init( void );
extern void USBFS_Init( void );
#endif
EVT/EXAM/IAP/USB_UART/CH32V20x_IAP/User/iap.h
+1 -1
View File
@@ -14,7 +14,7 @@
#include "ch32v20x.h"
#include "stdio.h"
#include "ch32v20x_usbotg_device.h"
#include "ch32v20x_usbfs_device.h"
#define USBD_DATA_SIZE 64
EVT/EXAM/IAP/USB_UART/CH32V20x_IAP/User/main.c
+10 -13
View File
@@ -15,17 +15,14 @@
*IAP upgrade routine:
*Support serial port and USB for FLASH burning
*
*1. Use the IAP download tool to realize the download PA0 floating (default pull-up input)
*2. After downloading the APP, connect PA0 to ground (low level input), and press
*the reset button to run the APP program.
*3. The routine needs to install the CH372 driver.
*1. The routine needs to install the CH372 driver.
*Note: FLASH operation keeps the frequency below 100Mhz, it is recommended that the main
*frequency of IAP be below 100Mhz
*
*/
#include "debug.h"
#include "ch32v20x_usbotg_device.h"
#include "ch32v20x_usbfs_device.h"
#include "iap.h"
#include "usb_istr.h"
#include "usb_desc.h"
@@ -42,21 +39,21 @@ extern u8 End_Flag;
*/
void IAP_2_APP(void) {
USB_Port_Set(DISABLE, DISABLE);
USBOTG_H_FS->HOST_CTRL = 0x00;
USBOTG_FS->BASE_CTRL = 0x00;
USBOTG_FS->INT_EN = 0x00;
USBOTG_FS->UEP2_3_MOD = 0x00;
USBOTG_FS->BASE_CTRL |= (1 << 1) | (1 << 2);
USBFSH->HOST_CTRL = 0x00;
USBFSD->BASE_CTRL = 0x00;
USBFSD->INT_EN = 0x00;
USBFSD->UEP2_3_MOD = 0x00;
USBFSD->BASE_CTRL |= (1 << 1) | (1 << 2);
Delay_Ms(50);
printf("jump APP\r\n");
GPIO_DeInit(GPIOA);
GPIO_DeInit(GPIOB);
USART_DeInit(USART3);
NVIC_DisableIRQ( USBHD_IRQn );
NVIC_DisableIRQ( USBFS_IRQn );
RCC_APB2PeriphClockCmd( RCC_APB2Periph_GPIOB, DISABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, DISABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3,DISABLE);
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_OTG_FS, DISABLE );
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_USBFS, DISABLE );
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USB, DISABLE);
Delay_Ms(10);
NVIC_EnableIRQ(Software_IRQn);
@@ -83,7 +80,7 @@ int main(void) {
USB_Port_Set(ENABLE, ENABLE);
USB_Interrupts_Config();
USBOTG_Init();
USBFS_Init();
USART3_CFG(57600);
while(1)
{
EVT/EXAM/IAP/USB_UART/CH32V20x_IAP/User/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}