bstanwell/ch32v20x-examples
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This commit is contained in:
qiyongshuang
2024-02-26 13:22:09 +08:00
parent 0ad592325e
commit 9596a13c17
573 changed files with 36301 additions and 23003 deletions
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EVT/EXAM/TIM/Synchro_Timer/User/ch32v20x_it.c
+4 -1
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@@ -2,7 +2,7 @@
* File Name : ch32v20x_it.c
* Author : WCH
* Version : V1.0.0
* Date : 2021/06/06
* Date : 2023/12/29
* Description : Main Interrupt Service Routines.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
@@ -23,6 +23,9 @@ void HardFault_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
*/
void NMI_Handler(void)
{
while (1)
{
}
}
/*********************************************************************
EVT/EXAM/TIM/Synchro_Timer/User/main.c
+59 -5
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@@ -20,6 +20,34 @@
#include "debug.h"
#define TimSynchroMode1 1
#define TimSynchroMode2 2
#define TimSynchroMode3 3
#define TimSynchroMode4 4
#define TimSynchroMode TimSynchroMode1
void TIM1_UP_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void TIM1_UP_IRQHandler(void)
{
if( TIM_GetITStatus( TIM1, TIM_IT_Update ) != RESET )
{
printf( "Hi\r\n" );
}
TIM_ClearITPendingBit( TIM1, TIM_IT_Update );
}
void TIM2_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void TIM2_IRQHandler(void)
{
if( TIM_GetITStatus( TIM2, TIM_IT_Update ) != RESET )
{
printf( "WCH\r\n" );
}
TIM_ClearITPendingBit( TIM2, TIM_IT_Update );
}
/*********************************************************************
* @fn TIM_TimSynchroMode1_Init
*
@@ -29,17 +57,37 @@
*/
void TIM_TimSynchroMode1_Init(void)
{
NVIC_InitTypeDef NVIC_InitStructure={0};
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
TIM_CounterModeConfig(TIM1, TIM_CounterMode_Up);
TIM_CounterModeConfig(TIM2, TIM_CounterMode_Up);
TIM_SetAutoreload(TIM1, 0x3E8);
TIM_SetAutoreload(TIM1, 0xA6);
TIM_SetAutoreload(TIM2, 0x5);
TIM_PrescalerConfig(TIM1, 48000 - 1, TIM_PSCReloadMode_Immediate);
TIM_SelectOutputTrigger(TIM1, TIM_TRGOSource_Update);
TIM_ITRxExternalClockConfig(TIM2, TIM_TS_ITR0);
TIM_SelectSlaveMode(TIM2, TIM_SlaveMode_External1);
TIM_ClearITPendingBit( TIM1, TIM_IT_Update );
TIM_ClearITPendingBit( TIM2, TIM_IT_Update);
NVIC_InitStructure.NVIC_IRQChannel = TIM1_UP_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
TIM_ITConfig( TIM1, TIM_IT_Update , ENABLE );
TIM_ITConfig( TIM2, TIM_IT_Update , ENABLE );
TIM_Cmd(TIM1, ENABLE);
TIM_Cmd(TIM2, ENABLE);
}
@@ -154,14 +202,20 @@ int main(void)
printf( "ChipID:%08x\r\n", DBGMCU_GetCHIPID() );
/* Timer synchronization Mode Selection */
#if(TimSynchroMode==TimSynchroMode1)
TIM_TimSynchroMode1_Init();
// TIM_TimSynchroMode2_Init();
// TIM_TimSynchroMode3_Init();
// TIM_TimSynchroMode4_Init();
#elif(TimSynchroMode==TimSynchroMode2)
TIM_TimSynchroMode2_Init();
#elif(TimSynchroMode==TimSynchroMode3)
TIM_TimSynchroMode3_Init();
#elif(TimSynchroMode==TimSynchroMode4)
TIM_TimSynchroMode4_Init();
#endif
while(1)
{
#if((TimSynchroMode==TimSynchroMode2)|(TimSynchroMode==TimSynchroMode3)|(TimSynchroMode==TimSynchroMode4))
printf("TIM1 cnt:%d\r\n", TIM1->CNT);
printf("TIM2 cnt:%d\r\n", TIM2->CNT);
#endif
}
}
EVT/EXAM/TIM/Synchro_Timer/User/system_ch32v20x.c
+2 -2
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@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}