This commit is contained in:
qiyongshuang
2024-02-26 13:22:09 +08:00
parent 0ad592325e
commit 9596a13c17
573 changed files with 36301 additions and 23003 deletions
@@ -2,7 +2,7 @@
* File Name : ch32v20x_it.c
* Author : WCH
* Version : V1.0.0
* Date : 2021/06/06
* Date : 2023/12/29
* Description : Main Interrupt Service Routines.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
@@ -23,6 +23,9 @@ void HardFault_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
*/
void NMI_Handler(void)
{
while (1)
{
}
}
/*********************************************************************
+6 -5
View File
@@ -2,7 +2,7 @@
* File Name : main.c
* Author : WCH
* Version : V1.0.0
* Date : 2021/06/06
* Date : 2024/01/06
* Description : Main program body.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
@@ -19,8 +19,9 @@
*This example demonstrates UART2 and USART3 single-wire half-duplex mode data
*transmission and reception.
*
* Hardware connection:PA2 -- PB10
*
*Hardware connection:PA2 -- PB10
*Note: The pin should be GPIO_Mode_AF_OD in single-wire half-duplex mode.
* The pin needs to connected a pull_up resistor
*/
#include "debug.h"
@@ -91,7 +92,7 @@ void USARTx_CFG(void)
/* USART2 TX-->A.2 */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2; /* Only Configure TX Pin */
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD;
GPIO_Init(GPIOA, &GPIO_InitStructure);
/* USART3 TX-->B.10 */
@@ -122,7 +123,7 @@ void USARTx_CFG(void)
*/
int main(void)
{
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
SystemCoreClockUpdate();
Delay_Init();
USART_Printf_Init(115200);
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}