V2.0
This commit is contained in:
@@ -62,7 +62,7 @@ void Var_Init(void)
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int main(void)
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{
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uint8_t ret;
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
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SystemCoreClockUpdate();
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Delay_Init();
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USART_Printf_Init(115200);
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@@ -37,7 +37,7 @@ void USBWakeUp_IRQHandler(void)
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/*******************************************************************************
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* @fn USBWakeUp_IRQHandler
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*
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* @brief T his function handles USB exception.
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* @brief This function handles USB exception.
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*
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* @return None
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*/
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@@ -100,7 +100,7 @@ const uint8_t USBD_StringVendor[USBD_SIZE_STRING_VENDOR] = {
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const uint8_t USBD_StringProduct[USBD_SIZE_STRING_PRODUCT] = {
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USBD_SIZE_STRING_PRODUCT,
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USB_STRING_DESCRIPTOR_TYPE,
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'C', 0, 'H', 0, '3', 0, '2', 0, 'F', 0, '2', 0 , '0', 0, 'x', 0
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'C', 0, 'H', 0, '3', 0, '2', 0, 'V', 0, '2', 0 , '0', 0, 'x', 0
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};
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/* USB Device String Serial */
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@@ -23,6 +23,9 @@ void HardFault_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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*/
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void NMI_Handler(void)
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{
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while (1)
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{
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}
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}
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/*********************************************************************
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@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
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void SystemInit (void)
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{
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RCC->CTLR |= (uint32_t)0x00000001;
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RCC->CFGR0 &= (uint32_t)0xF8FF0000;
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RCC->CFGR0 &= (uint32_t)0xF0FF0000;
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RCC->CTLR &= (uint32_t)0xFEF6FFFF;
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RCC->CTLR &= (uint32_t)0xFFFBFFFF;
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RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
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RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
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RCC->INTR = 0x009F0000;
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SetSysClock();
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}
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@@ -71,7 +71,7 @@ void Var_Init(void)
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*/
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int main(void)
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{
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
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SystemCoreClockUpdate();
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Delay_Init();
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USART_Printf_Init(115200);
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@@ -98,7 +98,7 @@ const uint8_t USBD_StringVendor[USBD_SIZE_STRING_VENDOR] = {
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const uint8_t USBD_StringProduct[USBD_SIZE_STRING_PRODUCT] = {
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USBD_SIZE_STRING_PRODUCT,
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USB_STRING_DESCRIPTOR_TYPE,
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'C', 0, 'H', 0, '3', 0, '2', 0, 'F', 0, '2', 0 , '0', 0, 'x', 0
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'C', 0, 'H', 0, '3', 0, '2', 0, 'V', 0, '2', 0 , '0', 0, 'x', 0
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};
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/* USB Device String Serial */
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@@ -23,6 +23,9 @@ void HardFault_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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*/
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void NMI_Handler(void)
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{
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while (1)
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{
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}
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}
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/*********************************************************************
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@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
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void SystemInit (void)
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{
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RCC->CTLR |= (uint32_t)0x00000001;
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RCC->CFGR0 &= (uint32_t)0xF8FF0000;
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RCC->CFGR0 &= (uint32_t)0xF0FF0000;
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RCC->CTLR &= (uint32_t)0xFEF6FFFF;
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RCC->CTLR &= (uint32_t)0xFFFBFFFF;
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RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
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RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
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RCC->INTR = 0x009F0000;
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SetSysClock();
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}
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@@ -1,8 +1,8 @@
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/********************************** (C) COPYRIGHT *******************************
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* File Name :usbd_custom_hid.c
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* Author :OWNER
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* File Name : usbd_compatibility_hid.c
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* Author : WCH
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* Version : v0.01
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* Date : 2022��7��8��
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* Date : 2024/02/05
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* Description:
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*******************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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@@ -38,7 +38,7 @@
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*/
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int main(void)
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{
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
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SystemCoreClockUpdate();
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Delay_Init();
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USART_Printf_Init( 115200 );
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@@ -118,7 +118,7 @@ const uint8_t USBD_StringVendor[USBD_SIZE_STRING_VENDOR] = {
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const uint8_t USBD_StringProduct[USBD_SIZE_STRING_PRODUCT] = {
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USBD_SIZE_STRING_PRODUCT,
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USB_STRING_DESCRIPTOR_TYPE,
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'C', 0, 'H', 0, '3', 0, '2', 0, 'F', 0, '2', 0 , '0', 0, 'x', 0
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'C', 0, 'H', 0, '3', 0, '2', 0, 'V', 0, '2', 0 , '0', 0, 'x', 0
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};
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/* USB Device String Serial */
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@@ -23,6 +23,9 @@ void HardFault_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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*/
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void NMI_Handler(void)
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{
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while (1)
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{
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}
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}
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/*********************************************************************
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@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
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void SystemInit (void)
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{
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RCC->CTLR |= (uint32_t)0x00000001;
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RCC->CFGR0 &= (uint32_t)0xF8FF0000;
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RCC->CFGR0 &= (uint32_t)0xF0FF0000;
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RCC->CTLR &= (uint32_t)0xFEF6FFFF;
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RCC->CTLR &= (uint32_t)0xFFFBFFFF;
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RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
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RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
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RCC->INTR = 0x009F0000;
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SetSysClock();
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}
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@@ -72,7 +72,7 @@ void TIM3_Init( uint16_t arr, uint16_t psc )
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NVIC_InitStructure.NVIC_IRQChannel = TIM3_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init( &NVIC_InitStructure );
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@@ -37,7 +37,7 @@
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*/
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int main(void)
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{
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
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SystemCoreClockUpdate();
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Delay_Init();
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USART_Printf_Init(115200);
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@@ -23,6 +23,9 @@ void HardFault_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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*/
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void NMI_Handler(void)
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{
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while (1)
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{
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}
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}
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/*********************************************************************
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@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
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void SystemInit (void)
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{
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RCC->CTLR |= (uint32_t)0x00000001;
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RCC->CFGR0 &= (uint32_t)0xF8FF0000;
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RCC->CFGR0 &= (uint32_t)0xF0FF0000;
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RCC->CTLR &= (uint32_t)0xFEF6FFFF;
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RCC->CTLR &= (uint32_t)0xFFFBFFFF;
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RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
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RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
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RCC->INTR = 0x009F0000;
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SetSysClock();
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}
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@@ -31,7 +31,7 @@
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*/
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int main(void)
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{
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
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SystemCoreClockUpdate();
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Delay_Init();
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USART_Printf_Init(115200);
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@@ -23,6 +23,9 @@ void HardFault_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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*/
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void NMI_Handler(void)
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{
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while (1)
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{
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}
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}
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/*********************************************************************
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@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
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void SystemInit (void)
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{
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RCC->CTLR |= (uint32_t)0x00000001;
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RCC->CFGR0 &= (uint32_t)0xF8FF0000;
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RCC->CFGR0 &= (uint32_t)0xF0FF0000;
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RCC->CTLR &= (uint32_t)0xFEF6FFFF;
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RCC->CTLR &= (uint32_t)0xFFFBFFFF;
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RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
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RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
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RCC->INTR = 0x009F0000;
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SetSysClock();
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}
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@@ -31,7 +31,7 @@
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*/
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int main(void)
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{
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
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Delay_Init();
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USART_Printf_Init(115200);
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printf("SystemClk:%d\r\n",SystemCoreClock);
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@@ -25,6 +25,9 @@ void TIM2_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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*/
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void NMI_Handler(void)
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{
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while (1)
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{
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}
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}
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/*********************************************************************
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* @fn TIM2_IRQHandler
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@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
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void SystemInit (void)
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{
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RCC->CTLR |= (uint32_t)0x00000001;
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RCC->CFGR0 &= (uint32_t)0xF8FF0000;
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RCC->CFGR0 &= (uint32_t)0xF0FF0000;
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RCC->CTLR &= (uint32_t)0xFEF6FFFF;
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RCC->CTLR &= (uint32_t)0xFFFBFFFF;
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RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
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RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
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RCC->INTR = 0x009F0000;
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SetSysClock();
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}
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@@ -32,7 +32,7 @@
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*/
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int main(void)
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{
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
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SystemCoreClockUpdate();
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Delay_Init();
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USART_Printf_Init(115200);
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@@ -25,6 +25,9 @@ void TIM2_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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*/
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void NMI_Handler(void)
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{
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while (1)
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{
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}
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}
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/*********************************************************************
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* @fn TIM2_IRQHandler
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@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
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void SystemInit (void)
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{
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RCC->CTLR |= (uint32_t)0x00000001;
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RCC->CFGR0 &= (uint32_t)0xF8FF0000;
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RCC->CFGR0 &= (uint32_t)0xF0FF0000;
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RCC->CTLR &= (uint32_t)0xFEF6FFFF;
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RCC->CTLR &= (uint32_t)0xFFFBFFFF;
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RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
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RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
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RCC->INTR = 0x009F0000;
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SetSysClock();
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}
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@@ -23,6 +23,9 @@ void HardFault_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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*/
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void NMI_Handler(void)
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{
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while (1)
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{
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}
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}
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/*********************************************************************
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@@ -3,7 +3,7 @@
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* Author : WCH
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* Version : V1.0.0
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* Date : 2022/08/20
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* Description : This file provides all the USBOTG firmware functions.
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* Description : This file provides all the USBFS firmware functions.
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* Attention: This software (modified or not) and binary are used for
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@@ -46,12 +46,12 @@ __attribute__ ((aligned(4))) uint8_t Data_Buffer[DEF_RING_BUFFER_SIZE];
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/******************************************************************************/
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/* Interrupt Service Routine Declaration*/
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void USBHD_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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void USBFS_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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/*********************************************************************
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* @fn USBFS_RCC_Init
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*
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* @brief Initializes the usbotg clock configuration.
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* @brief Initializes the usbfs clock configuration.
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*
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* @return none
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*/
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@@ -69,7 +69,7 @@ void USBFS_RCC_Init(void)
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{
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RCC_USBCLKConfig( RCC_USBCLKSource_PLLCLK_Div1 );
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}
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RCC_AHBPeriphClockCmd( RCC_AHBPeriph_OTG_FS, ENABLE );
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RCC_AHBPeriphClockCmd( RCC_AHBPeriph_USBFS, ENABLE );
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}
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/*********************************************************************
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@@ -82,34 +82,34 @@ void USBFS_RCC_Init(void)
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void USBFS_Device_Endp_Init( void )
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{
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USBOTG_FS->UEP4_1_MOD = USBFS_UEP4_TX_EN|USBFS_UEP1_RX_EN;
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USBOTG_FS->UEP2_3_MOD = USBFS_UEP2_TX_EN|USBFS_UEP3_RX_EN;
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USBOTG_FS->UEP5_6_MOD = USBFS_UEP6_TX_EN|USBFS_UEP5_RX_EN;
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USBFSD->UEP4_1_MOD = USBFS_UEP4_TX_EN|USBFS_UEP1_RX_EN;
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USBFSD->UEP2_3_MOD = USBFS_UEP2_TX_EN|USBFS_UEP3_RX_EN;
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USBFSD->UEP5_6_MOD = USBFS_UEP6_TX_EN|USBFS_UEP5_RX_EN;
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USBOTG_FS->UEP0_DMA = (uint32_t)USBFS_EP0_Buf;
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USBFSD->UEP0_DMA = (uint32_t)USBFS_EP0_Buf;
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USBOTG_FS->UEP1_DMA = (uint32_t)Data_Buffer;
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USBOTG_FS->UEP2_DMA = (uint32_t)Data_Buffer;
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USBFSD->UEP1_DMA = (uint32_t)Data_Buffer;
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USBFSD->UEP2_DMA = (uint32_t)Data_Buffer;
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USBOTG_FS->UEP3_DMA = (uint32_t)USBFS_EP3_Buf;
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USBOTG_FS->UEP4_DMA = (uint32_t)USBFS_EP4_Buf;
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USBFSD->UEP3_DMA = (uint32_t)USBFS_EP3_Buf;
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USBFSD->UEP4_DMA = (uint32_t)USBFS_EP4_Buf;
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USBOTG_FS->UEP5_DMA = (uint32_t)USBFS_EP5_Buf;
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USBOTG_FS->UEP6_DMA = (uint32_t)USBFS_EP6_Buf;
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USBFSD->UEP5_DMA = (uint32_t)USBFS_EP5_Buf;
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USBFSD->UEP6_DMA = (uint32_t)USBFS_EP6_Buf;
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USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_RES_ACK;
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USBOTG_FS->UEP1_RX_CTRL = USBFS_UEP_R_RES_ACK;
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USBOTG_FS->UEP3_RX_CTRL = USBFS_UEP_R_RES_ACK;
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USBOTG_FS->UEP5_RX_CTRL = USBFS_UEP_R_RES_ACK;
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USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_RES_ACK;
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USBFSD->UEP1_RX_CTRL = USBFS_UEP_R_RES_ACK;
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USBFSD->UEP3_RX_CTRL = USBFS_UEP_R_RES_ACK;
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USBFSD->UEP5_RX_CTRL = USBFS_UEP_R_RES_ACK;
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USBOTG_FS->UEP2_TX_LEN = 0;
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USBOTG_FS->UEP4_TX_LEN = 0;
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USBOTG_FS->UEP6_TX_LEN = 0;
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USBFSD->UEP2_TX_LEN = 0;
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USBFSD->UEP4_TX_LEN = 0;
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USBFSD->UEP6_TX_LEN = 0;
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USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
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USBOTG_FS->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
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USBOTG_FS->UEP4_TX_CTRL = USBFS_UEP_T_RES_NAK;
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USBOTG_FS->UEP6_TX_CTRL = USBFS_UEP_T_RES_NAK;
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USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
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USBFSD->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
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USBFSD->UEP4_TX_CTRL = USBFS_UEP_T_RES_NAK;
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USBFSD->UEP6_TX_CTRL = USBFS_UEP_T_RES_NAK;
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/* Clear End-points Busy Status */
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for(uint8_t i=0; i<DEF_UEP_NUM; i++ )
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@@ -129,21 +129,21 @@ void USBFS_Device_Init( FunctionalState sta )
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{
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if( sta )
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{
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USBOTG_H_FS->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
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USBFSH->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
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Delay_Us( 10 );
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USBOTG_H_FS->BASE_CTRL = 0x00;
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USBOTG_FS->INT_EN = USBFS_UIE_SUSPEND | USBFS_UIE_BUS_RST | USBFS_UIE_TRANSFER;
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USBOTG_FS->BASE_CTRL = USBFS_UC_DEV_PU_EN | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
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USBFSH->BASE_CTRL = 0x00;
|
||||
USBFSD->INT_EN = USBFS_UIE_SUSPEND | USBFS_UIE_BUS_RST | USBFS_UIE_TRANSFER;
|
||||
USBFSD->BASE_CTRL = USBFS_UC_DEV_PU_EN | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
|
||||
USBFS_Device_Endp_Init( );
|
||||
USBOTG_FS->UDEV_CTRL = USBFS_UD_PD_DIS | USBFS_UD_PORT_EN;
|
||||
NVIC_EnableIRQ( USBHD_IRQn );
|
||||
USBFSD->UDEV_CTRL = USBFS_UD_PD_DIS | USBFS_UD_PORT_EN;
|
||||
NVIC_EnableIRQ( USBFS_IRQn );
|
||||
}
|
||||
else
|
||||
{
|
||||
USBOTG_H_FS->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
USBFSH->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
Delay_Us( 10 );
|
||||
USBOTG_FS->BASE_CTRL = 0x00;
|
||||
NVIC_DisableIRQ( USBHD_IRQn );
|
||||
USBFSD->BASE_CTRL = 0x00;
|
||||
NVIC_DisableIRQ( USBFS_IRQn );
|
||||
}
|
||||
}
|
||||
|
||||
@@ -247,19 +247,19 @@ uint8_t USBFS_Endp_DataUp(uint8_t endp, uint8_t *pbuf, uint16_t len, uint8_t mod
|
||||
|
||||
|
||||
/*********************************************************************
|
||||
* @fn USBHD_IRQHandler
|
||||
* @fn USBFS_IRQHandler
|
||||
*
|
||||
* @brief This function handles HD-FS exception.
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
void USBHD_IRQHandler( void )
|
||||
void USBFS_IRQHandler( void )
|
||||
{
|
||||
uint8_t intflag, intst, errflag;
|
||||
uint16_t len, i;
|
||||
|
||||
intflag = USBOTG_FS->INT_FG;
|
||||
intst = USBOTG_FS->INT_ST;
|
||||
intflag = USBFSD->INT_FG;
|
||||
intst = USBFSD->INT_ST;
|
||||
|
||||
if( intflag & USBFS_UIF_TRANSFER )
|
||||
{
|
||||
@@ -273,7 +273,7 @@ void USBHD_IRQHandler( void )
|
||||
case USBFS_UIS_TOKEN_IN | DEF_UEP0:
|
||||
if( USBFS_SetupReqLen == 0 )
|
||||
{
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_ACK;
|
||||
}
|
||||
if ( ( USBFS_SetupReqType & USB_REQ_TYP_MASK ) != USB_REQ_TYP_STANDARD )
|
||||
{
|
||||
@@ -289,12 +289,12 @@ void USBHD_IRQHandler( void )
|
||||
memcpy( USBFS_EP0_Buf, pUSBFS_Descr, len );
|
||||
USBFS_SetupReqLen -= len;
|
||||
pUSBFS_Descr += len;
|
||||
USBOTG_FS->UEP0_TX_LEN = len;
|
||||
USBOTG_FS->UEP0_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBFSD->UEP0_TX_LEN = len;
|
||||
USBFSD->UEP0_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
break;
|
||||
|
||||
case USB_SET_ADDRESS:
|
||||
USBOTG_FS->DEV_ADDR = (USBOTG_FS->DEV_ADDR & USBFS_UDA_GP_BIT) | USBFS_DevAddr;
|
||||
USBFSD->DEV_ADDR = (USBFSD->DEV_ADDR & USBFS_UDA_GP_BIT) | USBFS_DevAddr;
|
||||
break;
|
||||
|
||||
default:
|
||||
@@ -305,25 +305,25 @@ void USBHD_IRQHandler( void )
|
||||
|
||||
/* end-point 2 data in interrupt */
|
||||
case ( USBFS_UIS_TOKEN_IN | DEF_UEP2 ):
|
||||
USBOTG_FS->UEP2_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBOTG_FS->UEP2_TX_CTRL = (USBOTG_FS->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP2_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBFSD->UEP2_TX_CTRL = (USBFSD->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
|
||||
USBFS_Endp_Busy[ DEF_UEP2 ] = 0;
|
||||
break;
|
||||
|
||||
/* end-point 4 data in interrupt */
|
||||
case ( USBFS_UIS_TOKEN_IN | DEF_UEP4 ):
|
||||
USBOTG_FS->UEP4_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBOTG_FS->UEP4_TX_CTRL = (USBOTG_FS->UEP4_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP4_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBFSD->UEP4_TX_CTRL = (USBFSD->UEP4_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
|
||||
USBFS_Endp_Busy[ DEF_UEP4 ] = 0;
|
||||
USBOTG_FS->UEP3_RX_CTRL = (USBOTG_FS->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP3_RX_CTRL = (USBFSD->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_ACK;
|
||||
break;
|
||||
|
||||
/* end-point 6 data in interrupt */
|
||||
case ( USBFS_UIS_TOKEN_IN | DEF_UEP6 ):
|
||||
USBOTG_FS->UEP6_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBOTG_FS->UEP6_TX_CTRL = (USBOTG_FS->UEP6_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP6_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBFSD->UEP6_TX_CTRL = (USBFSD->UEP6_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
|
||||
USBFS_Endp_Busy[ DEF_UEP6 ] = 0;
|
||||
USBOTG_FS->UEP5_RX_CTRL = (USBOTG_FS->UEP5_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP5_RX_CTRL = (USBFSD->UEP5_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_ACK;
|
||||
break;
|
||||
|
||||
default :
|
||||
@@ -337,7 +337,7 @@ void USBHD_IRQHandler( void )
|
||||
{
|
||||
/* end-point 0 data out interrupt */
|
||||
case USBFS_UIS_TOKEN_OUT | DEF_UEP0:
|
||||
len = USBOTG_FS->RX_LEN;
|
||||
len = USBFSD->RX_LEN;
|
||||
if ( intst & USBFS_UIS_TOG_OK )
|
||||
{
|
||||
if ( ( USBFS_SetupReqType & USB_REQ_TYP_MASK ) != USB_REQ_TYP_STANDARD )
|
||||
@@ -352,8 +352,8 @@ void USBHD_IRQHandler( void )
|
||||
}
|
||||
if( USBFS_SetupReqLen == 0 )
|
||||
{
|
||||
USBOTG_FS->UEP0_TX_LEN = 0;
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_ACK;
|
||||
USBFSD->UEP0_TX_LEN = 0;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_ACK;
|
||||
}
|
||||
}
|
||||
break;
|
||||
@@ -363,18 +363,18 @@ void USBHD_IRQHandler( void )
|
||||
if ( intst & USBFS_UIS_TOG_OK )
|
||||
{
|
||||
/* Write In Buffer */
|
||||
USBOTG_FS->UEP1_RX_CTRL ^= USBFS_UEP_R_TOG;
|
||||
RingBuffer_Comm.PackLen[ RingBuffer_Comm.LoadPtr ] = USBOTG_FS->RX_LEN;
|
||||
USBFSD->UEP1_RX_CTRL ^= USBFS_UEP_R_TOG;
|
||||
RingBuffer_Comm.PackLen[ RingBuffer_Comm.LoadPtr ] = USBFSD->RX_LEN;
|
||||
RingBuffer_Comm.LoadPtr ++;
|
||||
if(RingBuffer_Comm.LoadPtr == DEF_Ring_Buffer_Max_Blks)
|
||||
{
|
||||
RingBuffer_Comm.LoadPtr = 0;
|
||||
}
|
||||
USBOTG_FS->UEP1_DMA = (uint32_t)(&Data_Buffer[ (RingBuffer_Comm.LoadPtr) * DEF_USBD_FS_PACK_SIZE] );
|
||||
USBFSD->UEP1_DMA = (uint32_t)(&Data_Buffer[ (RingBuffer_Comm.LoadPtr) * DEF_USBD_FS_PACK_SIZE] );
|
||||
RingBuffer_Comm.RemainPack ++;
|
||||
if(RingBuffer_Comm.RemainPack >= DEF_Ring_Buffer_Max_Blks-DEF_RING_BUFFER_REMINE)
|
||||
{
|
||||
USBOTG_FS->UEP1_RX_CTRL = (USBOTG_FS->UEP1_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_NAK;
|
||||
USBFSD->UEP1_RX_CTRL = (USBFSD->UEP1_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_NAK;
|
||||
RingBuffer_Comm.StopFlag = 1;
|
||||
}
|
||||
}
|
||||
@@ -384,15 +384,15 @@ void USBHD_IRQHandler( void )
|
||||
case USBFS_UIS_TOKEN_OUT | DEF_UEP3:
|
||||
if ( intst & USBFS_UIS_TOG_OK )
|
||||
{
|
||||
len = USBOTG_FS->RX_LEN;
|
||||
USBOTG_FS->UEP3_RX_CTRL ^= USBFS_UEP_R_TOG;
|
||||
USBOTG_FS->UEP3_RX_CTRL = (USBOTG_FS->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_NAK;
|
||||
len = USBFSD->RX_LEN;
|
||||
USBFSD->UEP3_RX_CTRL ^= USBFS_UEP_R_TOG;
|
||||
USBFSD->UEP3_RX_CTRL = (USBFSD->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_NAK;
|
||||
for(i=0; i<len; i++)
|
||||
{
|
||||
USBFS_EP4_Buf[i] = ~USBFS_EP3_Buf[i];
|
||||
}
|
||||
USBOTG_FS->UEP4_TX_LEN = len;
|
||||
USBOTG_FS->UEP4_TX_CTRL = (USBOTG_FS->UEP4_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_ACK;
|
||||
USBFSD->UEP4_TX_LEN = len;
|
||||
USBFSD->UEP4_TX_CTRL = (USBFSD->UEP4_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_ACK;
|
||||
}
|
||||
break;
|
||||
|
||||
@@ -400,15 +400,15 @@ void USBHD_IRQHandler( void )
|
||||
case USBFS_UIS_TOKEN_OUT | DEF_UEP5:
|
||||
if ( intst & USBFS_UIS_TOG_OK )
|
||||
{
|
||||
len = USBOTG_FS->RX_LEN;
|
||||
USBOTG_FS->UEP5_RX_CTRL ^= USBFS_UEP_R_TOG;
|
||||
USBOTG_FS->UEP5_RX_CTRL = (USBOTG_FS->UEP5_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_NAK;
|
||||
len = USBFSD->RX_LEN;
|
||||
USBFSD->UEP5_RX_CTRL ^= USBFS_UEP_R_TOG;
|
||||
USBFSD->UEP5_RX_CTRL = (USBFSD->UEP5_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_NAK;
|
||||
for(i=0; i<len; i++)
|
||||
{
|
||||
USBFS_EP6_Buf[i] = ~USBFS_EP5_Buf[i];
|
||||
}
|
||||
USBOTG_FS->UEP6_TX_LEN = len;
|
||||
USBOTG_FS->UEP6_TX_CTRL = (USBOTG_FS->UEP6_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_ACK;
|
||||
USBFSD->UEP6_TX_LEN = len;
|
||||
USBFSD->UEP6_TX_CTRL = (USBFSD->UEP6_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_ACK;
|
||||
}
|
||||
break;
|
||||
}
|
||||
@@ -416,8 +416,8 @@ void USBHD_IRQHandler( void )
|
||||
|
||||
/* Setup stage processing */
|
||||
case USBFS_UIS_TOKEN_SETUP:
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_NAK;
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_NAK;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_NAK;
|
||||
/* Store All Setup Values */
|
||||
USBFS_SetupReqType = pUSBFS_SetupReqPak->bRequestType;
|
||||
USBFS_SetupReqCode = pUSBFS_SetupReqPak->bRequest;
|
||||
@@ -542,32 +542,32 @@ void USBHD_IRQHandler( void )
|
||||
{
|
||||
case ( DEF_UEP_OUT | DEF_UEP1 ):
|
||||
/* Set End-point 1 OUT ACK*/
|
||||
USBOTG_FS->UEP1_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP1_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_IN | DEF_UEP2 ):
|
||||
/* Set End-point 2 IN NAK */
|
||||
USBOTG_FS->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_OUT | DEF_UEP3 ):
|
||||
/* Set End-point 3 OUT ACK */
|
||||
USBOTG_FS->UEP3_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP3_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_IN | DEF_UEP4 ):
|
||||
/* Set End-point 4 IN NAK */
|
||||
USBOTG_FS->UEP4_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP4_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_OUT | DEF_UEP5 ):
|
||||
/* Set End-point 5 OUT ACK */
|
||||
USBOTG_FS->UEP5_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP5_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_IN | DEF_UEP6 ):
|
||||
/* Set End-point 6 IN NAK */
|
||||
USBOTG_FS->UEP6_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP6_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
break;
|
||||
|
||||
default:
|
||||
@@ -618,32 +618,32 @@ void USBHD_IRQHandler( void )
|
||||
{
|
||||
case ( DEF_UEP_OUT | DEF_UEP1 ):
|
||||
/* Set End-point 1 OUT STALL */
|
||||
USBOTG_FS->UEP1_RX_CTRL = ( USBOTG_FS->UEP1_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
|
||||
USBFSD->UEP1_RX_CTRL = ( USBFSD->UEP1_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_IN | DEF_UEP2 ):
|
||||
/* Set End-point 2 IN STALL */
|
||||
USBOTG_FS->UEP2_TX_CTRL = ( USBOTG_FS->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
USBFSD->UEP2_TX_CTRL = ( USBFSD->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_OUT | DEF_UEP3 ):
|
||||
/* Set End-point 3 OUT STALL */
|
||||
USBOTG_FS->UEP3_RX_CTRL = ( USBOTG_FS->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
|
||||
USBFSD->UEP3_RX_CTRL = ( USBFSD->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_IN | DEF_UEP4 ):
|
||||
/* Set End-point 4 IN STALL */
|
||||
USBOTG_FS->UEP4_TX_CTRL = ( USBOTG_FS->UEP4_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
USBFSD->UEP4_TX_CTRL = ( USBFSD->UEP4_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_OUT | DEF_UEP5 ):
|
||||
/* Set End-point 5 OUT STALL */
|
||||
USBOTG_FS->UEP5_RX_CTRL = ( USBOTG_FS->UEP5_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
|
||||
USBFSD->UEP5_RX_CTRL = ( USBFSD->UEP5_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_IN | DEF_UEP6 ):
|
||||
/* Set End-point 6 IN STALL */
|
||||
USBOTG_FS->UEP6_TX_CTRL = ( USBOTG_FS->UEP6_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
USBFSD->UEP6_TX_CTRL = ( USBFSD->UEP6_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
break;
|
||||
|
||||
default:
|
||||
@@ -690,42 +690,42 @@ void USBHD_IRQHandler( void )
|
||||
switch( (uint8_t)( USBFS_SetupReqIndex & 0xFF ) )
|
||||
{
|
||||
case ( DEF_UEP_OUT | DEF_UEP1 ):
|
||||
if( ( (USBOTG_FS->UEP1_RX_CTRL) & USBFS_UEP_R_RES_MASK ) == USBFS_UEP_R_RES_STALL )
|
||||
if( ( (USBFSD->UEP1_RX_CTRL) & USBFS_UEP_R_RES_MASK ) == USBFS_UEP_R_RES_STALL )
|
||||
{
|
||||
USBFS_EP0_Buf[ 0 ] = 0x01;
|
||||
}
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_IN | DEF_UEP2 ):
|
||||
if( ( (USBOTG_FS->UEP2_TX_CTRL) & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
|
||||
if( ( (USBFSD->UEP2_TX_CTRL) & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
|
||||
{
|
||||
USBFS_EP0_Buf[ 0 ] = 0x01;
|
||||
}
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_OUT | DEF_UEP3 ):
|
||||
if( ( (USBOTG_FS->UEP3_RX_CTRL) & USBFS_UEP_R_RES_MASK ) == USBFS_UEP_R_RES_STALL )
|
||||
if( ( (USBFSD->UEP3_RX_CTRL) & USBFS_UEP_R_RES_MASK ) == USBFS_UEP_R_RES_STALL )
|
||||
{
|
||||
USBFS_EP0_Buf[ 0 ] = 0x01;
|
||||
}
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_IN | DEF_UEP4 ):
|
||||
if( ( (USBOTG_FS->UEP4_TX_CTRL) & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
|
||||
if( ( (USBFSD->UEP4_TX_CTRL) & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
|
||||
{
|
||||
USBFS_EP0_Buf[ 0 ] = 0x01;
|
||||
}
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_OUT | DEF_UEP5 ):
|
||||
if( ( (USBOTG_FS->UEP5_RX_CTRL) & USBFS_UEP_R_RES_MASK ) == USBFS_UEP_R_RES_STALL )
|
||||
if( ( (USBFSD->UEP5_RX_CTRL) & USBFS_UEP_R_RES_MASK ) == USBFS_UEP_R_RES_STALL )
|
||||
{
|
||||
USBFS_EP0_Buf[ 0 ] = 0x01;
|
||||
}
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_IN | DEF_UEP6 ):
|
||||
if( ( (USBOTG_FS->UEP6_TX_CTRL) & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
|
||||
if( ( (USBFSD->UEP6_TX_CTRL) & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
|
||||
{
|
||||
USBFS_EP0_Buf[ 0 ] = 0x01;
|
||||
}
|
||||
@@ -757,8 +757,8 @@ void USBHD_IRQHandler( void )
|
||||
if( errflag == 0xff)
|
||||
{
|
||||
/* if one request not support, return stall */
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_STALL;
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_STALL;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_STALL;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_STALL;
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -768,33 +768,29 @@ void USBHD_IRQHandler( void )
|
||||
/* tx */
|
||||
len = (USBFS_SetupReqLen>DEF_USBD_UEP0_SIZE) ? DEF_USBD_UEP0_SIZE : USBFS_SetupReqLen;
|
||||
USBFS_SetupReqLen -= len;
|
||||
USBOTG_FS->UEP0_TX_LEN = len;
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
|
||||
USBFSD->UEP0_TX_LEN = len;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* rx */
|
||||
if( USBFS_SetupReqLen == 0 )
|
||||
{
|
||||
USBOTG_FS->UEP0_TX_LEN = 0;
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
|
||||
USBFSD->UEP0_TX_LEN = 0;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
|
||||
}
|
||||
else
|
||||
{
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_ACK;
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
/* Sof pack processing */
|
||||
case USBFS_UIS_TOKEN_SOF:
|
||||
break;
|
||||
|
||||
default :
|
||||
break;
|
||||
}
|
||||
USBOTG_FS->INT_FG = USBFS_UIF_TRANSFER;
|
||||
USBFSD->INT_FG = USBFS_UIF_TRANSFER;
|
||||
}
|
||||
else if( intflag & USBFS_UIF_BUS_RST )
|
||||
{
|
||||
@@ -804,14 +800,16 @@ void USBHD_IRQHandler( void )
|
||||
USBFS_DevSleepStatus = 0;
|
||||
USBFS_DevEnumStatus = 0;
|
||||
|
||||
USBOTG_FS->DEV_ADDR = 0;
|
||||
USBFSD->DEV_ADDR = 0;
|
||||
USBFS_Device_Endp_Init( );
|
||||
USBOTG_FS->INT_FG = USBFS_UIF_BUS_RST;
|
||||
USBFSD->INT_FG = USBFS_UIF_BUS_RST;
|
||||
}
|
||||
else if( intflag & USBFS_UIF_SUSPEND )
|
||||
{
|
||||
USBFSD->INT_FG = USBFS_UIF_SUSPEND;
|
||||
Delay_Us(10);
|
||||
/* usb suspend interrupt processing */
|
||||
if ( USBOTG_FS->MIS_ST & USBFS_UMS_SUSPEND )
|
||||
if ( USBFSD->MIS_ST & USBFS_UMS_SUSPEND )
|
||||
{
|
||||
USBFS_DevSleepStatus |= 0x02;
|
||||
if( USBFS_DevSleepStatus == 0x03 )
|
||||
@@ -823,12 +821,11 @@ void USBHD_IRQHandler( void )
|
||||
{
|
||||
USBFS_DevSleepStatus &= ~0x02;
|
||||
}
|
||||
USBOTG_FS->INT_FG = USBFS_UIF_SUSPEND;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* other interrupts */
|
||||
USBOTG_FS->INT_FG = intflag;
|
||||
USBFSD->INT_FG = intflag;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2022/08/20
|
||||
* Description : This file contains all the functions prototypes for the
|
||||
* USBOTG firmware library.
|
||||
* USBFS firmware library.
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
|
||||
@@ -57,8 +57,8 @@ int main(void)
|
||||
USART_Printf_Init( 115200 );
|
||||
printf("SystemClk:%d\r\n",SystemCoreClock);
|
||||
|
||||
/* USBOTG_FS device init */
|
||||
printf("CH372Device Running On USBOTG_FS Controller\r\n");
|
||||
/* USBFSD device init */
|
||||
printf("CH372Device Running On USBFSD Controller\r\n");
|
||||
Delay_Ms( 10 );
|
||||
|
||||
/* Variables init */
|
||||
@@ -67,7 +67,7 @@ int main(void)
|
||||
/* Usb Init */
|
||||
USBFS_RCC_Init( );
|
||||
USBFS_Device_Init( ENABLE );
|
||||
NVIC_EnableIRQ(USBHD_IRQn);
|
||||
NVIC_EnableIRQ(USBFS_IRQn);
|
||||
|
||||
while(1)
|
||||
{
|
||||
@@ -80,14 +80,14 @@ int main(void)
|
||||
ret = USBFS_Endp_DataUp(DEF_UEP2, &Data_Buffer[(RingBuffer_Comm.DealPtr) * DEF_USBD_FS_PACK_SIZE], RingBuffer_Comm.PackLen[RingBuffer_Comm.DealPtr], DEF_UEP_CPY_LOAD);
|
||||
if( ret == 0 )
|
||||
{
|
||||
NVIC_DisableIRQ(USBHD_IRQn);
|
||||
NVIC_DisableIRQ(USBFS_IRQn);
|
||||
RingBuffer_Comm.RemainPack--;
|
||||
RingBuffer_Comm.DealPtr++;
|
||||
if(RingBuffer_Comm.DealPtr == DEF_Ring_Buffer_Max_Blks)
|
||||
{
|
||||
RingBuffer_Comm.DealPtr = 0;
|
||||
}
|
||||
NVIC_EnableIRQ(USBHD_IRQn);
|
||||
NVIC_EnableIRQ(USBFS_IRQn);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -96,10 +96,10 @@ int main(void)
|
||||
{
|
||||
if(RingBuffer_Comm.StopFlag)
|
||||
{
|
||||
NVIC_DisableIRQ(USBHD_IRQn);
|
||||
NVIC_DisableIRQ(USBFS_IRQn);
|
||||
RingBuffer_Comm.StopFlag = 0;
|
||||
NVIC_EnableIRQ(USBHD_IRQn);
|
||||
USBOTG_FS->UEP1_RX_CTRL = (USBOTG_FS->UEP1_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_ACK;
|
||||
NVIC_EnableIRQ(USBFS_IRQn);
|
||||
USBFSD->UEP1_RX_CTRL = (USBFSD->UEP1_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_ACK;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
|
||||
void SystemInit (void)
|
||||
{
|
||||
RCC->CTLR |= (uint32_t)0x00000001;
|
||||
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
|
||||
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
|
||||
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
|
||||
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
|
||||
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
|
||||
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
|
||||
RCC->INTR = 0x009F0000;
|
||||
SetSysClock();
|
||||
}
|
||||
|
||||
@@ -23,6 +23,9 @@ void HardFault_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
|
||||
@@ -3,7 +3,7 @@
|
||||
* Author : WCH
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : This file provides all the USBOTG firmware functions.
|
||||
* Description : This file provides all the USBFS firmware functions.
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
@@ -49,7 +49,7 @@ __attribute__ ((aligned(4))) uint8_t Data_Buffer[DEF_RING_BUFFER_SIZE];
|
||||
|
||||
/******************************************************************************/
|
||||
/* Function declarations */
|
||||
void USBHD_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
void USBFS_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
|
||||
/*********************************************************************
|
||||
* @fn USBFS_RCC_Init
|
||||
@@ -72,7 +72,7 @@ void USBFS_RCC_Init( void )
|
||||
{
|
||||
RCC_USBCLKConfig( RCC_USBCLKSource_PLLCLK_Div1 );
|
||||
}
|
||||
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_OTG_FS, ENABLE );
|
||||
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_USBFS, ENABLE );
|
||||
}
|
||||
|
||||
|
||||
@@ -85,17 +85,17 @@ void USBFS_RCC_Init( void )
|
||||
*/
|
||||
void USBFS_Device_Endp_Init( void )
|
||||
{
|
||||
USBOTG_FS->UEP4_1_MOD = USBFS_UEP1_RX_EN;
|
||||
USBOTG_FS->UEP2_3_MOD = USBFS_UEP2_TX_EN;
|
||||
USBFSD->UEP4_1_MOD = USBFS_UEP1_RX_EN;
|
||||
USBFSD->UEP2_3_MOD = USBFS_UEP2_TX_EN;
|
||||
|
||||
USBOTG_FS->UEP0_DMA = (uint32_t)USBFS_EP0_Buf;
|
||||
USBOTG_FS->UEP1_DMA = (uint32_t)Data_Buffer;
|
||||
USBOTG_FS->UEP2_DMA = (uint32_t)USBFS_EP2_Buf;
|
||||
USBFSD->UEP0_DMA = (uint32_t)USBFS_EP0_Buf;
|
||||
USBFSD->UEP1_DMA = (uint32_t)Data_Buffer;
|
||||
USBFSD->UEP2_DMA = (uint32_t)USBFS_EP2_Buf;
|
||||
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBOTG_FS->UEP1_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBOTG_FS->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP1_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
/* Clear End-points Busy Status */
|
||||
for(uint8_t i=0; i<DEF_UEP_NUM; i++ )
|
||||
{
|
||||
@@ -114,27 +114,27 @@ void USBFS_Device_Init( FunctionalState sta )
|
||||
{
|
||||
if( sta )
|
||||
{
|
||||
USBOTG_H_FS->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
USBFSH->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
Delay_Us( 10 );
|
||||
USBFS_Device_Endp_Init( );
|
||||
USBOTG_FS->INT_EN = USBFS_UIE_SUSPEND | USBFS_UIE_BUS_RST | USBFS_UIE_TRANSFER;
|
||||
USBOTG_FS->BASE_CTRL = USBFS_UC_DEV_PU_EN | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
|
||||
USBOTG_FS->UDEV_CTRL = USBFS_UD_PD_DIS | USBFS_UD_PORT_EN;
|
||||
NVIC_EnableIRQ( USBHD_IRQn );
|
||||
USBFSD->INT_EN = USBFS_UIE_SUSPEND | USBFS_UIE_BUS_RST | USBFS_UIE_TRANSFER;
|
||||
USBFSD->BASE_CTRL = USBFS_UC_DEV_PU_EN | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
|
||||
USBFSD->UDEV_CTRL = USBFS_UD_PD_DIS | USBFS_UD_PORT_EN;
|
||||
NVIC_EnableIRQ( USBFS_IRQn );
|
||||
}
|
||||
else
|
||||
{
|
||||
USBOTG_H_FS->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
USBFSH->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
Delay_Us( 10 );
|
||||
USBOTG_FS->BASE_CTRL = 0x00;
|
||||
NVIC_DisableIRQ( USBHD_IRQn );
|
||||
USBFSD->BASE_CTRL = 0x00;
|
||||
NVIC_DisableIRQ( USBFS_IRQn );
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn USBFS_Endp_DataUp
|
||||
*
|
||||
* @brief usbhd-fs device data upload
|
||||
* @brief usbfs device data upload
|
||||
* input: endp - end-point numbers
|
||||
* *pubf - data buffer
|
||||
* len - load data length
|
||||
@@ -264,19 +264,19 @@ uint8_t USBFS_Endp_DataUp(uint8_t endp, uint8_t *pbuf, uint16_t len, uint8_t mod
|
||||
|
||||
|
||||
/*********************************************************************
|
||||
* @fn USBHD_IRQHandler
|
||||
* @fn USBFS_IRQHandler
|
||||
*
|
||||
* @brief This function handles HD-FS exception.
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
void USBHD_IRQHandler( void )
|
||||
void USBFS_IRQHandler( void )
|
||||
{
|
||||
uint8_t intflag, intst, errflag;
|
||||
uint16_t len;
|
||||
|
||||
intflag = USBOTG_FS->INT_FG;
|
||||
intst = USBOTG_FS->INT_ST;
|
||||
intflag = USBFSD->INT_FG;
|
||||
intst = USBFSD->INT_ST;
|
||||
|
||||
if( intflag & USBFS_UIF_TRANSFER )
|
||||
{
|
||||
@@ -290,7 +290,7 @@ void USBHD_IRQHandler( void )
|
||||
case USBFS_UIS_TOKEN_IN | DEF_UEP0:
|
||||
if( USBFS_SetupReqLen == 0 )
|
||||
{
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_ACK;
|
||||
}
|
||||
|
||||
if ( ( USBFS_SetupReqType & USB_REQ_TYP_MASK ) != USB_REQ_TYP_STANDARD )
|
||||
@@ -306,12 +306,12 @@ void USBHD_IRQHandler( void )
|
||||
memcpy( USBFS_EP0_Buf, pUSBFS_Descr, len );
|
||||
USBFS_SetupReqLen -= len;
|
||||
pUSBFS_Descr += len;
|
||||
USBOTG_FS->UEP0_TX_LEN = len;
|
||||
USBOTG_FS->UEP0_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBFSD->UEP0_TX_LEN = len;
|
||||
USBFSD->UEP0_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
break;
|
||||
|
||||
case USB_SET_ADDRESS:
|
||||
USBOTG_FS->DEV_ADDR = (USBOTG_FS->DEV_ADDR & USBFS_UDA_GP_BIT) | USBFS_DevAddr;
|
||||
USBFSD->DEV_ADDR = (USBFSD->DEV_ADDR & USBFS_UDA_GP_BIT) | USBFS_DevAddr;
|
||||
break;
|
||||
|
||||
default:
|
||||
@@ -325,8 +325,8 @@ void USBHD_IRQHandler( void )
|
||||
/* end-point 2 data in interrupt */
|
||||
case USBFS_UIS_TOKEN_IN | DEF_UEP2:
|
||||
|
||||
USBOTG_FS->UEP2_TX_CTRL = (USBOTG_FS->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
|
||||
USBOTG_FS->UEP2_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBFSD->UEP2_TX_CTRL = (USBFSD->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP2_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBFS_Endp_Busy[ DEF_UEP2 ] = 0;
|
||||
break;
|
||||
|
||||
@@ -353,7 +353,7 @@ void USBHD_IRQHandler( void )
|
||||
case HID_SET_REPORT:
|
||||
memcpy(&HID_Report_Buffer[0],USBFS_EP0_Buf,DEF_USBD_UEP0_SIZE);
|
||||
HID_Set_Report_Flag = SET_REPORT_WAIT_DEAL;
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_NAK;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
@@ -374,18 +374,18 @@ void USBHD_IRQHandler( void )
|
||||
if ( intst & USBFS_UIS_TOG_OK )
|
||||
{
|
||||
/* Write In Buffer */
|
||||
USBOTG_FS->UEP1_RX_CTRL ^= USBFS_UEP_R_TOG;
|
||||
RingBuffer_Comm.PackLen[RingBuffer_Comm.LoadPtr] = USBOTG_FS->RX_LEN;
|
||||
USBFSD->UEP1_RX_CTRL ^= USBFS_UEP_R_TOG;
|
||||
RingBuffer_Comm.PackLen[RingBuffer_Comm.LoadPtr] = USBFSD->RX_LEN;
|
||||
RingBuffer_Comm.LoadPtr ++;
|
||||
if(RingBuffer_Comm.LoadPtr == DEF_Ring_Buffer_Max_Blks)
|
||||
{
|
||||
RingBuffer_Comm.LoadPtr = 0;
|
||||
}
|
||||
USBOTG_FS->UEP1_DMA = (uint32_t)(&Data_Buffer[(RingBuffer_Comm.LoadPtr) * DEF_USBD_FS_PACK_SIZE]);
|
||||
USBFSD->UEP1_DMA = (uint32_t)(&Data_Buffer[(RingBuffer_Comm.LoadPtr) * DEF_USBD_FS_PACK_SIZE]);
|
||||
RingBuffer_Comm.RemainPack ++;
|
||||
if(RingBuffer_Comm.RemainPack >= DEF_Ring_Buffer_Max_Blks-DEF_RING_BUFFER_REMINE)
|
||||
{
|
||||
USBOTG_FS->UEP1_RX_CTRL = (USBOTG_FS->UEP1_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_NAK;
|
||||
USBFSD->UEP1_RX_CTRL = (USBFSD->UEP1_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_NAK;
|
||||
RingBuffer_Comm.StopFlag = 1;
|
||||
}
|
||||
}
|
||||
@@ -398,8 +398,8 @@ void USBHD_IRQHandler( void )
|
||||
|
||||
/* Setup stage processing */
|
||||
case USBFS_UIS_TOKEN_SETUP:
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_NAK;
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_NAK;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_NAK;
|
||||
/* Store All Setup Values */
|
||||
USBFS_SetupReqType = pUSBFS_SetupReqPak->bRequestType;
|
||||
USBFS_SetupReqCode = pUSBFS_SetupReqPak->bRequest;
|
||||
@@ -612,12 +612,12 @@ void USBHD_IRQHandler( void )
|
||||
{
|
||||
case ( DEF_UEP_OUT | DEF_UEP1 ):
|
||||
/* Set End-point 1 OUT ACK */
|
||||
USBOTG_FS->UEP1_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP1_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_IN | DEF_UEP2 ):
|
||||
/* Set End-point 2 IN NAK */
|
||||
USBOTG_FS->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
break;
|
||||
|
||||
default:
|
||||
@@ -667,10 +667,10 @@ void USBHD_IRQHandler( void )
|
||||
switch( (uint8_t)(USBFS_SetupReqIndex&0xFF) )
|
||||
{
|
||||
case ( DEF_UEP_OUT | DEF_UEP1 ):
|
||||
USBOTG_FS->UEP1_RX_CTRL = ( USBOTG_FS->UEP1_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
|
||||
USBFSD->UEP1_RX_CTRL = ( USBFSD->UEP1_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
|
||||
break;
|
||||
case ( DEF_UEP_IN | DEF_UEP2 ):
|
||||
USBOTG_FS->UEP2_TX_CTRL = ( USBOTG_FS->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
USBFSD->UEP2_TX_CTRL = ( USBFSD->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
break;
|
||||
|
||||
default:
|
||||
@@ -717,14 +717,14 @@ void USBHD_IRQHandler( void )
|
||||
{
|
||||
if((uint8_t)(USBFS_SetupReqIndex&0xFF) == ( DEF_UEP_OUT |DEF_UEP1 ))
|
||||
{
|
||||
if( ( USBOTG_FS->UEP1_RX_CTRL & USBFS_UEP_R_RES_MASK ) == USBFS_UEP_R_RES_STALL )
|
||||
if( ( USBFSD->UEP1_RX_CTRL & USBFS_UEP_R_RES_MASK ) == USBFS_UEP_R_RES_STALL )
|
||||
{
|
||||
USBFS_EP0_Buf[ 0 ] = 0x01;
|
||||
}
|
||||
}
|
||||
else if((uint8_t)(USBFS_SetupReqIndex&0xFF) == ( DEF_UEP_IN | DEF_UEP2 ))
|
||||
{
|
||||
if( ( USBOTG_FS->UEP2_TX_CTRL & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
|
||||
if( ( USBFSD->UEP2_TX_CTRL & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
|
||||
{
|
||||
USBFS_EP0_Buf[ 0 ] = 0x01;
|
||||
}
|
||||
@@ -756,8 +756,8 @@ void USBHD_IRQHandler( void )
|
||||
if( errflag == 0xFF)
|
||||
{
|
||||
/* if one request not support, return stall */
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_STALL;
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_STALL;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_STALL;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_STALL;
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -766,32 +766,28 @@ void USBHD_IRQHandler( void )
|
||||
{
|
||||
len = ( USBFS_SetupReqLen > DEF_USBD_UEP0_SIZE )? DEF_USBD_UEP0_SIZE : USBFS_SetupReqLen;
|
||||
USBFS_SetupReqLen -= len;
|
||||
USBOTG_FS->UEP0_TX_LEN = len;
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
|
||||
USBFSD->UEP0_TX_LEN = len;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
|
||||
}
|
||||
else
|
||||
{
|
||||
if( USBFS_SetupReqLen == 0 )
|
||||
{
|
||||
USBOTG_FS->UEP0_TX_LEN = 0;
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
|
||||
USBFSD->UEP0_TX_LEN = 0;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
|
||||
}
|
||||
else
|
||||
{
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_ACK;
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
/* Sof pack processing */
|
||||
case USBFS_UIS_TOKEN_SOF:
|
||||
break;
|
||||
|
||||
default :
|
||||
break;
|
||||
}
|
||||
USBOTG_FS->INT_FG = USBFS_UIF_TRANSFER;
|
||||
USBFSD->INT_FG = USBFS_UIF_TRANSFER;
|
||||
}
|
||||
else if( intflag & USBFS_UIF_BUS_RST )
|
||||
{
|
||||
@@ -801,15 +797,16 @@ void USBHD_IRQHandler( void )
|
||||
USBFS_DevSleepStatus = 0;
|
||||
USBFS_DevEnumStatus = 0;
|
||||
|
||||
USBOTG_FS->DEV_ADDR = 0;
|
||||
USBFSD->DEV_ADDR = 0;
|
||||
USBFS_Device_Endp_Init( );
|
||||
USBOTG_FS->INT_FG = USBFS_UIF_BUS_RST;
|
||||
USBFSD->INT_FG = USBFS_UIF_BUS_RST;
|
||||
}
|
||||
else if( intflag & USBFS_UIF_SUSPEND )
|
||||
{
|
||||
USBOTG_FS->INT_FG = USBFS_UIF_SUSPEND;
|
||||
USBFSD->INT_FG = USBFS_UIF_SUSPEND;
|
||||
Delay_Us(10);
|
||||
/* usb suspend interrupt processing */
|
||||
if( USBOTG_FS->MIS_ST & USBFS_UMS_SUSPEND )
|
||||
if( USBFSD->MIS_ST & USBFS_UMS_SUSPEND )
|
||||
{
|
||||
USBFS_DevSleepStatus |= 0x02;
|
||||
if( USBFS_DevSleepStatus == 0x03 )
|
||||
@@ -826,21 +823,21 @@ void USBHD_IRQHandler( void )
|
||||
else
|
||||
{
|
||||
/* other interrupts */
|
||||
USBOTG_FS->INT_FG = intflag;
|
||||
USBFSD->INT_FG = intflag;
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn USBFS_Send_Resume
|
||||
*
|
||||
* @brief USBHD device sends wake-up signal to host
|
||||
* @brief USBFS device sends wake-up signal to host
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
void USBFS_Send_Resume( void )
|
||||
{
|
||||
USBOTG_FS->UDEV_CTRL ^= USBFS_UD_LOW_SPEED;
|
||||
USBFSD->UDEV_CTRL ^= USBFS_UD_LOW_SPEED;
|
||||
Delay_Ms( 5 );
|
||||
USBOTG_FS->UDEV_CTRL ^= USBFS_UD_LOW_SPEED;
|
||||
USBFSD->UDEV_CTRL ^= USBFS_UD_LOW_SPEED;
|
||||
Delay_Ms( 1 );
|
||||
}
|
||||
|
||||
@@ -9,8 +9,8 @@
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
|
||||
*******************************************************************************/
|
||||
#ifndef __CH32V20X_USBOTG_DEVICE_H_
|
||||
#define __CH32V20X_USBOTG_DEVICE_H_
|
||||
#ifndef __CH32V20X_USBFS_DEVICE_H_
|
||||
#define __CH32V20X_USBFS_DEVICE_H_
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
@@ -64,7 +64,7 @@ int main(void)
|
||||
Delay_Init();
|
||||
USART_Printf_Init( 115200 );
|
||||
printf("SystemClk:%d\r\n",SystemCoreClock);
|
||||
printf("USBHD Compatibility HID Example\r\n");
|
||||
printf("USBFS Compatibility HID Example\r\n");
|
||||
Delay_Ms(10);
|
||||
|
||||
/* Variables init */
|
||||
@@ -77,7 +77,7 @@ int main(void)
|
||||
/* Usb Init */
|
||||
USBFS_RCC_Init();
|
||||
USBFS_Device_Init(ENABLE);
|
||||
NVIC_EnableIRQ(USBHD_IRQn);
|
||||
NVIC_EnableIRQ(USBFS_IRQn);
|
||||
|
||||
/* Timer init */
|
||||
TIM2_Init();
|
||||
|
||||
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
|
||||
void SystemInit (void)
|
||||
{
|
||||
RCC->CTLR |= (uint32_t)0x00000001;
|
||||
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
|
||||
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
|
||||
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
|
||||
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
|
||||
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
|
||||
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
|
||||
RCC->INTR = 0x009F0000;
|
||||
SetSysClock();
|
||||
}
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
/********************************** (C) COPYRIGHT *******************************
|
||||
* File Name :usbd_compatibility_hid.c
|
||||
* Author :OWNER
|
||||
* File Name : usbd_compatibility_hid.c
|
||||
* Author : WCH
|
||||
* Version : v0.01
|
||||
* Date : 2022年7月8日
|
||||
* Date : 2024/02/05
|
||||
* Description:
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
@@ -229,12 +229,12 @@ void UART2_Rx_Service( void )
|
||||
/* Upload packet via USB. */
|
||||
if (pkg_len)
|
||||
{
|
||||
USBOTG_FS->UEP2_DMA = (uint16_t)(uint32_t)USBFS_EP2_Buf;
|
||||
USBFSD->UEP2_DMA = (uint16_t)(uint32_t)USBFS_EP2_Buf;
|
||||
USBFS_EP2_Buf[0] = pkg_len;
|
||||
memcpy(USBFS_EP2_Buf + 1,&UART2_RxBuffer[UART2_Rx_Deal_Ptr],pkg_len);
|
||||
USBOTG_FS->UEP2_TX_LEN = pkg_len + 1;
|
||||
USBFSD->UEP2_TX_LEN = pkg_len + 1;
|
||||
USBFS_Endp_Busy[DEF_UEP2] = 1;
|
||||
USBOTG_FS->UEP2_TX_CTRL = (USBOTG_FS->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_ACK; // Start Upload
|
||||
USBFSD->UEP2_TX_CTRL = (USBFSD->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_ACK; // Start Upload
|
||||
UART2_Rx_RemainLen -= pkg_len;
|
||||
UART2_Rx_Deal_Ptr += pkg_len;
|
||||
|
||||
@@ -268,14 +268,14 @@ void UART2_Tx_Service( void )
|
||||
USART_ClearFlag(USART2, USART_FLAG_TC);
|
||||
USART_DMACmd(USART2, USART_DMAReq_Tx, DISABLE);
|
||||
UART2_Tx_Flag = 0;
|
||||
NVIC_DisableIRQ(USBHD_IRQn); // Disable USB interrupts
|
||||
NVIC_DisableIRQ(USBFS_IRQn); // Disable USB interrupts
|
||||
RingBuffer_Comm.RemainPack--;
|
||||
RingBuffer_Comm.DealPtr++;
|
||||
if(RingBuffer_Comm.DealPtr == DEF_Ring_Buffer_Max_Blks)
|
||||
{
|
||||
RingBuffer_Comm.DealPtr = 0;
|
||||
}
|
||||
NVIC_EnableIRQ(USBHD_IRQn); // Enable USB interrupts
|
||||
NVIC_EnableIRQ(USBFS_IRQn); // Enable USB interrupts
|
||||
}
|
||||
}
|
||||
else
|
||||
@@ -297,14 +297,14 @@ void UART2_Tx_Service( void )
|
||||
else
|
||||
{
|
||||
/* drop out */
|
||||
NVIC_DisableIRQ(USBHD_IRQn); // Disable USB interrupts
|
||||
NVIC_DisableIRQ(USBFS_IRQn); // Disable USB interrupts
|
||||
RingBuffer_Comm.RemainPack--;
|
||||
RingBuffer_Comm.DealPtr++;
|
||||
if(RingBuffer_Comm.DealPtr == DEF_Ring_Buffer_Max_Blks)
|
||||
{
|
||||
RingBuffer_Comm.DealPtr = 0;
|
||||
}
|
||||
NVIC_EnableIRQ(USBHD_IRQn); // Enable USB interrupts
|
||||
NVIC_EnableIRQ(USBFS_IRQn); // Enable USB interrupts
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -316,7 +316,7 @@ void UART2_Tx_Service( void )
|
||||
{
|
||||
printf("USB ring buffer full, stop receiving further data.\r\n");
|
||||
RingBuffer_Comm.StopFlag = 0;
|
||||
USBOTG_FS->UEP1_RX_CTRL = (USBOTG_FS->UEP1_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP1_RX_CTRL = (USBFSD->UEP1_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_ACK;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -341,8 +341,8 @@ void HID_Set_Report_Deal()
|
||||
}
|
||||
printf("\r\n");
|
||||
HID_Set_Report_Flag = SET_REPORT_DEAL_OVER;
|
||||
USBOTG_FS->UEP0_TX_LEN = 0;
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_RES_ACK | USBFS_UEP_T_TOG;
|
||||
USBFSD->UEP0_TX_LEN = 0;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_RES_ACK | USBFS_UEP_T_TOG;
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
@@ -23,6 +23,9 @@ void HardFault_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
|
||||
@@ -49,7 +49,7 @@ volatile uint8_t USBFS_Endp_Busy[ DEF_UEP_NUM ];
|
||||
|
||||
/******************************************************************************/
|
||||
/* Interrupt Service Routine Declaration*/
|
||||
void USBHD_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
void USBFS_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
|
||||
/*********************************************************************
|
||||
* @fn USBFS_RCC_Init
|
||||
@@ -72,7 +72,7 @@ void USBFS_RCC_Init( void )
|
||||
{
|
||||
RCC_USBCLKConfig( RCC_USBCLKSource_PLLCLK_Div1 );
|
||||
}
|
||||
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_OTG_FS, ENABLE );
|
||||
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_USBFS, ENABLE );
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
@@ -84,17 +84,17 @@ void USBFS_RCC_Init( void )
|
||||
*/
|
||||
void USBFS_Device_Endp_Init( void )
|
||||
{
|
||||
USBOTG_FS->UEP4_1_MOD = USBFS_UEP1_TX_EN;
|
||||
USBOTG_FS->UEP2_3_MOD = USBFS_UEP2_TX_EN;
|
||||
USBFSD->UEP4_1_MOD = USBFS_UEP1_TX_EN;
|
||||
USBFSD->UEP2_3_MOD = USBFS_UEP2_TX_EN;
|
||||
|
||||
USBOTG_FS->UEP0_DMA = (uint32_t)USBFS_EP0_Buf;
|
||||
USBOTG_FS->UEP1_DMA = (uint32_t)USBFS_EP1_Buf;
|
||||
USBOTG_FS->UEP2_DMA = (uint32_t)USBFS_EP2_Buf;
|
||||
USBFSD->UEP0_DMA = (uint32_t)USBFS_EP0_Buf;
|
||||
USBFSD->UEP1_DMA = (uint32_t)USBFS_EP1_Buf;
|
||||
USBFSD->UEP2_DMA = (uint32_t)USBFS_EP2_Buf;
|
||||
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBOTG_FS->UEP1_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBOTG_FS->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP1_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
|
||||
/* Clear End-points Busy Status */
|
||||
for(uint8_t i=0; i<DEF_UEP_NUM; i++ )
|
||||
@@ -115,23 +115,23 @@ void USBFS_Device_Init( FunctionalState sta )
|
||||
if( sta )
|
||||
{
|
||||
/* Reset USB module */
|
||||
USBOTG_H_FS->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
USBFSH->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
Delay_Us( 10 );
|
||||
USBOTG_H_FS->BASE_CTRL = 0;
|
||||
USBFSH->BASE_CTRL = 0;
|
||||
|
||||
/* Initialize USB device configuration */
|
||||
USBFS_Device_Endp_Init( );
|
||||
USBOTG_FS->INT_EN = USBFS_UIE_SUSPEND | USBFS_UIE_BUS_RST | USBFS_UIE_TRANSFER;
|
||||
USBOTG_FS->BASE_CTRL = USBFS_UC_DEV_PU_EN | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
|
||||
USBOTG_FS->UDEV_CTRL = USBFS_UD_PD_DIS | USBFS_UD_PORT_EN;
|
||||
NVIC_EnableIRQ( USBHD_IRQn );
|
||||
USBFSD->INT_EN = USBFS_UIE_SUSPEND | USBFS_UIE_BUS_RST | USBFS_UIE_TRANSFER;
|
||||
USBFSD->BASE_CTRL = USBFS_UC_DEV_PU_EN | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
|
||||
USBFSD->UDEV_CTRL = USBFS_UD_PD_DIS | USBFS_UD_PORT_EN;
|
||||
NVIC_EnableIRQ( USBFS_IRQn );
|
||||
}
|
||||
else
|
||||
{
|
||||
USBOTG_H_FS->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
USBFSH->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
Delay_Us( 10 );
|
||||
USBOTG_FS->BASE_CTRL = 0;
|
||||
NVIC_DisableIRQ( USBHD_IRQn );
|
||||
USBFSD->BASE_CTRL = 0;
|
||||
NVIC_DisableIRQ( USBFS_IRQn );
|
||||
}
|
||||
}
|
||||
|
||||
@@ -262,19 +262,19 @@ uint8_t USBFS_Endp_DataUp(uint8_t endp, uint8_t *pbuf, uint16_t len, uint8_t mod
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn USBHD_IRQHandler
|
||||
* @fn USBFS_IRQHandler
|
||||
*
|
||||
* @brief USB device transfer process.
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
void USBHD_IRQHandler( void )
|
||||
void USBFS_IRQHandler( void )
|
||||
{
|
||||
uint8_t intflag, intst, errflag;
|
||||
uint16_t len;
|
||||
|
||||
intflag = USBOTG_FS->INT_FG;
|
||||
intst = USBOTG_FS->INT_ST;
|
||||
intflag = USBFSD->INT_FG;
|
||||
intst = USBFSD->INT_ST;
|
||||
|
||||
if( intflag & USBFS_UIF_TRANSFER )
|
||||
{
|
||||
@@ -288,7 +288,7 @@ void USBHD_IRQHandler( void )
|
||||
case USBFS_UIS_TOKEN_IN | DEF_UEP0:
|
||||
if( USBFS_SetupReqLen == 0 )
|
||||
{
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_ACK;
|
||||
}
|
||||
|
||||
if ( ( USBFS_SetupReqType & USB_REQ_TYP_MASK ) != USB_REQ_TYP_STANDARD )
|
||||
@@ -304,12 +304,12 @@ void USBHD_IRQHandler( void )
|
||||
memcpy( USBFS_EP0_Buf, pUSBFS_Descr, len );
|
||||
USBFS_SetupReqLen -= len;
|
||||
pUSBFS_Descr += len;
|
||||
USBOTG_FS->UEP0_TX_LEN = len;
|
||||
USBOTG_FS->UEP0_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBFSD->UEP0_TX_LEN = len;
|
||||
USBFSD->UEP0_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
break;
|
||||
|
||||
case USB_SET_ADDRESS:
|
||||
USBOTG_FS->DEV_ADDR = ( USBOTG_FS->DEV_ADDR & USBFS_UDA_GP_BIT ) | USBFS_DevAddr;
|
||||
USBFSD->DEV_ADDR = ( USBFSD->DEV_ADDR & USBFS_UDA_GP_BIT ) | USBFS_DevAddr;
|
||||
break;
|
||||
|
||||
default:
|
||||
@@ -320,15 +320,15 @@ void USBHD_IRQHandler( void )
|
||||
|
||||
/* end-point 1 data in interrupt */
|
||||
case USBFS_UIS_TOKEN_IN | DEF_UEP1:
|
||||
USBOTG_FS->UEP1_TX_CTRL = ( USBOTG_FS->UEP1_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_NAK;
|
||||
USBOTG_FS->UEP1_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBFSD->UEP1_TX_CTRL = ( USBFSD->UEP1_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP1_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBFS_Endp_Busy[ DEF_UEP1 ] = 0;
|
||||
break;
|
||||
|
||||
/* end-point 2 data in interrupt */
|
||||
case USBFS_UIS_TOKEN_IN | DEF_UEP2:
|
||||
USBOTG_FS->UEP2_TX_CTRL = ( USBOTG_FS->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_NAK;
|
||||
USBOTG_FS->UEP2_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBFSD->UEP2_TX_CTRL = ( USBFSD->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP2_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBFS_Endp_Busy[ DEF_UEP2 ] = 0;
|
||||
break;
|
||||
|
||||
@@ -368,8 +368,8 @@ void USBHD_IRQHandler( void )
|
||||
}
|
||||
if( USBFS_SetupReqLen == 0 )
|
||||
{
|
||||
USBOTG_FS->UEP0_TX_LEN = 0;
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_ACK;
|
||||
USBFSD->UEP0_TX_LEN = 0;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_ACK;
|
||||
}
|
||||
break;
|
||||
|
||||
@@ -380,8 +380,8 @@ void USBHD_IRQHandler( void )
|
||||
|
||||
/* Setup stage processing */
|
||||
case USBFS_UIS_TOKEN_SETUP:
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_NAK;
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_NAK;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_NAK;
|
||||
|
||||
/* Store All Setup Values */
|
||||
USBFS_SetupReqType = pUSBFS_SetupReqPak->bRequestType;
|
||||
@@ -622,12 +622,12 @@ void USBHD_IRQHandler( void )
|
||||
{
|
||||
case ( DEF_UEP_IN | DEF_UEP1 ):
|
||||
/* Set End-point 1 OUT ACK */
|
||||
USBOTG_FS->UEP1_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP1_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_IN | DEF_UEP2 ):
|
||||
/* Set End-point 2 IN NAK */
|
||||
USBOTG_FS->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
break;
|
||||
|
||||
default:
|
||||
@@ -676,11 +676,11 @@ void USBHD_IRQHandler( void )
|
||||
switch( (uint8_t)( USBFS_SetupReqIndex & 0xFF ) )
|
||||
{
|
||||
case ( DEF_UEP_IN | DEF_UEP1 ):
|
||||
USBOTG_FS->UEP1_TX_CTRL = ( USBOTG_FS->UEP1_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
USBFSD->UEP1_TX_CTRL = ( USBFSD->UEP1_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_IN | DEF_UEP2 ):
|
||||
USBOTG_FS->UEP2_TX_CTRL = ( USBOTG_FS->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
USBFSD->UEP2_TX_CTRL = ( USBFSD->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
break;
|
||||
|
||||
default:
|
||||
@@ -730,14 +730,14 @@ void USBHD_IRQHandler( void )
|
||||
{
|
||||
if( (uint8_t)( USBFS_SetupReqIndex & 0xFF ) == ( DEF_UEP_IN | DEF_UEP1 ) )
|
||||
{
|
||||
if( ( USBOTG_FS->UEP1_TX_CTRL & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
|
||||
if( ( USBFSD->UEP1_TX_CTRL & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
|
||||
{
|
||||
USBFS_EP0_Buf[ 0 ] = 0x01;
|
||||
}
|
||||
}
|
||||
else if( (uint8_t)( USBFS_SetupReqIndex & 0xFF ) == ( DEF_UEP_IN | DEF_UEP2 ) )
|
||||
{
|
||||
if( ( USBOTG_FS->UEP2_TX_CTRL & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
|
||||
if( ( USBFSD->UEP2_TX_CTRL & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
|
||||
{
|
||||
USBFS_EP0_Buf[ 0 ] = 0x01;
|
||||
}
|
||||
@@ -767,8 +767,8 @@ void USBHD_IRQHandler( void )
|
||||
if( errflag == 0xFF )
|
||||
{
|
||||
/* if one request not support, return stall */
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_STALL;
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_STALL;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_STALL;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_STALL;
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -777,32 +777,28 @@ void USBHD_IRQHandler( void )
|
||||
{
|
||||
len = ( USBFS_SetupReqLen > DEF_USBD_UEP0_SIZE )? DEF_USBD_UEP0_SIZE : USBFS_SetupReqLen;
|
||||
USBFS_SetupReqLen -= len;
|
||||
USBOTG_FS->UEP0_TX_LEN = len;
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_ACK;
|
||||
USBFSD->UEP0_TX_LEN = len;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_ACK;
|
||||
}
|
||||
else
|
||||
{
|
||||
if( USBFS_SetupReqLen == 0 )
|
||||
{
|
||||
USBOTG_FS->UEP0_TX_LEN = 0;
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_ACK;
|
||||
USBFSD->UEP0_TX_LEN = 0;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_ACK;
|
||||
}
|
||||
else
|
||||
{
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_ACK;
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
/* Sof pack processing */
|
||||
case USBFS_UIS_TOKEN_SOF:
|
||||
break;
|
||||
|
||||
default :
|
||||
break;
|
||||
}
|
||||
USBOTG_FS->INT_FG = USBFS_UIF_TRANSFER;
|
||||
USBFSD->INT_FG = USBFS_UIF_TRANSFER;
|
||||
}
|
||||
else if( intflag & USBFS_UIF_BUS_RST )
|
||||
{
|
||||
@@ -812,16 +808,16 @@ void USBHD_IRQHandler( void )
|
||||
USBFS_DevSleepStatus = 0;
|
||||
USBFS_DevEnumStatus = 0;
|
||||
|
||||
USBOTG_FS->DEV_ADDR = 0;
|
||||
USBFSD->DEV_ADDR = 0;
|
||||
USBFS_Device_Endp_Init( );
|
||||
USBOTG_FS->INT_FG = USBFS_UIF_BUS_RST;
|
||||
USBFSD->INT_FG = USBFS_UIF_BUS_RST;
|
||||
}
|
||||
else if( intflag & USBFS_UIF_SUSPEND )
|
||||
{
|
||||
USBOTG_FS->INT_FG = USBFS_UIF_SUSPEND;
|
||||
|
||||
USBFSD->INT_FG = USBFS_UIF_SUSPEND;
|
||||
Delay_Us(10);
|
||||
/* usb suspend interrupt processing */
|
||||
if( USBOTG_FS->MIS_ST & USBFS_UMS_SUSPEND )
|
||||
if( USBFSD->MIS_ST & USBFS_UMS_SUSPEND )
|
||||
{
|
||||
USBFS_DevSleepStatus |= 0x02;
|
||||
if( USBFS_DevSleepStatus == 0x03 )
|
||||
@@ -838,7 +834,7 @@ void USBHD_IRQHandler( void )
|
||||
else
|
||||
{
|
||||
/* other interrupts */
|
||||
USBOTG_FS->INT_FG = intflag;
|
||||
USBFSD->INT_FG = intflag;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -852,8 +848,8 @@ void USBHD_IRQHandler( void )
|
||||
*/
|
||||
void USBFS_Send_Resume( void )
|
||||
{
|
||||
USBOTG_FS->UDEV_CTRL ^= USBFS_UD_LOW_SPEED;
|
||||
USBFSD->UDEV_CTRL ^= USBFS_UD_LOW_SPEED;
|
||||
Delay_Ms( 8 );
|
||||
USBOTG_FS->UDEV_CTRL ^= USBFS_UD_LOW_SPEED;
|
||||
USBFSD->UDEV_CTRL ^= USBFS_UD_LOW_SPEED;
|
||||
Delay_Ms( 1 );
|
||||
}
|
||||
|
||||
@@ -46,7 +46,7 @@
|
||||
int main( void )
|
||||
{
|
||||
/* Initialize system configuration */
|
||||
NVIC_PriorityGroupConfig( NVIC_PriorityGroup_2 );
|
||||
NVIC_PriorityGroupConfig( NVIC_PriorityGroup_1 );
|
||||
Delay_Init( );
|
||||
USART_Printf_Init( 115200 );
|
||||
printf( "SystemClk:%d\r\n", SystemCoreClock );
|
||||
@@ -69,12 +69,12 @@ int main( void )
|
||||
TIM3_Init( 1, SystemCoreClock / 10000 - 1 );
|
||||
printf( "TIM3 Init OK!\r\n" );
|
||||
|
||||
/* Initialize USBHD interface to communicate with the host */
|
||||
/* Initialize USBFS interface to communicate with the host */
|
||||
USBFS_RCC_Init( );
|
||||
USBFS_Device_Init( ENABLE );
|
||||
USB_Sleep_Wakeup_CFG( );
|
||||
|
||||
printf("USBHD Composite KM Device Test\r\n");
|
||||
printf("USBFS Composite KM Device Test\r\n");
|
||||
|
||||
while( 1 )
|
||||
{
|
||||
|
||||
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
|
||||
void SystemInit (void)
|
||||
{
|
||||
RCC->CTLR |= (uint32_t)0x00000001;
|
||||
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
|
||||
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
|
||||
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
|
||||
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
|
||||
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
|
||||
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
|
||||
RCC->INTR = 0x009F0000;
|
||||
SetSysClock();
|
||||
}
|
||||
|
||||
@@ -71,7 +71,7 @@ void TIM3_Init( uint16_t arr, uint16_t psc )
|
||||
|
||||
NVIC_InitStructure.NVIC_IRQChannel = TIM3_IRQn;
|
||||
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
|
||||
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
||||
NVIC_Init( &NVIC_InitStructure );
|
||||
|
||||
@@ -137,7 +137,7 @@ void USART2_Init( uint32_t baudrate )
|
||||
|
||||
NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn;
|
||||
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
|
||||
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
||||
NVIC_Init( &NVIC_InitStructure );
|
||||
|
||||
|
||||
@@ -312,13 +312,13 @@ void CDROM_CMD_Deal_Fail( void )
|
||||
if( CDROM_Transfer_Status & DEF_CDROM_BLUCK_UP_FLAG )
|
||||
{
|
||||
/* EP2 -> STALL */
|
||||
USBOTG_FS->UEP2_TX_CTRL = ( USBOTG_FS->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
USBFSD->UEP2_TX_CTRL = ( USBFSD->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
CDROM_Transfer_Status &= ~DEF_CDROM_BLUCK_UP_FLAG;
|
||||
}
|
||||
if( CDROM_Transfer_Status & DEF_CDROM_BLUCK_DOWN_FLAG )
|
||||
{
|
||||
/* EP3 -> STALL */
|
||||
USBOTG_FS->UEP3_RX_CTRL = ( USBOTG_FS->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
|
||||
USBFSD->UEP3_RX_CTRL = ( USBFSD->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
|
||||
CDROM_Transfer_Status &= ~DEF_CDROM_BLUCK_DOWN_FLAG;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -23,6 +23,9 @@ void HardFault_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
|
||||
@@ -3,7 +3,7 @@
|
||||
* Author : WCH
|
||||
* Version : V1.0.0
|
||||
* Date : 2022/08/20
|
||||
* Description : This file provides all the USBOTG firmware functions.
|
||||
* Description : This file provides all the USBFS firmware functions.
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
@@ -40,12 +40,12 @@ volatile uint8_t USBFS_Endp_Busy[ DEF_UEP_NUM ];
|
||||
|
||||
/******************************************************************************/
|
||||
/* Interrupt Service Routine Declaration*/
|
||||
void USBHD_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
void USBFS_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
|
||||
/*********************************************************************
|
||||
* @fn USBFS_RCC_Init
|
||||
*
|
||||
* @brief Initializes the usbotg clock configuration.
|
||||
* @brief Initializes the usbfs clock configuration.
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
@@ -63,7 +63,7 @@ void USBFS_RCC_Init( void )
|
||||
{
|
||||
RCC_USBCLKConfig( RCC_USBCLKSource_PLLCLK_Div1 );
|
||||
}
|
||||
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_OTG_FS, ENABLE );
|
||||
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_USBFS, ENABLE );
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
@@ -76,19 +76,19 @@ void USBFS_RCC_Init( void )
|
||||
void USBFS_Device_Endp_Init( void )
|
||||
{
|
||||
|
||||
USBOTG_FS->UEP2_3_MOD = USBFS_UEP2_TX_EN|USBFS_UEP3_RX_EN;
|
||||
USBFSD->UEP2_3_MOD = USBFS_UEP2_TX_EN|USBFS_UEP3_RX_EN;
|
||||
|
||||
USBOTG_FS->UEP0_DMA = (uint32_t)USBFS_EP0_Buf;
|
||||
USBOTG_FS->UEP2_DMA = (uint32_t)CDROM_In_Buf;
|
||||
USBOTG_FS->UEP3_DMA = (uint32_t)CDROM_Out_Buf;
|
||||
USBFSD->UEP0_DMA = (uint32_t)USBFS_EP0_Buf;
|
||||
USBFSD->UEP2_DMA = (uint32_t)CDROM_In_Buf;
|
||||
USBFSD->UEP3_DMA = (uint32_t)CDROM_Out_Buf;
|
||||
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBOTG_FS->UEP3_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP3_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBOTG_FS->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
|
||||
USBOTG_FS->UEP2_TX_LEN = 0;
|
||||
USBFSD->UEP2_TX_LEN = 0;
|
||||
|
||||
/* Clear End-points Busy Status */
|
||||
for(uint8_t i=0; i<DEF_UEP_NUM; i++ )
|
||||
@@ -108,21 +108,21 @@ void USBFS_Device_Init( FunctionalState sta )
|
||||
{
|
||||
if( sta )
|
||||
{
|
||||
USBOTG_H_FS->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
USBFSH->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
Delay_Us( 10 );
|
||||
USBOTG_H_FS->BASE_CTRL = 0x00;
|
||||
USBOTG_FS->INT_EN = USBFS_UIE_SUSPEND | USBFS_UIE_BUS_RST | USBFS_UIE_TRANSFER;
|
||||
USBOTG_FS->BASE_CTRL = USBFS_UC_DEV_PU_EN | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
|
||||
USBFSH->BASE_CTRL = 0x00;
|
||||
USBFSD->INT_EN = USBFS_UIE_SUSPEND | USBFS_UIE_BUS_RST | USBFS_UIE_TRANSFER;
|
||||
USBFSD->BASE_CTRL = USBFS_UC_DEV_PU_EN | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
|
||||
USBFS_Device_Endp_Init( );
|
||||
USBOTG_FS->UDEV_CTRL = USBFS_UD_PD_DIS | USBFS_UD_PORT_EN;
|
||||
NVIC_EnableIRQ( USBHD_IRQn );
|
||||
USBFSD->UDEV_CTRL = USBFS_UD_PD_DIS | USBFS_UD_PORT_EN;
|
||||
NVIC_EnableIRQ( USBFS_IRQn );
|
||||
}
|
||||
else
|
||||
{
|
||||
USBOTG_H_FS->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
USBFSH->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
Delay_Us( 10 );
|
||||
USBOTG_FS->BASE_CTRL = 0x00;
|
||||
NVIC_DisableIRQ( USBHD_IRQn );
|
||||
USBFSD->BASE_CTRL = 0x00;
|
||||
NVIC_DisableIRQ( USBFS_IRQn );
|
||||
}
|
||||
}
|
||||
|
||||
@@ -226,19 +226,19 @@ uint8_t USBFS_Endp_DataUp(uint8_t endp, uint8_t *pbuf, uint16_t len, uint8_t mod
|
||||
|
||||
|
||||
/*********************************************************************
|
||||
* @fn USBHD_IRQHandler
|
||||
* @fn USBFS_IRQHandler
|
||||
*
|
||||
* @brief This function handles HD-FS exception.
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
void USBHD_IRQHandler( void )
|
||||
void USBFS_IRQHandler( void )
|
||||
{
|
||||
uint8_t intflag, intst, errflag;
|
||||
uint16_t len;
|
||||
|
||||
intflag = USBOTG_FS->INT_FG;
|
||||
intst = USBOTG_FS->INT_ST;
|
||||
intflag = USBFSD->INT_FG;
|
||||
intst = USBFSD->INT_ST;
|
||||
|
||||
if( intflag & USBFS_UIF_TRANSFER )
|
||||
{
|
||||
@@ -252,7 +252,7 @@ void USBHD_IRQHandler( void )
|
||||
case USBFS_UIS_TOKEN_IN | DEF_UEP0:
|
||||
if( USBFS_SetupReqLen == 0 )
|
||||
{
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_ACK;
|
||||
}
|
||||
if ( ( USBFS_SetupReqType & USB_REQ_TYP_MASK ) != USB_REQ_TYP_STANDARD )
|
||||
{
|
||||
@@ -268,12 +268,12 @@ void USBHD_IRQHandler( void )
|
||||
memcpy( USBFS_EP0_Buf, pUSBFS_Descr, len );
|
||||
USBFS_SetupReqLen -= len;
|
||||
pUSBFS_Descr += len;
|
||||
USBOTG_FS->UEP0_TX_LEN = len;
|
||||
USBOTG_FS->UEP0_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBFSD->UEP0_TX_LEN = len;
|
||||
USBFSD->UEP0_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
break;
|
||||
|
||||
case USB_SET_ADDRESS:
|
||||
USBOTG_FS->DEV_ADDR = (USBOTG_FS->DEV_ADDR & USBFS_UDA_GP_BIT) | USBFS_DevAddr;
|
||||
USBFSD->DEV_ADDR = (USBFSD->DEV_ADDR & USBFS_UDA_GP_BIT) | USBFS_DevAddr;
|
||||
break;
|
||||
|
||||
default:
|
||||
@@ -284,8 +284,8 @@ void USBHD_IRQHandler( void )
|
||||
|
||||
/* end-point 2 data in interrupt */
|
||||
case ( USBFS_UIS_TOKEN_IN | DEF_UEP2 ):
|
||||
USBOTG_FS->UEP2_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBOTG_FS->UEP2_TX_CTRL = (USBOTG_FS->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP2_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBFSD->UEP2_TX_CTRL = (USBFSD->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
|
||||
USBFS_Endp_Busy[ DEF_UEP2 ] = 0;
|
||||
CDROM_In_EP_Deal();
|
||||
break;
|
||||
@@ -300,7 +300,7 @@ void USBHD_IRQHandler( void )
|
||||
{
|
||||
/* end-point 0 data out interrupt */
|
||||
case USBFS_UIS_TOKEN_OUT | DEF_UEP0:
|
||||
len = USBOTG_FS->RX_LEN;
|
||||
len = USBFSD->RX_LEN;
|
||||
if ( intst & USBFS_UIS_TOG_OK )
|
||||
{
|
||||
if ( ( USBFS_SetupReqType & USB_REQ_TYP_MASK ) != USB_REQ_TYP_STANDARD )
|
||||
@@ -315,8 +315,8 @@ void USBHD_IRQHandler( void )
|
||||
}
|
||||
if( USBFS_SetupReqLen == 0 )
|
||||
{
|
||||
USBOTG_FS->UEP0_TX_LEN = 0;
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_ACK;
|
||||
USBFSD->UEP0_TX_LEN = 0;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_ACK;
|
||||
}
|
||||
}
|
||||
break;
|
||||
@@ -325,11 +325,11 @@ void USBHD_IRQHandler( void )
|
||||
case USBFS_UIS_TOKEN_OUT | DEF_UEP3:
|
||||
if ( intst & USBFS_UIS_TOG_OK )
|
||||
{
|
||||
len = USBOTG_FS->RX_LEN;
|
||||
USBOTG_FS->UEP3_RX_CTRL ^= USBFS_UEP_R_TOG;
|
||||
USBOTG_FS->UEP3_RX_CTRL = (USBOTG_FS->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_NAK;
|
||||
len = USBFSD->RX_LEN;
|
||||
USBFSD->UEP3_RX_CTRL ^= USBFS_UEP_R_TOG;
|
||||
USBFSD->UEP3_RX_CTRL = (USBFSD->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_NAK;
|
||||
CDROM_Out_EP_Deal(CDROM_Out_Buf,len);
|
||||
USBOTG_FS->UEP3_RX_CTRL = (USBOTG_FS->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP3_RX_CTRL = (USBFSD->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_ACK;
|
||||
}
|
||||
break;
|
||||
}
|
||||
@@ -337,8 +337,8 @@ void USBHD_IRQHandler( void )
|
||||
|
||||
/* Setup stage processing */
|
||||
case USBFS_UIS_TOKEN_SETUP:
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_NAK;
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_NAK;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_NAK;
|
||||
/* Store All Setup Values */
|
||||
USBFS_SetupReqType = pUSBFS_SetupReqPak->bRequestType;
|
||||
USBFS_SetupReqCode = pUSBFS_SetupReqPak->bRequest;
|
||||
@@ -488,7 +488,7 @@ void USBHD_IRQHandler( void )
|
||||
{
|
||||
case ( DEF_UEP_IN | DEF_UEP2 ):
|
||||
/* Set End-point 2 IN NAK */
|
||||
USBOTG_FS->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
/* upload CSW */
|
||||
if( CDROM_Transfer_Status & DEF_CDROM_CSW_UP_FLAG )
|
||||
{
|
||||
@@ -497,7 +497,7 @@ void USBHD_IRQHandler( void )
|
||||
break;
|
||||
case ( DEF_UEP_OUT | DEF_UEP3 ):
|
||||
/* Set End-point 3 OUT ACK */
|
||||
USBOTG_FS->UEP3_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP3_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
/* upload CSW */
|
||||
if( CDROM_Transfer_Status & DEF_CDROM_CSW_UP_FLAG )
|
||||
{
|
||||
@@ -552,12 +552,12 @@ void USBHD_IRQHandler( void )
|
||||
{
|
||||
case ( DEF_UEP_IN | DEF_UEP2 ):
|
||||
/* Set End-point 2 IN STALL */
|
||||
USBOTG_FS->UEP2_TX_CTRL = ( USBOTG_FS->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
USBFSD->UEP2_TX_CTRL = ( USBFSD->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_OUT | DEF_UEP3 ):
|
||||
/* Set End-point 3 OUT STALL */
|
||||
USBOTG_FS->UEP3_RX_CTRL = ( USBOTG_FS->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
|
||||
USBFSD->UEP3_RX_CTRL = ( USBFSD->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
|
||||
break;
|
||||
|
||||
default:
|
||||
@@ -604,14 +604,14 @@ void USBHD_IRQHandler( void )
|
||||
switch( (uint8_t)( USBFS_SetupReqIndex & 0xFF ) )
|
||||
{
|
||||
case ( DEF_UEP_IN | DEF_UEP2 ):
|
||||
if( ( (USBOTG_FS->UEP2_TX_CTRL) & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
|
||||
if( ( (USBFSD->UEP2_TX_CTRL) & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
|
||||
{
|
||||
USBFS_EP0_Buf[ 0 ] = 0x01;
|
||||
}
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_OUT | DEF_UEP3 ):
|
||||
if( ( (USBOTG_FS->UEP3_RX_CTRL) & USBFS_UEP_R_RES_MASK ) == USBFS_UEP_R_RES_STALL )
|
||||
if( ( (USBFSD->UEP3_RX_CTRL) & USBFS_UEP_R_RES_MASK ) == USBFS_UEP_R_RES_STALL )
|
||||
{
|
||||
USBFS_EP0_Buf[ 0 ] = 0x01;
|
||||
}
|
||||
@@ -643,8 +643,8 @@ void USBHD_IRQHandler( void )
|
||||
if( errflag == 0xFF)
|
||||
{
|
||||
/* if one request not support, return stall */
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_STALL;
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_STALL;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_STALL;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_STALL;
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -654,33 +654,29 @@ void USBHD_IRQHandler( void )
|
||||
/* tx */
|
||||
len = (USBFS_SetupReqLen>DEF_USBD_UEP0_SIZE) ? DEF_USBD_UEP0_SIZE : USBFS_SetupReqLen;
|
||||
USBFS_SetupReqLen -= len;
|
||||
USBOTG_FS->UEP0_TX_LEN = len;
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
|
||||
USBFSD->UEP0_TX_LEN = len;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* rx */
|
||||
if( USBFS_SetupReqLen == 0 )
|
||||
{
|
||||
USBOTG_FS->UEP0_TX_LEN = 0;
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
|
||||
USBFSD->UEP0_TX_LEN = 0;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
|
||||
}
|
||||
else
|
||||
{
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_ACK;
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
/* Sof pack processing */
|
||||
case USBFS_UIS_TOKEN_SOF:
|
||||
break;
|
||||
|
||||
default :
|
||||
break;
|
||||
}
|
||||
USBOTG_FS->INT_FG = USBFS_UIF_TRANSFER;
|
||||
USBFSD->INT_FG = USBFS_UIF_TRANSFER;
|
||||
}
|
||||
else if( intflag & USBFS_UIF_BUS_RST )
|
||||
{
|
||||
@@ -690,15 +686,16 @@ void USBHD_IRQHandler( void )
|
||||
USBFS_DevSleepStatus = 0;
|
||||
USBFS_DevEnumStatus = 0;
|
||||
|
||||
USBOTG_FS->DEV_ADDR = 0;
|
||||
USBFSD->DEV_ADDR = 0;
|
||||
USBFS_Device_Endp_Init( );
|
||||
USBOTG_FS->INT_FG = USBFS_UIF_BUS_RST;
|
||||
USBFSD->INT_FG = USBFS_UIF_BUS_RST;
|
||||
}
|
||||
else if( intflag & USBFS_UIF_SUSPEND )
|
||||
{
|
||||
USBFSD->INT_FG = USBFS_UIF_SUSPEND;
|
||||
Delay_Us(10);
|
||||
/* usb suspend interrupt processing */
|
||||
USBOTG_FS->INT_FG = USBFS_UIF_SUSPEND;
|
||||
if ( USBOTG_FS->MIS_ST & USBFS_UMS_SUSPEND )
|
||||
if ( USBFSD->MIS_ST & USBFS_UMS_SUSPEND )
|
||||
{
|
||||
USBFS_DevSleepStatus |= 0x02;
|
||||
if( USBFS_DevSleepStatus == 0x03 )
|
||||
@@ -714,7 +711,7 @@ void USBHD_IRQHandler( void )
|
||||
else
|
||||
{
|
||||
/* other interrupts */
|
||||
USBOTG_FS->INT_FG = intflag;
|
||||
USBFSD->INT_FG = intflag;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -727,9 +724,9 @@ void USBHD_IRQHandler( void )
|
||||
*/
|
||||
void USBFS_Send_Resume(void)
|
||||
{
|
||||
USBOTG_FS->UDEV_CTRL ^= USBFS_UD_LOW_SPEED;
|
||||
USBFSD->UDEV_CTRL ^= USBFS_UD_LOW_SPEED;
|
||||
Delay_Ms( 5 );
|
||||
USBOTG_FS->UDEV_CTRL ^= USBFS_UD_LOW_SPEED;
|
||||
USBFSD->UDEV_CTRL ^= USBFS_UD_LOW_SPEED;
|
||||
Delay_Ms( 1 );
|
||||
}
|
||||
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2022/08/20
|
||||
* Description : This file contains all the functions prototypes for the
|
||||
* USBOTG firmware library.
|
||||
* USBFS firmware library.
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
|
||||
@@ -36,7 +36,7 @@
|
||||
*/
|
||||
int main(void)
|
||||
{
|
||||
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
|
||||
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
|
||||
Delay_Init();
|
||||
USART_Printf_Init(115200);
|
||||
printf("SystemClk:%d\r\n",SystemCoreClock);
|
||||
@@ -52,7 +52,7 @@ int main(void)
|
||||
/* Usb Init */
|
||||
USBFS_RCC_Init( );
|
||||
USBFS_Device_Init( ENABLE );
|
||||
NVIC_EnableIRQ(USBHD_IRQn);
|
||||
NVIC_EnableIRQ(USBFS_IRQn);
|
||||
|
||||
while(1)
|
||||
{
|
||||
|
||||
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
|
||||
void SystemInit (void)
|
||||
{
|
||||
RCC->CTLR |= (uint32_t)0x00000001;
|
||||
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
|
||||
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
|
||||
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
|
||||
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
|
||||
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
|
||||
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
|
||||
RCC->INTR = 0x009F0000;
|
||||
SetSysClock();
|
||||
}
|
||||
|
||||
@@ -24,11 +24,11 @@ __attribute__ ((aligned(4))) uint8_t UDisk_Down_Buffer[DEF_FLASH_SECTOR_SIZE];
|
||||
__attribute__ ((aligned(4))) uint8_t UDisk_Pack_Buffer[DEF_UDISK_PACK_64];
|
||||
|
||||
/******************************************************************************/
|
||||
/* INQUITYÐÅÏ¢ */
|
||||
/* INQUITY */
|
||||
uint8_t UDISK_Inquity_Tab[ ] =
|
||||
{
|
||||
/* UDISK */
|
||||
0x00, /* Peripheral Device Type£ºUDISK = 0x00 */
|
||||
0x00, /* Peripheral Device Type UDISK = 0x00 */
|
||||
0x80, /* Removable */
|
||||
0x02, /* ISO/ECMA */
|
||||
0x02,
|
||||
@@ -184,13 +184,13 @@ void UDISK_CMD_Deal_Fail( void )
|
||||
if( Udisk_Transfer_Status & DEF_UDISK_BLUCK_UP_FLAG )
|
||||
{
|
||||
/* EP2 -> STALL */
|
||||
USBOTG_FS->UEP2_TX_CTRL = ( USBOTG_FS->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
USBFSD->UEP2_TX_CTRL = ( USBFSD->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
Udisk_Transfer_Status &= ~DEF_UDISK_BLUCK_UP_FLAG;
|
||||
}
|
||||
if( Udisk_Transfer_Status & DEF_UDISK_BLUCK_DOWN_FLAG )
|
||||
{
|
||||
/* EP3 -> STALL */
|
||||
USBOTG_FS->UEP3_RX_CTRL = ( USBOTG_FS->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
|
||||
USBFSD->UEP3_RX_CTRL = ( USBFSD->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
|
||||
Udisk_Transfer_Status &= ~DEF_UDISK_BLUCK_DOWN_FLAG;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -23,6 +23,9 @@ void HardFault_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
|
||||
@@ -3,7 +3,7 @@
|
||||
* Author : WCH
|
||||
* Version : V1.0.0
|
||||
* Date : 2022/08/20
|
||||
* Description : This file provides all the USBOTG firmware functions.
|
||||
* Description : This file provides all the USBFS firmware functions.
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
@@ -40,12 +40,12 @@ volatile uint8_t USBFS_Endp_Busy[ DEF_UEP_NUM ];
|
||||
|
||||
/******************************************************************************/
|
||||
/* Interrupt Service Routine Declaration*/
|
||||
void USBHD_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
void USBFS_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
|
||||
/*********************************************************************
|
||||
* @fn USBFS_RCC_Init
|
||||
*
|
||||
* @brief Initializes the usbotg clock configuration.
|
||||
* @brief Initializes the usbfs clock configuration.
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
@@ -63,7 +63,7 @@ void USBFS_RCC_Init( void )
|
||||
{
|
||||
RCC_USBCLKConfig( RCC_USBCLKSource_PLLCLK_Div1 );
|
||||
}
|
||||
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_OTG_FS, ENABLE );
|
||||
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_USBFS, ENABLE );
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
@@ -76,19 +76,19 @@ void USBFS_RCC_Init( void )
|
||||
void USBFS_Device_Endp_Init( void )
|
||||
{
|
||||
|
||||
USBOTG_FS->UEP2_3_MOD = USBFS_UEP2_TX_EN|USBFS_UEP3_RX_EN;
|
||||
USBFSD->UEP2_3_MOD = USBFS_UEP2_TX_EN|USBFS_UEP3_RX_EN;
|
||||
|
||||
USBOTG_FS->UEP0_DMA = (uint32_t)USBFS_EP0_Buf;
|
||||
USBOTG_FS->UEP2_DMA = (uint32_t)UDisk_In_Buf;
|
||||
USBOTG_FS->UEP3_DMA = (uint32_t)UDisk_Out_Buf;
|
||||
USBFSD->UEP0_DMA = (uint32_t)USBFS_EP0_Buf;
|
||||
USBFSD->UEP2_DMA = (uint32_t)UDisk_In_Buf;
|
||||
USBFSD->UEP3_DMA = (uint32_t)UDisk_Out_Buf;
|
||||
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBOTG_FS->UEP3_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP3_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBOTG_FS->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
|
||||
USBOTG_FS->UEP2_TX_LEN = 0;
|
||||
USBFSD->UEP2_TX_LEN = 0;
|
||||
|
||||
/* Clear End-points Busy Status */
|
||||
for(uint8_t i=0; i<DEF_UEP_NUM; i++ )
|
||||
@@ -108,21 +108,21 @@ void USBFS_Device_Init( FunctionalState sta )
|
||||
{
|
||||
if( sta )
|
||||
{
|
||||
USBOTG_H_FS->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
USBFSH->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
Delay_Us( 10 );
|
||||
USBOTG_H_FS->BASE_CTRL = 0x00;
|
||||
USBOTG_FS->INT_EN = USBFS_UIE_SUSPEND | USBFS_UIE_BUS_RST | USBFS_UIE_TRANSFER;
|
||||
USBOTG_FS->BASE_CTRL = USBFS_UC_DEV_PU_EN | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
|
||||
USBFSH->BASE_CTRL = 0x00;
|
||||
USBFSD->INT_EN = USBFS_UIE_SUSPEND | USBFS_UIE_BUS_RST | USBFS_UIE_TRANSFER;
|
||||
USBFSD->BASE_CTRL = USBFS_UC_DEV_PU_EN | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
|
||||
USBFS_Device_Endp_Init( );
|
||||
USBOTG_FS->UDEV_CTRL = USBFS_UD_PD_DIS | USBFS_UD_PORT_EN;
|
||||
NVIC_EnableIRQ( USBHD_IRQn );
|
||||
USBFSD->UDEV_CTRL = USBFS_UD_PD_DIS | USBFS_UD_PORT_EN;
|
||||
NVIC_EnableIRQ( USBFS_IRQn );
|
||||
}
|
||||
else
|
||||
{
|
||||
USBOTG_H_FS->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
USBFSH->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
Delay_Us( 10 );
|
||||
USBOTG_FS->BASE_CTRL = 0x00;
|
||||
NVIC_DisableIRQ( USBHD_IRQn );
|
||||
USBFSD->BASE_CTRL = 0x00;
|
||||
NVIC_DisableIRQ( USBFS_IRQn );
|
||||
}
|
||||
}
|
||||
|
||||
@@ -226,19 +226,19 @@ uint8_t USBFS_Endp_DataUp(uint8_t endp, uint8_t *pbuf, uint16_t len, uint8_t mod
|
||||
|
||||
|
||||
/*********************************************************************
|
||||
* @fn USBHD_IRQHandler
|
||||
* @fn USBFS_IRQHandler
|
||||
*
|
||||
* @brief This function handles HD-FS exception.
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
void USBHD_IRQHandler( void )
|
||||
void USBFS_IRQHandler( void )
|
||||
{
|
||||
uint8_t intflag, intst, errflag;
|
||||
uint16_t len;
|
||||
|
||||
intflag = USBOTG_FS->INT_FG;
|
||||
intst = USBOTG_FS->INT_ST;
|
||||
intflag = USBFSD->INT_FG;
|
||||
intst = USBFSD->INT_ST;
|
||||
|
||||
if( intflag & USBFS_UIF_TRANSFER )
|
||||
{
|
||||
@@ -252,7 +252,7 @@ void USBHD_IRQHandler( void )
|
||||
case USBFS_UIS_TOKEN_IN | DEF_UEP0:
|
||||
if( USBFS_SetupReqLen == 0 )
|
||||
{
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_ACK;
|
||||
}
|
||||
if ( ( USBFS_SetupReqType & USB_REQ_TYP_MASK ) != USB_REQ_TYP_STANDARD )
|
||||
{
|
||||
@@ -268,12 +268,12 @@ void USBHD_IRQHandler( void )
|
||||
memcpy( USBFS_EP0_Buf, pUSBFS_Descr, len );
|
||||
USBFS_SetupReqLen -= len;
|
||||
pUSBFS_Descr += len;
|
||||
USBOTG_FS->UEP0_TX_LEN = len;
|
||||
USBOTG_FS->UEP0_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBFSD->UEP0_TX_LEN = len;
|
||||
USBFSD->UEP0_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
break;
|
||||
|
||||
case USB_SET_ADDRESS:
|
||||
USBOTG_FS->DEV_ADDR = (USBOTG_FS->DEV_ADDR & USBFS_UDA_GP_BIT) | USBFS_DevAddr;
|
||||
USBFSD->DEV_ADDR = (USBFSD->DEV_ADDR & USBFS_UDA_GP_BIT) | USBFS_DevAddr;
|
||||
break;
|
||||
|
||||
default:
|
||||
@@ -284,8 +284,8 @@ void USBHD_IRQHandler( void )
|
||||
|
||||
/* end-point 2 data in interrupt */
|
||||
case ( USBFS_UIS_TOKEN_IN | DEF_UEP2 ):
|
||||
USBOTG_FS->UEP2_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBOTG_FS->UEP2_TX_CTRL = (USBOTG_FS->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP2_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBFSD->UEP2_TX_CTRL = (USBFSD->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
|
||||
USBFS_Endp_Busy[ DEF_UEP2 ] = 0;
|
||||
UDISK_In_EP_Deal();
|
||||
break;
|
||||
@@ -300,7 +300,7 @@ void USBHD_IRQHandler( void )
|
||||
{
|
||||
/* end-point 0 data out interrupt */
|
||||
case USBFS_UIS_TOKEN_OUT | DEF_UEP0:
|
||||
len = USBOTG_FS->RX_LEN;
|
||||
len = USBFSD->RX_LEN;
|
||||
if ( intst & USBFS_UIS_TOG_OK )
|
||||
{
|
||||
if ( ( USBFS_SetupReqType & USB_REQ_TYP_MASK ) != USB_REQ_TYP_STANDARD )
|
||||
@@ -315,8 +315,8 @@ void USBHD_IRQHandler( void )
|
||||
}
|
||||
if( USBFS_SetupReqLen == 0 )
|
||||
{
|
||||
USBOTG_FS->UEP0_TX_LEN = 0;
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_ACK;
|
||||
USBFSD->UEP0_TX_LEN = 0;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_ACK;
|
||||
}
|
||||
}
|
||||
break;
|
||||
@@ -325,11 +325,11 @@ void USBHD_IRQHandler( void )
|
||||
case USBFS_UIS_TOKEN_OUT | DEF_UEP3:
|
||||
if ( intst & USBFS_UIS_TOG_OK )
|
||||
{
|
||||
len = USBOTG_FS->RX_LEN;
|
||||
USBOTG_FS->UEP3_RX_CTRL ^= USBFS_UEP_R_TOG;
|
||||
USBOTG_FS->UEP3_RX_CTRL = (USBOTG_FS->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_NAK;
|
||||
len = USBFSD->RX_LEN;
|
||||
USBFSD->UEP3_RX_CTRL ^= USBFS_UEP_R_TOG;
|
||||
USBFSD->UEP3_RX_CTRL = (USBFSD->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_NAK;
|
||||
UDISK_Out_EP_Deal(UDisk_Out_Buf,len);
|
||||
USBOTG_FS->UEP3_RX_CTRL = (USBOTG_FS->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP3_RX_CTRL = (USBFSD->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_ACK;
|
||||
}
|
||||
break;
|
||||
}
|
||||
@@ -337,8 +337,8 @@ void USBHD_IRQHandler( void )
|
||||
|
||||
/* Setup stage processing */
|
||||
case USBFS_UIS_TOKEN_SETUP:
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_NAK;
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_NAK;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_NAK;
|
||||
/* Store All Setup Values */
|
||||
USBFS_SetupReqType = pUSBFS_SetupReqPak->bRequestType;
|
||||
USBFS_SetupReqCode = pUSBFS_SetupReqPak->bRequest;
|
||||
@@ -488,7 +488,7 @@ void USBHD_IRQHandler( void )
|
||||
{
|
||||
case ( DEF_UEP_IN | DEF_UEP2 ):
|
||||
/* Set End-point 2 IN NAK */
|
||||
USBOTG_FS->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
/* upload CSW */
|
||||
if( Udisk_Transfer_Status & DEF_UDISK_CSW_UP_FLAG )
|
||||
{
|
||||
@@ -497,7 +497,7 @@ void USBHD_IRQHandler( void )
|
||||
break;
|
||||
case ( DEF_UEP_OUT | DEF_UEP3 ):
|
||||
/* Set End-point 3 OUT ACK */
|
||||
USBOTG_FS->UEP3_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP3_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
/* upload CSW */
|
||||
if( Udisk_Transfer_Status & DEF_UDISK_CSW_UP_FLAG )
|
||||
{
|
||||
@@ -552,12 +552,12 @@ void USBHD_IRQHandler( void )
|
||||
{
|
||||
case ( DEF_UEP_IN | DEF_UEP2 ):
|
||||
/* Set End-point 2 IN STALL */
|
||||
USBOTG_FS->UEP2_TX_CTRL = ( USBOTG_FS->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
USBFSD->UEP2_TX_CTRL = ( USBFSD->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_OUT | DEF_UEP3 ):
|
||||
/* Set End-point 3 OUT STALL */
|
||||
USBOTG_FS->UEP3_RX_CTRL = ( USBOTG_FS->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
|
||||
USBFSD->UEP3_RX_CTRL = ( USBFSD->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
|
||||
break;
|
||||
|
||||
default:
|
||||
@@ -604,14 +604,14 @@ void USBHD_IRQHandler( void )
|
||||
switch( (uint8_t)( USBFS_SetupReqIndex & 0xFF ) )
|
||||
{
|
||||
case ( DEF_UEP_IN | DEF_UEP2 ):
|
||||
if( ( (USBOTG_FS->UEP2_TX_CTRL) & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
|
||||
if( ( (USBFSD->UEP2_TX_CTRL) & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
|
||||
{
|
||||
USBFS_EP0_Buf[ 0 ] = 0x01;
|
||||
}
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_OUT | DEF_UEP3 ):
|
||||
if( ( (USBOTG_FS->UEP3_RX_CTRL) & USBFS_UEP_R_RES_MASK ) == USBFS_UEP_R_RES_STALL )
|
||||
if( ( (USBFSD->UEP3_RX_CTRL) & USBFS_UEP_R_RES_MASK ) == USBFS_UEP_R_RES_STALL )
|
||||
{
|
||||
USBFS_EP0_Buf[ 0 ] = 0x01;
|
||||
}
|
||||
@@ -643,8 +643,8 @@ void USBHD_IRQHandler( void )
|
||||
if( errflag == 0xFF)
|
||||
{
|
||||
/* if one request not support, return stall */
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_STALL;
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_STALL;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_STALL;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_STALL;
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -654,33 +654,29 @@ void USBHD_IRQHandler( void )
|
||||
/* tx */
|
||||
len = (USBFS_SetupReqLen>DEF_USBD_UEP0_SIZE) ? DEF_USBD_UEP0_SIZE : USBFS_SetupReqLen;
|
||||
USBFS_SetupReqLen -= len;
|
||||
USBOTG_FS->UEP0_TX_LEN = len;
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
|
||||
USBFSD->UEP0_TX_LEN = len;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* rx */
|
||||
if( USBFS_SetupReqLen == 0 )
|
||||
{
|
||||
USBOTG_FS->UEP0_TX_LEN = 0;
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
|
||||
USBFSD->UEP0_TX_LEN = 0;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
|
||||
}
|
||||
else
|
||||
{
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_ACK;
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
/* Sof pack processing */
|
||||
case USBFS_UIS_TOKEN_SOF:
|
||||
break;
|
||||
|
||||
default :
|
||||
break;
|
||||
}
|
||||
USBOTG_FS->INT_FG = USBFS_UIF_TRANSFER;
|
||||
USBFSD->INT_FG = USBFS_UIF_TRANSFER;
|
||||
}
|
||||
else if( intflag & USBFS_UIF_BUS_RST )
|
||||
{
|
||||
@@ -690,15 +686,16 @@ void USBHD_IRQHandler( void )
|
||||
USBFS_DevSleepStatus = 0;
|
||||
USBFS_DevEnumStatus = 0;
|
||||
|
||||
USBOTG_FS->DEV_ADDR = 0;
|
||||
USBFSD->DEV_ADDR = 0;
|
||||
USBFS_Device_Endp_Init( );
|
||||
USBOTG_FS->INT_FG = USBFS_UIF_BUS_RST;
|
||||
USBFSD->INT_FG = USBFS_UIF_BUS_RST;
|
||||
}
|
||||
else if( intflag & USBFS_UIF_SUSPEND )
|
||||
{
|
||||
USBFSD->INT_FG = USBFS_UIF_SUSPEND;
|
||||
Delay_Us(10);
|
||||
/* usb suspend interrupt processing */
|
||||
USBOTG_FS->INT_FG = USBFS_UIF_SUSPEND;
|
||||
if ( USBOTG_FS->MIS_ST & USBFS_UMS_SUSPEND )
|
||||
if ( USBFSD->MIS_ST & USBFS_UMS_SUSPEND )
|
||||
{
|
||||
USBFS_DevSleepStatus |= 0x02;
|
||||
if( USBFS_DevSleepStatus == 0x03 )
|
||||
@@ -714,7 +711,7 @@ void USBHD_IRQHandler( void )
|
||||
else
|
||||
{
|
||||
/* other interrupts */
|
||||
USBOTG_FS->INT_FG = intflag;
|
||||
USBFSD->INT_FG = intflag;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -727,9 +724,9 @@ void USBHD_IRQHandler( void )
|
||||
*/
|
||||
void USBFS_Send_Resume(void)
|
||||
{
|
||||
USBOTG_FS->UDEV_CTRL ^= USBFS_UD_LOW_SPEED;
|
||||
USBFSD->UDEV_CTRL ^= USBFS_UD_LOW_SPEED;
|
||||
Delay_Ms( 5 );
|
||||
USBOTG_FS->UDEV_CTRL ^= USBFS_UD_LOW_SPEED;
|
||||
USBFSD->UDEV_CTRL ^= USBFS_UD_LOW_SPEED;
|
||||
Delay_Ms( 1 );
|
||||
}
|
||||
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2022/08/20
|
||||
* Description : This file contains all the functions prototypes for the
|
||||
* USBOTG firmware library.
|
||||
* USBFS firmware library.
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
|
||||
@@ -53,7 +53,7 @@ int main(void)
|
||||
/* Usb Init */
|
||||
USBFS_RCC_Init( );
|
||||
USBFS_Device_Init( ENABLE );
|
||||
NVIC_EnableIRQ(USBHD_IRQn);
|
||||
NVIC_EnableIRQ( USBFS_IRQn );
|
||||
|
||||
while(1)
|
||||
{
|
||||
|
||||
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
|
||||
void SystemInit (void)
|
||||
{
|
||||
RCC->CTLR |= (uint32_t)0x00000001;
|
||||
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
|
||||
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
|
||||
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
|
||||
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
|
||||
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
|
||||
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
|
||||
RCC->INTR = 0x009F0000;
|
||||
SetSysClock();
|
||||
}
|
||||
|
||||
@@ -323,9 +323,9 @@ void UART2_USB_Init( void )
|
||||
UART2_Init( 0, baudrate, stopbits, parity );
|
||||
|
||||
/* restart usb receive */
|
||||
USBOTG_FS->UEP2_DMA = (uint32_t)(uint8_t *)&UART2_Tx_Buf[ 0 ];
|
||||
USBOTG_FS->UEP2_RX_CTRL &= ~USBFS_UEP_R_RES_MASK;
|
||||
USBOTG_FS->UEP2_RX_CTRL |= USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP2_DMA = (uint32_t)(uint8_t *)&UART2_Tx_Buf[ 0 ];
|
||||
USBFSD->UEP2_RX_CTRL &= ~USBFS_UEP_R_RES_MASK;
|
||||
USBFSD->UEP2_RX_CTRL |= USBFS_UEP_R_RES_ACK;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
@@ -350,8 +350,8 @@ void UART2_DataTx_Deal( void )
|
||||
|
||||
Uart.Tx_Flag = 0x00;
|
||||
|
||||
NVIC_DisableIRQ( USBHD_IRQn );
|
||||
NVIC_DisableIRQ( USBHD_IRQn );
|
||||
NVIC_DisableIRQ( USBFS_IRQn );
|
||||
NVIC_DisableIRQ( USBFS_IRQn );
|
||||
|
||||
/* Calculate the variables of last data */
|
||||
count = Uart.Tx_CurPackLen - DEF_UART2_TX_DMA_CH->CNTR;
|
||||
@@ -371,12 +371,12 @@ void UART2_DataTx_Deal( void )
|
||||
/* If the current serial port has suspended the downlink, restart the driver downlink */
|
||||
if( ( Uart.USB_Down_StopFlag == 0x01 ) && ( Uart.Tx_RemainNum < 2 ) )
|
||||
{
|
||||
USBOTG_FS->UEP2_RX_CTRL &= ~USBFS_UEP_R_RES_MASK;
|
||||
USBOTG_FS->UEP2_RX_CTRL |= USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP2_RX_CTRL &= ~USBFS_UEP_R_RES_MASK;
|
||||
USBFSD->UEP2_RX_CTRL |= USBFS_UEP_R_RES_ACK;
|
||||
Uart.USB_Down_StopFlag = 0x00;
|
||||
}
|
||||
|
||||
NVIC_EnableIRQ( USBHD_IRQn );
|
||||
NVIC_EnableIRQ( USBFS_IRQn );
|
||||
}
|
||||
}
|
||||
else
|
||||
@@ -416,8 +416,8 @@ void UART2_DataRx_Deal( void )
|
||||
uint16_t packlen;
|
||||
|
||||
/* Serial port 1 data DMA receive processing */
|
||||
NVIC_DisableIRQ( USBHD_IRQn );
|
||||
NVIC_DisableIRQ( USBHD_IRQn );
|
||||
NVIC_DisableIRQ( USBFS_IRQn );
|
||||
NVIC_DisableIRQ( USBFS_IRQn );
|
||||
UARTx_Rx_DMACurCount = DEF_UART2_RX_DMA_CH->CNTR;
|
||||
if( UARTx_Rx_DMALastCount != UARTx_Rx_DMACurCount )
|
||||
|
||||
@@ -446,7 +446,7 @@ void UART2_DataRx_Deal( void )
|
||||
/* Setting reception status */
|
||||
Uart.Rx_TimeOut = 0x00;
|
||||
}
|
||||
NVIC_EnableIRQ( USBHD_IRQn );
|
||||
NVIC_EnableIRQ( USBFS_IRQn );
|
||||
|
||||
/*****************************************************************/
|
||||
/* Serial port 1 data processing via USB upload and reception */
|
||||
@@ -476,8 +476,8 @@ void UART2_DataRx_Deal( void )
|
||||
/* Upload serial data via usb */
|
||||
if( packlen )
|
||||
{
|
||||
NVIC_DisableIRQ( USBHD_IRQn );
|
||||
NVIC_DisableIRQ( USBHD_IRQn );
|
||||
NVIC_DisableIRQ( USBFS_IRQn );
|
||||
NVIC_DisableIRQ( USBFS_IRQn );
|
||||
Uart.USB_Up_IngFlag = 0x01;
|
||||
Uart.USB_Up_TimeOut = 0x00;
|
||||
USBFS_Endp_DataUp( DEF_UEP3, &UART2_Rx_Buf[ Uart.Rx_DealPtr ], packlen, DEF_UEP_CPY_LOAD );
|
||||
@@ -495,7 +495,7 @@ void UART2_DataRx_Deal( void )
|
||||
Uart.USB_Up_Pack0_Flag = 0x01;
|
||||
}
|
||||
|
||||
NVIC_EnableIRQ( USBHD_IRQn );
|
||||
NVIC_EnableIRQ( USBFS_IRQn );
|
||||
}
|
||||
}
|
||||
else
|
||||
@@ -517,14 +517,14 @@ void UART2_DataRx_Deal( void )
|
||||
{
|
||||
if( Uart.USB_Up_TimeOut >= ( DEF_UARTx_RX_TIMEOUT * 20 ) )
|
||||
{
|
||||
NVIC_DisableIRQ( USBHD_IRQn );
|
||||
NVIC_DisableIRQ( USBHD_IRQn );
|
||||
NVIC_DisableIRQ( USBFS_IRQn );
|
||||
NVIC_DisableIRQ( USBFS_IRQn );
|
||||
Uart.USB_Up_IngFlag = 0x01;
|
||||
Uart.USB_Up_TimeOut = 0x00;
|
||||
USBFS_Endp_DataUp( DEF_UEP3, &UART2_Rx_Buf[ Uart.Rx_DealPtr ], 0, DEF_UEP_CPY_LOAD );
|
||||
Uart.USB_Up_IngFlag = 0;
|
||||
Uart.USB_Up_Pack0_Flag = 0x00;
|
||||
NVIC_EnableIRQ( USBHD_IRQn );
|
||||
NVIC_EnableIRQ( USBFS_IRQn );
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@@ -3,7 +3,7 @@
|
||||
* Author : WCH
|
||||
* Version : V1.0.0
|
||||
* Date : 2022/08/20
|
||||
* Description : This file provides all the USBOTG firmware functions.
|
||||
* Description : This file provides all the USBFS firmware functions.
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
@@ -50,12 +50,12 @@ volatile uint8_t USBFS_Endp_Busy[ DEF_UEP_NUM ];
|
||||
|
||||
/******************************************************************************/
|
||||
/* Interrupt Service Routine Declaration*/
|
||||
void USBHD_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
void USBFS_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
|
||||
/*********************************************************************
|
||||
* @fn USBFS_RCC_Init
|
||||
*
|
||||
* @brief Initializes the usbotg clock configuration.
|
||||
* @brief Initializes the usbfs clock configuration.
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
@@ -73,7 +73,7 @@ void USBFS_RCC_Init( void )
|
||||
{
|
||||
RCC_USBCLKConfig( RCC_USBCLKSource_PLLCLK_Div1 );
|
||||
}
|
||||
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_OTG_FS, ENABLE );
|
||||
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_USBFS, ENABLE );
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
@@ -86,28 +86,28 @@ void USBFS_RCC_Init( void )
|
||||
void USBFS_Device_Endp_Init( void )
|
||||
{
|
||||
|
||||
USBOTG_FS->UEP4_1_MOD = USBFS_UEP1_TX_EN|USBFS_UEP4_TX_EN|USBFS_UEP4_RX_EN;
|
||||
USBOTG_FS->UEP2_3_MOD = USBFS_UEP2_RX_EN|USBFS_UEP3_TX_EN;
|
||||
USBFSD->UEP4_1_MOD = USBFS_UEP1_TX_EN|USBFS_UEP4_TX_EN|USBFS_UEP4_RX_EN;
|
||||
USBFSD->UEP2_3_MOD = USBFS_UEP2_RX_EN|USBFS_UEP3_TX_EN;
|
||||
|
||||
USBOTG_FS->UEP0_DMA = (uint32_t)USBFS_EP0_Buf;
|
||||
USBFSD->UEP0_DMA = (uint32_t)USBFS_EP0_Buf;
|
||||
|
||||
USBOTG_FS->UEP1_DMA = (uint32_t)USBFS_EP1_Buf;
|
||||
USBOTG_FS->UEP2_DMA = (uint32_t)UART2_Tx_Buf;
|
||||
USBOTG_FS->UEP3_DMA = (uint32_t)USBFS_EP3_Buf;
|
||||
USBOTG_FS->UEP4_DMA = (uint32_t)USBFS_EP4_Buf;
|
||||
USBFSD->UEP1_DMA = (uint32_t)USBFS_EP1_Buf;
|
||||
USBFSD->UEP2_DMA = (uint32_t)UART2_Tx_Buf;
|
||||
USBFSD->UEP3_DMA = (uint32_t)USBFS_EP3_Buf;
|
||||
USBFSD->UEP4_DMA = (uint32_t)USBFS_EP4_Buf;
|
||||
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBOTG_FS->UEP2_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBOTG_FS->UEP4_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP2_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP4_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
|
||||
USBOTG_FS->UEP1_TX_LEN = 0;
|
||||
USBOTG_FS->UEP3_TX_LEN = 0;
|
||||
USBOTG_FS->UEP4_TX_LEN = 0;
|
||||
USBFSD->UEP1_TX_LEN = 0;
|
||||
USBFSD->UEP3_TX_LEN = 0;
|
||||
USBFSD->UEP4_TX_LEN = 0;
|
||||
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBOTG_FS->UEP1_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBOTG_FS->UEP3_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBOTG_FS->UEP4_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP1_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP3_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP4_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
|
||||
/* Clear End-points Busy Status */
|
||||
for(uint8_t i=0; i<DEF_UEP_NUM; i++ )
|
||||
@@ -127,21 +127,21 @@ void USBFS_Device_Init( FunctionalState sta )
|
||||
{
|
||||
if( sta )
|
||||
{
|
||||
USBOTG_H_FS->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
USBFSH->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
Delay_Us( 10 );
|
||||
USBOTG_H_FS->BASE_CTRL = 0x00;
|
||||
USBOTG_FS->INT_EN = USBFS_UIE_SUSPEND | USBFS_UIE_BUS_RST | USBFS_UIE_TRANSFER;
|
||||
USBOTG_FS->BASE_CTRL = USBFS_UC_DEV_PU_EN | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
|
||||
USBFSH->BASE_CTRL = 0x00;
|
||||
USBFSD->INT_EN = USBFS_UIE_SUSPEND | USBFS_UIE_BUS_RST | USBFS_UIE_TRANSFER;
|
||||
USBFSD->BASE_CTRL = USBFS_UC_DEV_PU_EN | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
|
||||
USBFS_Device_Endp_Init( );
|
||||
USBOTG_FS->UDEV_CTRL = USBFS_UD_PD_DIS | USBFS_UD_PORT_EN;
|
||||
NVIC_EnableIRQ( USBHD_IRQn );
|
||||
USBFSD->UDEV_CTRL = USBFS_UD_PD_DIS | USBFS_UD_PORT_EN;
|
||||
NVIC_EnableIRQ( USBFS_IRQn );
|
||||
}
|
||||
else
|
||||
{
|
||||
USBOTG_H_FS->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
USBFSH->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
Delay_Us( 10 );
|
||||
USBOTG_FS->BASE_CTRL = 0x00;
|
||||
NVIC_DisableIRQ( USBHD_IRQn );
|
||||
USBFSD->BASE_CTRL = 0x00;
|
||||
NVIC_DisableIRQ( USBFS_IRQn );
|
||||
}
|
||||
}
|
||||
|
||||
@@ -245,20 +245,20 @@ uint8_t USBFS_Endp_DataUp(uint8_t endp, uint8_t *pbuf, uint16_t len, uint8_t mod
|
||||
|
||||
|
||||
/*********************************************************************
|
||||
* @fn USBHD_IRQHandler
|
||||
* @fn USBFS_IRQHandler
|
||||
*
|
||||
* @brief This function handles HD-FS exception.
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
void USBHD_IRQHandler( void )
|
||||
void USBFS_IRQHandler( void )
|
||||
{
|
||||
uint8_t intflag, intst, errflag;
|
||||
uint16_t len, i;
|
||||
uint32_t baudrate;
|
||||
|
||||
intflag = USBOTG_FS->INT_FG;
|
||||
intst = USBOTG_FS->INT_ST;
|
||||
intflag = USBFSD->INT_FG;
|
||||
intst = USBFSD->INT_ST;
|
||||
|
||||
if( intflag & USBFS_UIF_TRANSFER )
|
||||
{
|
||||
@@ -272,7 +272,7 @@ void USBHD_IRQHandler( void )
|
||||
case USBFS_UIS_TOKEN_IN | DEF_UEP0:
|
||||
if( USBFS_SetupReqLen == 0 )
|
||||
{
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_ACK;
|
||||
}
|
||||
if ( ( USBFS_SetupReqType & USB_REQ_TYP_MASK ) != USB_REQ_TYP_STANDARD )
|
||||
{
|
||||
@@ -288,12 +288,12 @@ void USBHD_IRQHandler( void )
|
||||
memcpy( USBFS_EP0_Buf, pUSBFS_Descr, len );
|
||||
USBFS_SetupReqLen -= len;
|
||||
pUSBFS_Descr += len;
|
||||
USBOTG_FS->UEP0_TX_LEN = len;
|
||||
USBOTG_FS->UEP0_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBFSD->UEP0_TX_LEN = len;
|
||||
USBFSD->UEP0_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
break;
|
||||
|
||||
case USB_SET_ADDRESS:
|
||||
USBOTG_FS->DEV_ADDR = (USBOTG_FS->DEV_ADDR & USBFS_UDA_GP_BIT) | USBFS_DevAddr;
|
||||
USBFSD->DEV_ADDR = (USBFSD->DEV_ADDR & USBFS_UDA_GP_BIT) | USBFS_DevAddr;
|
||||
break;
|
||||
|
||||
default:
|
||||
@@ -304,23 +304,23 @@ void USBHD_IRQHandler( void )
|
||||
|
||||
/* end-point 1 data in interrupt */
|
||||
case ( USBFS_UIS_TOKEN_IN | DEF_UEP1 ):
|
||||
USBOTG_FS->UEP1_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBOTG_FS->UEP1_TX_CTRL = (USBOTG_FS->UEP1_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP1_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBFSD->UEP1_TX_CTRL = (USBFSD->UEP1_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
|
||||
USBFS_Endp_Busy[ DEF_UEP1 ] = 0;
|
||||
break;
|
||||
|
||||
/* end-point 3 data in interrupt */
|
||||
case ( USBFS_UIS_TOKEN_IN | DEF_UEP3 ):
|
||||
USBOTG_FS->UEP3_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBOTG_FS->UEP3_TX_CTRL = (USBOTG_FS->UEP3_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP3_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBFSD->UEP3_TX_CTRL = (USBFSD->UEP3_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
|
||||
USBFS_Endp_Busy[ DEF_UEP3 ] = 0;
|
||||
Uart.USB_Up_IngFlag = 0x00;
|
||||
break;
|
||||
|
||||
/* end-point 4 data in interrupt */
|
||||
case ( USBFS_UIS_TOKEN_IN | DEF_UEP4 ):
|
||||
USBOTG_FS->UEP4_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBOTG_FS->UEP4_TX_CTRL = (USBOTG_FS->UEP4_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP4_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBFSD->UEP4_TX_CTRL = (USBFSD->UEP4_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
|
||||
USBFS_Endp_Busy[ DEF_UEP4 ] = 0;
|
||||
break;
|
||||
|
||||
@@ -335,7 +335,7 @@ void USBHD_IRQHandler( void )
|
||||
{
|
||||
/* end-point 0 data out interrupt */
|
||||
case USBFS_UIS_TOKEN_OUT | DEF_UEP0:
|
||||
len = USBOTG_FS->RX_LEN;
|
||||
len = USBFSD->RX_LEN;
|
||||
if ( intst & USBFS_UIS_TOG_OK )
|
||||
{
|
||||
if ( ( USBFS_SetupReqType & USB_REQ_TYP_MASK ) != USB_REQ_TYP_STANDARD )
|
||||
@@ -375,8 +375,8 @@ void USBHD_IRQHandler( void )
|
||||
memcpy(&HID_Report_Buffer[Hid_Report_Ptr],USBFS_EP0_Buf,len);
|
||||
USBFS_SetupReqLen -= len;
|
||||
Hid_Report_Ptr += len;
|
||||
USBOTG_FS->UEP0_RX_CTRL ^= USBFS_UEP_R_TOG;
|
||||
USBOTG_FS->UEP0_RX_CTRL = (USBOTG_FS->UEP0_RX_CTRL & USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP0_RX_CTRL ^= USBFS_UEP_R_TOG;
|
||||
USBFSD->UEP0_RX_CTRL = (USBFSD->UEP0_RX_CTRL & USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_ACK;
|
||||
}
|
||||
}
|
||||
else
|
||||
@@ -386,46 +386,46 @@ void USBHD_IRQHandler( void )
|
||||
}
|
||||
if( USBFS_SetupReqLen == 0 )
|
||||
{
|
||||
USBOTG_FS->UEP0_TX_LEN = 0;
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_ACK;
|
||||
USBFSD->UEP0_TX_LEN = 0;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_ACK;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
/* end-point 2 data out interrupt */
|
||||
case USBFS_UIS_TOKEN_OUT | DEF_UEP2:
|
||||
USBOTG_FS->UEP2_RX_CTRL ^= USBFS_UEP_R_TOG;
|
||||
USBFSD->UEP2_RX_CTRL ^= USBFS_UEP_R_TOG;
|
||||
|
||||
Uart.Tx_PackLen[ Uart.Tx_LoadNum ] = USBOTG_FS->RX_LEN;
|
||||
Uart.Tx_PackLen[ Uart.Tx_LoadNum ] = USBFSD->RX_LEN;
|
||||
Uart.Tx_LoadNum++;
|
||||
USBOTG_FS->UEP2_DMA = (uint32_t)(uint8_t *)&UART2_Tx_Buf[ ( Uart.Tx_LoadNum * DEF_USB_FS_PACK_LEN ) ];
|
||||
USBFSD->UEP2_DMA = (uint32_t)(uint8_t *)&UART2_Tx_Buf[ ( Uart.Tx_LoadNum * DEF_USB_FS_PACK_LEN ) ];
|
||||
if( Uart.Tx_LoadNum >= DEF_UARTx_TX_BUF_NUM_MAX )
|
||||
{
|
||||
Uart.Tx_LoadNum = 0x00;
|
||||
USBOTG_FS->UEP2_DMA = (uint32_t)(uint8_t *)&UART2_Tx_Buf[ 0 ];
|
||||
USBFSD->UEP2_DMA = (uint32_t)(uint8_t *)&UART2_Tx_Buf[ 0 ];
|
||||
}
|
||||
Uart.Tx_RemainNum++;
|
||||
|
||||
if( Uart.Tx_RemainNum >= ( DEF_UARTx_TX_BUF_NUM_MAX - 2 ) )
|
||||
{
|
||||
USBOTG_FS->UEP2_RX_CTRL &= ~USBFS_UEP_R_RES_MASK;
|
||||
USBOTG_FS->UEP2_RX_CTRL |= USBFS_UEP_R_RES_NAK;
|
||||
USBFSD->UEP2_RX_CTRL &= ~USBFS_UEP_R_RES_MASK;
|
||||
USBFSD->UEP2_RX_CTRL |= USBFS_UEP_R_RES_NAK;
|
||||
Uart.USB_Down_StopFlag = 0x01;
|
||||
}
|
||||
break;
|
||||
|
||||
/* end-point 4 data out interrupt */
|
||||
case USBFS_UIS_TOKEN_OUT | DEF_UEP4:
|
||||
USBOTG_FS->UEP4_RX_CTRL ^= USBFS_UEP_R_TOG;
|
||||
USBFSD->UEP4_RX_CTRL ^= USBFS_UEP_R_TOG;
|
||||
/* Reverse the data and re-upload */
|
||||
len = USBOTG_FS->RX_LEN;
|
||||
len = USBFSD->RX_LEN;
|
||||
for( i = 0; i < len; i++ )
|
||||
{
|
||||
USBFS_EP4_Buf[ i + 64 ] = ~USBFS_EP4_Buf[ i ];
|
||||
}
|
||||
USBOTG_FS->UEP4_TX_LEN = len;
|
||||
USBOTG_FS->UEP4_TX_CTRL &= ~USBFS_UEP_R_RES_MASK;
|
||||
USBOTG_FS->UEP4_TX_CTRL |= USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP4_TX_LEN = len;
|
||||
USBFSD->UEP4_TX_CTRL &= ~USBFS_UEP_R_RES_MASK;
|
||||
USBFSD->UEP4_TX_CTRL |= USBFS_UEP_R_RES_ACK;
|
||||
break;
|
||||
|
||||
default:
|
||||
@@ -435,8 +435,8 @@ void USBHD_IRQHandler( void )
|
||||
|
||||
/* Setup stage processing */
|
||||
case USBFS_UIS_TOKEN_SETUP:
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_NAK;
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_NAK;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_NAK;
|
||||
/* Store All Setup Values */
|
||||
USBFS_SetupReqType = pUSBFS_SetupReqPak->bRequestType;
|
||||
USBFS_SetupReqCode = pUSBFS_SetupReqPak->bRequest;
|
||||
@@ -679,27 +679,27 @@ void USBHD_IRQHandler( void )
|
||||
{
|
||||
case ( DEF_UEP_IN | DEF_UEP1 ):
|
||||
/* Set End-point 1 IN NAK */
|
||||
USBOTG_FS->UEP1_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP1_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_OUT | DEF_UEP2 ):
|
||||
/* Set End-point 2 OUT ACK */
|
||||
USBOTG_FS->UEP2_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP2_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_IN | DEF_UEP3 ):
|
||||
/* Set End-point 3 IN NAK */
|
||||
USBOTG_FS->UEP3_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP3_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_IN | DEF_UEP4 ):
|
||||
/* Set End-point 4 IN NAK */
|
||||
USBOTG_FS->UEP4_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP4_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_OUT | DEF_UEP4 ):
|
||||
/* Set End-point 4 OUT ACK */
|
||||
USBOTG_FS->UEP4_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP4_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
break;
|
||||
|
||||
default:
|
||||
@@ -750,27 +750,27 @@ void USBHD_IRQHandler( void )
|
||||
{
|
||||
case ( DEF_UEP_IN | DEF_UEP1 ):
|
||||
/* Set End-point 1 IN STALL */
|
||||
USBOTG_FS->UEP1_TX_CTRL = ( USBOTG_FS->UEP1_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
USBFSD->UEP1_TX_CTRL = ( USBFSD->UEP1_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_OUT | DEF_UEP2 ):
|
||||
/* Set End-point 2 OUT STALL */
|
||||
USBOTG_FS->UEP2_RX_CTRL = ( USBOTG_FS->UEP2_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
|
||||
USBFSD->UEP2_RX_CTRL = ( USBFSD->UEP2_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_IN | DEF_UEP3 ):
|
||||
/* Set End-point 3 IN STALL */
|
||||
USBOTG_FS->UEP3_TX_CTRL = ( USBOTG_FS->UEP3_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
USBFSD->UEP3_TX_CTRL = ( USBFSD->UEP3_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_IN | DEF_UEP4 ):
|
||||
/* Set End-point 4 IN STALL */
|
||||
USBOTG_FS->UEP4_TX_CTRL = ( USBOTG_FS->UEP4_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
USBFSD->UEP4_TX_CTRL = ( USBFSD->UEP4_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_OUT | DEF_UEP4 ):
|
||||
/* Set End-point 4 OUT STALL */
|
||||
USBOTG_FS->UEP4_RX_CTRL = ( USBOTG_FS->UEP4_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
|
||||
USBFSD->UEP4_RX_CTRL = ( USBFSD->UEP4_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
|
||||
break;
|
||||
|
||||
default:
|
||||
@@ -817,35 +817,35 @@ void USBHD_IRQHandler( void )
|
||||
switch( (uint8_t)( USBFS_SetupReqIndex & 0xFF ) )
|
||||
{
|
||||
case ( DEF_UEP_IN | DEF_UEP1 ):
|
||||
if( ( (USBOTG_FS->UEP1_TX_CTRL) & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
|
||||
if( ( (USBFSD->UEP1_TX_CTRL) & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
|
||||
{
|
||||
USBFS_EP0_Buf[ 0 ] = 0x01;
|
||||
}
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_OUT | DEF_UEP2 ):
|
||||
if( ( (USBOTG_FS->UEP2_RX_CTRL) & USBFS_UEP_R_RES_MASK ) == USBFS_UEP_R_RES_STALL )
|
||||
if( ( (USBFSD->UEP2_RX_CTRL) & USBFS_UEP_R_RES_MASK ) == USBFS_UEP_R_RES_STALL )
|
||||
{
|
||||
USBFS_EP0_Buf[ 0 ] = 0x01;
|
||||
}
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_IN | DEF_UEP3 ):
|
||||
if( ( (USBOTG_FS->UEP3_TX_CTRL) & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
|
||||
if( ( (USBFSD->UEP3_TX_CTRL) & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
|
||||
{
|
||||
USBFS_EP0_Buf[ 0 ] = 0x01;
|
||||
}
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_IN | DEF_UEP4 ):
|
||||
if( ( (USBOTG_FS->UEP4_TX_CTRL) & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
|
||||
if( ( (USBFSD->UEP4_TX_CTRL) & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
|
||||
{
|
||||
USBFS_EP0_Buf[ 0 ] = 0x01;
|
||||
}
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_OUT | DEF_UEP4 ):
|
||||
if( ( (USBOTG_FS->UEP4_RX_CTRL) & USBFS_UEP_R_RES_MASK ) == USBFS_UEP_R_RES_STALL )
|
||||
if( ( (USBFSD->UEP4_RX_CTRL) & USBFS_UEP_R_RES_MASK ) == USBFS_UEP_R_RES_STALL )
|
||||
{
|
||||
USBFS_EP0_Buf[ 0 ] = 0x01;
|
||||
}
|
||||
@@ -877,8 +877,8 @@ void USBHD_IRQHandler( void )
|
||||
if( errflag == 0xff)
|
||||
{
|
||||
/* if one request not support, return stall */
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_STALL;
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_STALL;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_STALL;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_STALL;
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -888,33 +888,29 @@ void USBHD_IRQHandler( void )
|
||||
/* tx */
|
||||
len = (USBFS_SetupReqLen>DEF_USBD_UEP0_SIZE) ? DEF_USBD_UEP0_SIZE : USBFS_SetupReqLen;
|
||||
USBFS_SetupReqLen -= len;
|
||||
USBOTG_FS->UEP0_TX_LEN = len;
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
|
||||
USBFSD->UEP0_TX_LEN = len;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* rx */
|
||||
if( USBFS_SetupReqLen == 0 )
|
||||
{
|
||||
USBOTG_FS->UEP0_TX_LEN = 0;
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
|
||||
USBFSD->UEP0_TX_LEN = 0;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
|
||||
}
|
||||
else
|
||||
{
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_ACK;
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
/* Sof pack processing */
|
||||
case USBFS_UIS_TOKEN_SOF:
|
||||
break;
|
||||
|
||||
default :
|
||||
break;
|
||||
}
|
||||
USBOTG_FS->INT_FG = USBFS_UIF_TRANSFER;
|
||||
USBFSD->INT_FG = USBFS_UIF_TRANSFER;
|
||||
}
|
||||
else if( intflag & USBFS_UIF_BUS_RST )
|
||||
{
|
||||
@@ -924,15 +920,17 @@ void USBHD_IRQHandler( void )
|
||||
USBFS_DevSleepStatus = 0;
|
||||
USBFS_DevEnumStatus = 0;
|
||||
|
||||
USBOTG_FS->DEV_ADDR = 0;
|
||||
USBFSD->DEV_ADDR = 0;
|
||||
USBFS_Device_Endp_Init( );
|
||||
UART2_ParaInit( 1 );
|
||||
USBOTG_FS->INT_FG = USBFS_UIF_BUS_RST;
|
||||
USBFSD->INT_FG = USBFS_UIF_BUS_RST;
|
||||
}
|
||||
else if( intflag & USBFS_UIF_SUSPEND )
|
||||
{
|
||||
USBFSD->INT_FG = USBFS_UIF_SUSPEND;
|
||||
Delay_Us(10);
|
||||
/* usb suspend interrupt processing */
|
||||
if ( USBOTG_FS->MIS_ST & USBFS_UMS_SUSPEND )
|
||||
if ( USBFSD->MIS_ST & USBFS_UMS_SUSPEND )
|
||||
{
|
||||
USBFS_DevSleepStatus |= 0x02;
|
||||
if( USBFS_DevSleepStatus == 0x03 )
|
||||
@@ -944,12 +942,11 @@ void USBHD_IRQHandler( void )
|
||||
{
|
||||
USBFS_DevSleepStatus &= ~0x02;
|
||||
}
|
||||
USBOTG_FS->INT_FG = USBFS_UIF_SUSPEND;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* other interrupts */
|
||||
USBOTG_FS->INT_FG = intflag;
|
||||
USBFSD->INT_FG = intflag;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2022/08/20
|
||||
* Description : This file contains all the functions prototypes for the
|
||||
* USBOTG firmware library.
|
||||
* USBFS firmware library.
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
|
||||
@@ -25,6 +25,9 @@ void TIM2_IRQHandler( void )__attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
|
||||
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
|
||||
void SystemInit (void)
|
||||
{
|
||||
RCC->CTLR |= (uint32_t)0x00000001;
|
||||
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
|
||||
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
|
||||
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
|
||||
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
|
||||
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
|
||||
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
|
||||
RCC->INTR = 0x009F0000;
|
||||
SetSysClock();
|
||||
}
|
||||
|
||||
@@ -323,9 +323,9 @@ void UART2_USB_Init( void )
|
||||
UART2_Init( 0, baudrate, stopbits, parity );
|
||||
|
||||
/* restart usb receive */
|
||||
USBOTG_FS->UEP2_DMA = (uint32_t)(uint8_t *)&UART2_Tx_Buf[ 0 ];
|
||||
USBOTG_FS->UEP2_RX_CTRL &= ~USBFS_UEP_R_RES_MASK;
|
||||
USBOTG_FS->UEP2_RX_CTRL |= USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP2_DMA = (uint32_t)(uint8_t *)&UART2_Tx_Buf[ 0 ];
|
||||
USBFSD->UEP2_RX_CTRL &= ~USBFS_UEP_R_RES_MASK;
|
||||
USBFSD->UEP2_RX_CTRL |= USBFS_UEP_R_RES_ACK;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
@@ -350,8 +350,8 @@ void UART2_DataTx_Deal( void )
|
||||
|
||||
Uart.Tx_Flag = 0x00;
|
||||
|
||||
NVIC_DisableIRQ( USBHD_IRQn );
|
||||
NVIC_DisableIRQ( USBHD_IRQn );
|
||||
NVIC_DisableIRQ( USBFS_IRQn );
|
||||
NVIC_DisableIRQ( USBFS_IRQn );
|
||||
|
||||
/* Calculate the variables of last data */
|
||||
count = Uart.Tx_CurPackLen - DEF_UART2_TX_DMA_CH->CNTR;
|
||||
@@ -371,12 +371,12 @@ void UART2_DataTx_Deal( void )
|
||||
/* If the current serial port has suspended the downlink, restart the driver downlink */
|
||||
if( ( Uart.USB_Down_StopFlag == 0x01 ) && ( Uart.Tx_RemainNum < 2 ) )
|
||||
{
|
||||
USBOTG_FS->UEP2_RX_CTRL &= ~USBFS_UEP_R_RES_MASK;
|
||||
USBOTG_FS->UEP2_RX_CTRL |= USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP2_RX_CTRL &= ~USBFS_UEP_R_RES_MASK;
|
||||
USBFSD->UEP2_RX_CTRL |= USBFS_UEP_R_RES_ACK;
|
||||
Uart.USB_Down_StopFlag = 0x00;
|
||||
}
|
||||
|
||||
NVIC_EnableIRQ( USBHD_IRQn );
|
||||
NVIC_EnableIRQ( USBFS_IRQn );
|
||||
}
|
||||
}
|
||||
else
|
||||
@@ -416,8 +416,8 @@ void UART2_DataRx_Deal( void )
|
||||
uint16_t packlen;
|
||||
|
||||
/* Serial port 1 data DMA receive processing */
|
||||
NVIC_DisableIRQ( USBHD_IRQn );
|
||||
NVIC_DisableIRQ( USBHD_IRQn );
|
||||
NVIC_DisableIRQ( USBFS_IRQn );
|
||||
NVIC_DisableIRQ( USBFS_IRQn );
|
||||
UARTx_Rx_DMACurCount = DEF_UART2_RX_DMA_CH->CNTR;
|
||||
if( UARTx_Rx_DMALastCount != UARTx_Rx_DMACurCount )
|
||||
|
||||
@@ -446,7 +446,7 @@ void UART2_DataRx_Deal( void )
|
||||
/* Setting reception status */
|
||||
Uart.Rx_TimeOut = 0x00;
|
||||
}
|
||||
NVIC_EnableIRQ( USBHD_IRQn );
|
||||
NVIC_EnableIRQ( USBFS_IRQn );
|
||||
|
||||
/*****************************************************************/
|
||||
/* Serial port 1 data processing via USB upload and reception */
|
||||
@@ -476,8 +476,8 @@ void UART2_DataRx_Deal( void )
|
||||
/* Upload serial data via usb */
|
||||
if( packlen )
|
||||
{
|
||||
NVIC_DisableIRQ( USBHD_IRQn );
|
||||
NVIC_DisableIRQ( USBHD_IRQn );
|
||||
NVIC_DisableIRQ( USBFS_IRQn );
|
||||
NVIC_DisableIRQ( USBFS_IRQn );
|
||||
Uart.USB_Up_IngFlag = 0x01;
|
||||
Uart.USB_Up_TimeOut = 0x00;
|
||||
USBFS_Endp_DataUp( DEF_UEP3, &UART2_Rx_Buf[ Uart.Rx_DealPtr ], packlen, DEF_UEP_CPY_LOAD );
|
||||
@@ -495,7 +495,7 @@ void UART2_DataRx_Deal( void )
|
||||
Uart.USB_Up_Pack0_Flag = 0x01;
|
||||
}
|
||||
|
||||
NVIC_EnableIRQ( USBHD_IRQn );
|
||||
NVIC_EnableIRQ( USBFS_IRQn );
|
||||
}
|
||||
}
|
||||
else
|
||||
@@ -517,14 +517,14 @@ void UART2_DataRx_Deal( void )
|
||||
{
|
||||
if( Uart.USB_Up_TimeOut >= ( DEF_UARTx_RX_TIMEOUT * 20 ) )
|
||||
{
|
||||
NVIC_DisableIRQ( USBHD_IRQn );
|
||||
NVIC_DisableIRQ( USBHD_IRQn );
|
||||
NVIC_DisableIRQ( USBFS_IRQn );
|
||||
NVIC_DisableIRQ( USBFS_IRQn );
|
||||
Uart.USB_Up_IngFlag = 0x01;
|
||||
Uart.USB_Up_TimeOut = 0x00;
|
||||
USBFS_Endp_DataUp( DEF_UEP3, &UART2_Rx_Buf[ Uart.Rx_DealPtr ], 0, DEF_UEP_CPY_LOAD );
|
||||
Uart.USB_Up_IngFlag = 0;
|
||||
Uart.USB_Up_Pack0_Flag = 0x00;
|
||||
NVIC_EnableIRQ( USBHD_IRQn );
|
||||
NVIC_EnableIRQ( USBFS_IRQn );
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@@ -3,7 +3,7 @@
|
||||
* Author : WCH
|
||||
* Version : V1.0.0
|
||||
* Date : 2022/08/20
|
||||
* Description : This file provides all the USBOTG firmware functions.
|
||||
* Description : This file provides all the USBFS firmware functions.
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
@@ -41,12 +41,12 @@ volatile uint8_t USBFS_Endp_Busy[ DEF_UEP_NUM ];
|
||||
|
||||
/******************************************************************************/
|
||||
/* Interrupt Service Routine Declaration*/
|
||||
void USBHD_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
void USBFS_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
|
||||
/*********************************************************************
|
||||
* @fn USBFS_RCC_Init
|
||||
*
|
||||
* @brief Initializes the usbotg clock configuration.
|
||||
* @brief Initializes the usbfs clock configuration.
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
@@ -64,7 +64,7 @@ void USBFS_RCC_Init( void )
|
||||
{
|
||||
RCC_USBCLKConfig( RCC_USBCLKSource_PLLCLK_Div1 );
|
||||
}
|
||||
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_OTG_FS, ENABLE );
|
||||
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_USBFS, ENABLE );
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
@@ -77,24 +77,24 @@ void USBFS_RCC_Init( void )
|
||||
void USBFS_Device_Endp_Init( void )
|
||||
{
|
||||
|
||||
USBOTG_FS->UEP4_1_MOD = USBFS_UEP1_TX_EN;
|
||||
USBOTG_FS->UEP2_3_MOD = USBFS_UEP2_RX_EN|USBFS_UEP3_TX_EN;
|
||||
USBFSD->UEP4_1_MOD = USBFS_UEP1_TX_EN;
|
||||
USBFSD->UEP2_3_MOD = USBFS_UEP2_RX_EN|USBFS_UEP3_TX_EN;
|
||||
|
||||
USBOTG_FS->UEP0_DMA = (uint32_t)USBFS_EP0_Buf;
|
||||
USBFSD->UEP0_DMA = (uint32_t)USBFS_EP0_Buf;
|
||||
|
||||
USBOTG_FS->UEP1_DMA = (uint32_t)USBFS_EP1_Buf;
|
||||
USBOTG_FS->UEP2_DMA = (uint32_t)UART2_Tx_Buf;
|
||||
USBOTG_FS->UEP3_DMA = (uint32_t)USBFS_EP3_Buf;
|
||||
USBFSD->UEP1_DMA = (uint32_t)USBFS_EP1_Buf;
|
||||
USBFSD->UEP2_DMA = (uint32_t)UART2_Tx_Buf;
|
||||
USBFSD->UEP3_DMA = (uint32_t)USBFS_EP3_Buf;
|
||||
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBOTG_FS->UEP2_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP2_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
|
||||
USBOTG_FS->UEP1_TX_LEN = 0;
|
||||
USBOTG_FS->UEP3_TX_LEN = 0;
|
||||
USBFSD->UEP1_TX_LEN = 0;
|
||||
USBFSD->UEP3_TX_LEN = 0;
|
||||
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBOTG_FS->UEP1_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBOTG_FS->UEP3_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP1_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP3_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
|
||||
/* Clear End-points Busy Status */
|
||||
for(uint8_t i=0; i<DEF_UEP_NUM; i++ )
|
||||
@@ -114,21 +114,21 @@ void USBFS_Device_Init( FunctionalState sta )
|
||||
{
|
||||
if( sta )
|
||||
{
|
||||
USBOTG_H_FS->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
USBFSH->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
Delay_Us( 10 );
|
||||
USBOTG_H_FS->BASE_CTRL = 0x00;
|
||||
USBOTG_FS->INT_EN = USBFS_UIE_SUSPEND | USBFS_UIE_BUS_RST | USBFS_UIE_TRANSFER;
|
||||
USBOTG_FS->BASE_CTRL = USBFS_UC_DEV_PU_EN | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
|
||||
USBFSH->BASE_CTRL = 0x00;
|
||||
USBFSD->INT_EN = USBFS_UIE_SUSPEND | USBFS_UIE_BUS_RST | USBFS_UIE_TRANSFER;
|
||||
USBFSD->BASE_CTRL = USBFS_UC_DEV_PU_EN | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
|
||||
USBFS_Device_Endp_Init( );
|
||||
USBOTG_FS->UDEV_CTRL = USBFS_UD_PD_DIS | USBFS_UD_PORT_EN;
|
||||
NVIC_EnableIRQ( USBHD_IRQn );
|
||||
USBFSD->UDEV_CTRL = USBFS_UD_PD_DIS | USBFS_UD_PORT_EN;
|
||||
NVIC_EnableIRQ( USBFS_IRQn );
|
||||
}
|
||||
else
|
||||
{
|
||||
USBOTG_H_FS->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
USBFSH->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
Delay_Us( 10 );
|
||||
USBOTG_FS->BASE_CTRL = 0x00;
|
||||
NVIC_DisableIRQ( USBHD_IRQn );
|
||||
USBFSD->BASE_CTRL = 0x00;
|
||||
NVIC_DisableIRQ( USBFS_IRQn );
|
||||
}
|
||||
}
|
||||
|
||||
@@ -232,20 +232,20 @@ uint8_t USBFS_Endp_DataUp(uint8_t endp, uint8_t *pbuf, uint16_t len, uint8_t mod
|
||||
|
||||
|
||||
/*********************************************************************
|
||||
* @fn USBHD_IRQHandler
|
||||
* @fn USBFS_IRQHandler
|
||||
*
|
||||
* @brief This function handles HD-FS exception.
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
void USBHD_IRQHandler( void )
|
||||
void USBFS_IRQHandler( void )
|
||||
{
|
||||
uint8_t intflag, intst, errflag;
|
||||
uint16_t len;
|
||||
uint32_t baudrate;
|
||||
|
||||
intflag = USBOTG_FS->INT_FG;
|
||||
intst = USBOTG_FS->INT_ST;
|
||||
intflag = USBFSD->INT_FG;
|
||||
intst = USBFSD->INT_ST;
|
||||
|
||||
if( intflag & USBFS_UIF_TRANSFER )
|
||||
{
|
||||
@@ -259,7 +259,7 @@ void USBHD_IRQHandler( void )
|
||||
case USBFS_UIS_TOKEN_IN | DEF_UEP0:
|
||||
if( USBFS_SetupReqLen == 0 )
|
||||
{
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_ACK;
|
||||
}
|
||||
if ( ( USBFS_SetupReqType & USB_REQ_TYP_MASK ) != USB_REQ_TYP_STANDARD )
|
||||
{
|
||||
@@ -275,12 +275,12 @@ void USBHD_IRQHandler( void )
|
||||
memcpy( USBFS_EP0_Buf, pUSBFS_Descr, len );
|
||||
USBFS_SetupReqLen -= len;
|
||||
pUSBFS_Descr += len;
|
||||
USBOTG_FS->UEP0_TX_LEN = len;
|
||||
USBOTG_FS->UEP0_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBFSD->UEP0_TX_LEN = len;
|
||||
USBFSD->UEP0_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
break;
|
||||
|
||||
case USB_SET_ADDRESS:
|
||||
USBOTG_FS->DEV_ADDR = (USBOTG_FS->DEV_ADDR & USBFS_UDA_GP_BIT) | USBFS_DevAddr;
|
||||
USBFSD->DEV_ADDR = (USBFSD->DEV_ADDR & USBFS_UDA_GP_BIT) | USBFS_DevAddr;
|
||||
break;
|
||||
|
||||
default:
|
||||
@@ -291,15 +291,15 @@ void USBHD_IRQHandler( void )
|
||||
|
||||
/* end-point 1 data in interrupt */
|
||||
case ( USBFS_UIS_TOKEN_IN | DEF_UEP1 ):
|
||||
USBOTG_FS->UEP1_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBOTG_FS->UEP1_TX_CTRL = (USBOTG_FS->UEP1_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP1_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBFSD->UEP1_TX_CTRL = (USBFSD->UEP1_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
|
||||
USBFS_Endp_Busy[ DEF_UEP1 ] = 0;
|
||||
break;
|
||||
|
||||
/* end-point 3 data in interrupt */
|
||||
case ( USBFS_UIS_TOKEN_IN | DEF_UEP3 ):
|
||||
USBOTG_FS->UEP3_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBOTG_FS->UEP3_TX_CTRL = (USBOTG_FS->UEP3_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP3_TX_CTRL ^= USBFS_UEP_T_TOG;
|
||||
USBFSD->UEP3_TX_CTRL = (USBFSD->UEP3_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
|
||||
USBFS_Endp_Busy[ DEF_UEP3 ] = 0;
|
||||
Uart.USB_Up_IngFlag = 0x00;
|
||||
break;
|
||||
@@ -315,7 +315,7 @@ void USBHD_IRQHandler( void )
|
||||
{
|
||||
/* end-point 0 data out interrupt */
|
||||
case USBFS_UIS_TOKEN_OUT | DEF_UEP0:
|
||||
len = USBOTG_FS->RX_LEN;
|
||||
len = USBFSD->RX_LEN;
|
||||
if ( intst & USBFS_UIS_TOG_OK )
|
||||
{
|
||||
if ( ( USBFS_SetupReqType & USB_REQ_TYP_MASK ) != USB_REQ_TYP_STANDARD )
|
||||
@@ -356,28 +356,28 @@ void USBHD_IRQHandler( void )
|
||||
}
|
||||
if( USBFS_SetupReqLen == 0 )
|
||||
{
|
||||
USBOTG_FS->UEP0_TX_LEN = 0;
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_ACK;
|
||||
USBFSD->UEP0_TX_LEN = 0;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_ACK;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
/* end-point 1 data out interrupt */
|
||||
case USBFS_UIS_TOKEN_OUT | DEF_UEP2:
|
||||
USBOTG_FS->UEP2_RX_CTRL ^= USBFS_UEP_R_TOG;
|
||||
Uart.Tx_PackLen[ Uart.Tx_LoadNum ] = USBOTG_FS->RX_LEN;
|
||||
USBFSD->UEP2_RX_CTRL ^= USBFS_UEP_R_TOG;
|
||||
Uart.Tx_PackLen[ Uart.Tx_LoadNum ] = USBFSD->RX_LEN;
|
||||
Uart.Tx_LoadNum++;
|
||||
USBOTG_FS->UEP2_DMA = (uint32_t)(uint8_t *)&UART2_Tx_Buf[ ( Uart.Tx_LoadNum * DEF_USB_FS_PACK_LEN ) ];
|
||||
USBFSD->UEP2_DMA = (uint32_t)(uint8_t *)&UART2_Tx_Buf[ ( Uart.Tx_LoadNum * DEF_USB_FS_PACK_LEN ) ];
|
||||
if( Uart.Tx_LoadNum >= DEF_UARTx_TX_BUF_NUM_MAX )
|
||||
{
|
||||
Uart.Tx_LoadNum = 0x00;
|
||||
USBOTG_FS->UEP2_DMA = (uint32_t)(uint8_t *)&UART2_Tx_Buf[ 0 ];
|
||||
USBFSD->UEP2_DMA = (uint32_t)(uint8_t *)&UART2_Tx_Buf[ 0 ];
|
||||
}
|
||||
Uart.Tx_RemainNum++;
|
||||
if( Uart.Tx_RemainNum >= ( DEF_UARTx_TX_BUF_NUM_MAX - 2 ) )
|
||||
{
|
||||
USBOTG_FS->UEP2_RX_CTRL &= ~USBFS_UEP_R_RES_MASK;
|
||||
USBOTG_FS->UEP2_RX_CTRL |= USBFS_UEP_R_RES_NAK;
|
||||
USBFSD->UEP2_RX_CTRL &= ~USBFS_UEP_R_RES_MASK;
|
||||
USBFSD->UEP2_RX_CTRL |= USBFS_UEP_R_RES_NAK;
|
||||
Uart.USB_Down_StopFlag = 0x01;
|
||||
}
|
||||
break;
|
||||
@@ -389,8 +389,8 @@ void USBHD_IRQHandler( void )
|
||||
|
||||
/* Setup stage processing */
|
||||
case USBFS_UIS_TOKEN_SETUP:
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_NAK;
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_NAK;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_NAK;
|
||||
/* Store All Setup Values */
|
||||
USBFS_SetupReqType = pUSBFS_SetupReqPak->bRequestType;
|
||||
USBFS_SetupReqCode = pUSBFS_SetupReqPak->bRequest;
|
||||
@@ -550,17 +550,17 @@ void USBHD_IRQHandler( void )
|
||||
{
|
||||
case ( DEF_UEP_IN | DEF_UEP1 ):
|
||||
/* Set End-point 1 IN NAK */
|
||||
USBOTG_FS->UEP1_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP1_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_OUT | DEF_UEP2 ):
|
||||
/* Set End-point 2 OUT ACK */
|
||||
USBOTG_FS->UEP2_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP2_RX_CTRL = USBFS_UEP_R_RES_ACK;
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_IN | DEF_UEP3 ):
|
||||
/* Set End-point 3 IN NAK */
|
||||
USBOTG_FS->UEP3_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
USBFSD->UEP3_TX_CTRL = USBFS_UEP_T_RES_NAK;
|
||||
break;
|
||||
|
||||
default:
|
||||
@@ -611,17 +611,17 @@ void USBHD_IRQHandler( void )
|
||||
{
|
||||
case ( DEF_UEP_IN | DEF_UEP1 ):
|
||||
/* Set End-point 1 IN STALL */
|
||||
USBOTG_FS->UEP1_TX_CTRL = ( USBOTG_FS->UEP1_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
USBFSD->UEP1_TX_CTRL = ( USBFSD->UEP1_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_OUT | DEF_UEP2 ):
|
||||
/* Set End-point 2 OUT STALL */
|
||||
USBOTG_FS->UEP2_RX_CTRL = ( USBOTG_FS->UEP2_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
|
||||
USBFSD->UEP2_RX_CTRL = ( USBFSD->UEP2_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_IN | DEF_UEP3 ):
|
||||
/* Set End-point 3 IN STALL */
|
||||
USBOTG_FS->UEP3_TX_CTRL = ( USBOTG_FS->UEP3_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
USBFSD->UEP3_TX_CTRL = ( USBFSD->UEP3_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
|
||||
break;
|
||||
|
||||
default:
|
||||
@@ -668,21 +668,21 @@ void USBHD_IRQHandler( void )
|
||||
switch( (uint8_t)( USBFS_SetupReqIndex & 0xFF ) )
|
||||
{
|
||||
case ( DEF_UEP_IN | DEF_UEP1 ):
|
||||
if( ( (USBOTG_FS->UEP1_TX_CTRL) & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
|
||||
if( ( (USBFSD->UEP1_TX_CTRL) & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
|
||||
{
|
||||
USBFS_EP0_Buf[ 0 ] = 0x01;
|
||||
}
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_OUT | DEF_UEP2 ):
|
||||
if( ( (USBOTG_FS->UEP2_RX_CTRL) & USBFS_UEP_R_RES_MASK ) == USBFS_UEP_R_RES_STALL )
|
||||
if( ( (USBFSD->UEP2_RX_CTRL) & USBFS_UEP_R_RES_MASK ) == USBFS_UEP_R_RES_STALL )
|
||||
{
|
||||
USBFS_EP0_Buf[ 0 ] = 0x01;
|
||||
}
|
||||
break;
|
||||
|
||||
case ( DEF_UEP_IN | DEF_UEP3 ):
|
||||
if( ( (USBOTG_FS->UEP3_TX_CTRL) & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
|
||||
if( ( (USBFSD->UEP3_TX_CTRL) & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
|
||||
{
|
||||
USBFS_EP0_Buf[ 0 ] = 0x01;
|
||||
}
|
||||
@@ -714,8 +714,8 @@ void USBHD_IRQHandler( void )
|
||||
if( errflag == 0xff)
|
||||
{
|
||||
/* if one request not support, return stall */
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_STALL;
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_STALL;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_STALL;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_STALL;
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -725,33 +725,29 @@ void USBHD_IRQHandler( void )
|
||||
/* tx */
|
||||
len = (USBFS_SetupReqLen>DEF_USBD_UEP0_SIZE) ? DEF_USBD_UEP0_SIZE : USBFS_SetupReqLen;
|
||||
USBFS_SetupReqLen -= len;
|
||||
USBOTG_FS->UEP0_TX_LEN = len;
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
|
||||
USBFSD->UEP0_TX_LEN = len;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* rx */
|
||||
if( USBFS_SetupReqLen == 0 )
|
||||
{
|
||||
USBOTG_FS->UEP0_TX_LEN = 0;
|
||||
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
|
||||
USBFSD->UEP0_TX_LEN = 0;
|
||||
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
|
||||
}
|
||||
else
|
||||
{
|
||||
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_ACK;
|
||||
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_ACK;
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
/* Sof pack processing */
|
||||
case USBFS_UIS_TOKEN_SOF:
|
||||
break;
|
||||
|
||||
default :
|
||||
break;
|
||||
}
|
||||
USBOTG_FS->INT_FG = USBFS_UIF_TRANSFER;
|
||||
USBFSD->INT_FG = USBFS_UIF_TRANSFER;
|
||||
}
|
||||
else if( intflag & USBFS_UIF_BUS_RST )
|
||||
{
|
||||
@@ -761,15 +757,17 @@ void USBHD_IRQHandler( void )
|
||||
USBFS_DevSleepStatus = 0;
|
||||
USBFS_DevEnumStatus = 0;
|
||||
|
||||
USBOTG_FS->DEV_ADDR = 0;
|
||||
USBFSD->DEV_ADDR = 0;
|
||||
USBFS_Device_Endp_Init( );
|
||||
UART2_ParaInit( 1 );
|
||||
USBOTG_FS->INT_FG = USBFS_UIF_BUS_RST;
|
||||
USBFSD->INT_FG = USBFS_UIF_BUS_RST;
|
||||
}
|
||||
else if( intflag & USBFS_UIF_SUSPEND )
|
||||
{
|
||||
USBFSD->INT_FG = USBFS_UIF_SUSPEND;
|
||||
Delay_Us(10);
|
||||
/* usb suspend interrupt processing */
|
||||
if ( USBOTG_FS->MIS_ST & USBFS_UMS_SUSPEND )
|
||||
if ( USBFSD->MIS_ST & USBFS_UMS_SUSPEND )
|
||||
{
|
||||
USBFS_DevSleepStatus |= 0x02;
|
||||
if( USBFS_DevSleepStatus == 0x03 )
|
||||
@@ -781,12 +779,11 @@ void USBHD_IRQHandler( void )
|
||||
{
|
||||
USBFS_DevSleepStatus &= ~0x02;
|
||||
}
|
||||
USBOTG_FS->INT_FG = USBFS_UIF_SUSPEND;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* other interrupts */
|
||||
USBOTG_FS->INT_FG = intflag;
|
||||
USBFSD->INT_FG = intflag;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2022/08/20
|
||||
* Description : This file contains all the functions prototypes for the
|
||||
* USBOTG firmware library.
|
||||
* USBFS firmware library.
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
|
||||
@@ -25,6 +25,9 @@ void TIM2_IRQHandler( void )__attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
|
||||
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
|
||||
void SystemInit (void)
|
||||
{
|
||||
RCC->CTLR |= (uint32_t)0x00000001;
|
||||
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
|
||||
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
|
||||
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
|
||||
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
|
||||
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
|
||||
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
|
||||
RCC->INTR = 0x009F0000;
|
||||
SetSysClock();
|
||||
}
|
||||
|
||||
@@ -22,6 +22,9 @@ void HardFault_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
|
||||
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
|
||||
void SystemInit (void)
|
||||
{
|
||||
RCC->CTLR |= (uint32_t)0x00000001;
|
||||
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
|
||||
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
|
||||
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
|
||||
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
|
||||
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
|
||||
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
|
||||
RCC->INTR = 0x009F0000;
|
||||
SetSysClock();
|
||||
}
|
||||
|
||||
@@ -152,5 +152,5 @@
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
|
||||
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
|
||||
<storageModule moduleId="refreshScope"/>
|
||||
|
||||
</cproject>
|
||||
|
||||
@@ -93,8 +93,6 @@ extern "C" {
|
||||
/* Flash Operation Key Variables, Operation with DEF_FLASH_OPERATION_KEY_CODE_x to ensure the correctness of flash operation*/
|
||||
extern volatile uint32_t Flash_Operation_Key0; /* IAP Flash operation Key-code Variables 0 */
|
||||
extern volatile uint32_t Flash_Operation_Key1; /* IAP Flash operation Key-code Variables 1 */
|
||||
extern __attribute__((aligned(4))) uint8_t USBHD_TX_Buf[ MAX_PACKET_SIZE ] ; // IN, must even address
|
||||
extern __attribute__((aligned(4))) uint8_t USBHD_RX_Buf[ MAX_PACKET_SIZE ] ; // OUT, must even address
|
||||
|
||||
/*******************************************************************************/
|
||||
/* Data Structures */
|
||||
|
||||
@@ -41,7 +41,7 @@ void USBFS_RCC_Init( void )
|
||||
{
|
||||
RCC_USBCLKConfig( RCC_USBCLKSource_PLLCLK_Div1 );
|
||||
}
|
||||
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_OTG_FS, ENABLE );
|
||||
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_USBFS, ENABLE );
|
||||
}
|
||||
/*********************************************************************
|
||||
* @fn USBFS_Host_Init
|
||||
@@ -56,25 +56,25 @@ void USBFS_Host_Init( FunctionalState sta )
|
||||
{
|
||||
if( sta == ENABLE )
|
||||
{
|
||||
USBOTG_H_FS->BASE_CTRL = USBFS_UC_HOST_MODE;
|
||||
USBOTG_H_FS->HOST_CTRL = 0;
|
||||
USBOTG_H_FS->DEV_ADDR = 0;
|
||||
USBOTG_H_FS->HOST_EP_MOD = USBFS_UH_EP_TX_EN | USBFS_UH_EP_RX_EN;
|
||||
USBFSH->BASE_CTRL = USBFS_UC_HOST_MODE;
|
||||
USBFSH->HOST_CTRL = 0;
|
||||
USBFSH->DEV_ADDR = 0;
|
||||
USBFSH->HOST_EP_MOD = USBFS_UH_EP_TX_EN | USBFS_UH_EP_RX_EN;
|
||||
|
||||
USBOTG_H_FS->HOST_RX_DMA = (uint32_t)USBFS_RX_Buf;
|
||||
USBOTG_H_FS->HOST_TX_DMA = (uint32_t)USBFS_TX_Buf;
|
||||
USBFSH->HOST_RX_DMA = (uint32_t)USBFS_RX_Buf;
|
||||
USBFSH->HOST_TX_DMA = (uint32_t)USBFS_TX_Buf;
|
||||
|
||||
USBOTG_H_FS->HOST_RX_CTRL = 0;
|
||||
USBOTG_H_FS->HOST_TX_CTRL = 0;
|
||||
USBOTG_H_FS->BASE_CTRL = USBFS_UC_HOST_MODE | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
|
||||
USBFSH->HOST_RX_CTRL = 0;
|
||||
USBFSH->HOST_TX_CTRL = 0;
|
||||
USBFSH->BASE_CTRL = USBFS_UC_HOST_MODE | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
|
||||
|
||||
USBOTG_H_FS->INT_FG = 0xFF;
|
||||
USBFSH->INT_FG = 0xFF;
|
||||
|
||||
USBOTG_H_FS->INT_EN = USBFS_UIE_TRANSFER | USBFS_UIE_DETECT;
|
||||
USBFSH->INT_EN = USBFS_UIE_TRANSFER | USBFS_UIE_DETECT;
|
||||
}
|
||||
else
|
||||
{
|
||||
USBOTG_H_FS->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
USBFSH->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -90,10 +90,10 @@ void USBFS_Host_Init( FunctionalState sta )
|
||||
uint8_t USBFSH_CheckRootHubPortStatus( uint8_t dev_sta )
|
||||
{
|
||||
/* Check USB device connection or disconnection */
|
||||
if( ( USBOTG_H_FS->INT_FG ) & USBFS_UIF_DETECT )
|
||||
if( ( USBFSH->INT_FG ) & USBFS_UIF_DETECT )
|
||||
{
|
||||
USBOTG_H_FS->INT_FG = USBFS_UIF_DETECT; // Clear flag
|
||||
if( USBOTG_H_FS->MIS_ST & USBFS_UMS_DEV_ATTACH ) // Check that the USB device has been connected to the port
|
||||
USBFSH->INT_FG = USBFS_UIF_DETECT; // Clear flag
|
||||
if( USBFSH->MIS_ST & USBFS_UMS_DEV_ATTACH ) // Check that the USB device has been connected to the port
|
||||
{
|
||||
if( ( dev_sta == ROOT_DEV_DISCONNECT ) || ( ( dev_sta != ROOT_DEV_FAILED ) && ( USBFSH_CheckRootHubPortEnable( ) == 0x00 ) ) )
|
||||
{
|
||||
@@ -124,7 +124,7 @@ uint8_t USBFSH_CheckRootHubPortStatus( uint8_t dev_sta )
|
||||
*/
|
||||
uint8_t USBFSH_CheckRootHubPortEnable( void )
|
||||
{
|
||||
return ( USBOTG_H_FS->HOST_CTRL & USBFS_UH_PORT_EN );
|
||||
return ( USBFSH->HOST_CTRL & USBFS_UH_PORT_EN );
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
@@ -136,7 +136,7 @@ uint8_t USBFSH_CheckRootHubPortEnable( void )
|
||||
*/
|
||||
uint8_t USBFSH_CheckRootHubPortSpeed( void )
|
||||
{
|
||||
return ( USBOTG_H_FS->MIS_ST & USBFS_UMS_DM_LEVEL? USB_LOW_SPEED: USB_FULL_SPEED );
|
||||
return ( USBFSH->MIS_ST & USBFS_UMS_DM_LEVEL? USB_LOW_SPEED: USB_FULL_SPEED );
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
@@ -150,7 +150,7 @@ uint8_t USBFSH_CheckRootHubPortSpeed( void )
|
||||
*/
|
||||
void USBFSH_SetSelfAddr( uint8_t addr )
|
||||
{
|
||||
USBOTG_H_FS->DEV_ADDR = ( USBOTG_H_FS->DEV_ADDR & USBFS_UDA_GP_BIT ) | ( addr & USBFS_USB_ADDR_MASK );
|
||||
USBFSH->DEV_ADDR = ( USBFSH->DEV_ADDR & USBFS_UDA_GP_BIT ) | ( addr & USBFS_USB_ADDR_MASK );
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
@@ -166,12 +166,12 @@ void USBFSH_SetSelfSpeed( uint8_t speed )
|
||||
{
|
||||
if( speed )
|
||||
{
|
||||
USBOTG_H_FS->BASE_CTRL &= ~USBFS_UC_LOW_SPEED;
|
||||
USBOTG_H_FS->HOST_SETUP &= ~USBFS_UH_PRE_PID_EN;
|
||||
USBFSH->BASE_CTRL &= ~USBFS_UC_LOW_SPEED;
|
||||
USBFSH->HOST_SETUP &= ~USBFS_UH_PRE_PID_EN;
|
||||
}
|
||||
else
|
||||
{
|
||||
USBOTG_H_FS->BASE_CTRL |= USBFS_UC_LOW_SPEED;
|
||||
USBFSH->BASE_CTRL |= USBFS_UC_LOW_SPEED;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -193,7 +193,7 @@ void USBFSH_ResetRootHubPort( uint8_t mode )
|
||||
USBFSH_SetSelfSpeed( 1 );
|
||||
if( mode <= 1 )
|
||||
{
|
||||
USBOTG_H_FS->HOST_CTRL = ( USBOTG_H_FS->HOST_CTRL & ~USBFS_UH_LOW_SPEED ) | USBFS_UH_BUS_RESET;
|
||||
USBFSH->HOST_CTRL = ( USBFSH->HOST_CTRL & ~USBFS_UH_LOW_SPEED ) | USBFS_UH_BUS_RESET;
|
||||
}
|
||||
if( mode == 0 )
|
||||
{
|
||||
@@ -201,10 +201,10 @@ void USBFSH_ResetRootHubPort( uint8_t mode )
|
||||
}
|
||||
if( mode != 1 )
|
||||
{
|
||||
USBOTG_H_FS->HOST_CTRL = USBOTG_H_FS->HOST_CTRL & ~USBFS_UH_BUS_RESET; // End Reset
|
||||
USBFSH->HOST_CTRL = USBFSH->HOST_CTRL & ~USBFS_UH_BUS_RESET; // End Reset
|
||||
}
|
||||
Delay_Ms( 2 );
|
||||
USBOTG_H_FS->INT_FG = USBFS_UIF_DETECT;
|
||||
USBFSH->INT_FG = USBFS_UIF_DETECT;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
@@ -218,18 +218,18 @@ void USBFSH_ResetRootHubPort( uint8_t mode )
|
||||
*/
|
||||
uint8_t USBFSH_EnableRootHubPort( uint8_t *pspeed )
|
||||
{
|
||||
if( USBOTG_H_FS->MIS_ST & USBFS_UMS_DEV_ATTACH )
|
||||
if( USBFSH->MIS_ST & USBFS_UMS_DEV_ATTACH )
|
||||
{
|
||||
if( USBFSH_CheckRootHubPortEnable( ) == 0x00 )
|
||||
{
|
||||
*pspeed = USBFSH_CheckRootHubPortSpeed( );
|
||||
if( *pspeed == 0 )
|
||||
{
|
||||
USBOTG_H_FS->HOST_CTRL |= USBFS_UH_LOW_SPEED;
|
||||
USBFSH->HOST_CTRL |= USBFS_UH_LOW_SPEED;
|
||||
}
|
||||
}
|
||||
USBOTG_H_FS->HOST_CTRL |= USBFS_UH_PORT_EN;
|
||||
USBOTG_H_FS->HOST_SETUP |= USBFS_UH_SOF_EN;
|
||||
USBFSH->HOST_CTRL |= USBFS_UH_PORT_EN;
|
||||
USBFSH->HOST_SETUP |= USBFS_UH_SOF_EN;
|
||||
|
||||
return ERR_SUCCESS;
|
||||
}
|
||||
@@ -253,29 +253,29 @@ uint8_t USBFSH_Transact( uint8_t endp_pid, uint8_t endp_tog, uint16_t timeout )
|
||||
uint8_t r, trans_rerty;
|
||||
uint16_t i;
|
||||
|
||||
USBOTG_H_FS->HOST_TX_CTRL = USBOTG_H_FS->HOST_RX_CTRL = endp_tog;
|
||||
USBFSH->HOST_TX_CTRL = USBFSH->HOST_RX_CTRL = endp_tog;
|
||||
trans_rerty = 0;
|
||||
do
|
||||
{
|
||||
USBOTG_H_FS->HOST_EP_PID = endp_pid; // Specify token PID and endpoint number
|
||||
USBOTG_H_FS->INT_FG = USBFS_UIF_TRANSFER; // Allow transmission
|
||||
for( i = DEF_WAIT_USB_TOUT_200US; ( i != 0 ) && ( ( USBOTG_H_FS->INT_FG & USBFS_UIF_TRANSFER ) == 0 ); i-- )
|
||||
USBFSH->HOST_EP_PID = endp_pid; // Specify token PID and endpoint number
|
||||
USBFSH->INT_FG = USBFS_UIF_TRANSFER; // Allow transmission
|
||||
for( i = DEF_WAIT_USB_TOUT_200US; ( i != 0 ) && ( ( USBFSH->INT_FG & USBFS_UIF_TRANSFER ) == 0 ); i-- )
|
||||
{
|
||||
Delay_Us( 1 );
|
||||
}
|
||||
USBOTG_H_FS->HOST_EP_PID = 0x00; // Stop USB transfer
|
||||
if( ( USBOTG_H_FS->INT_FG & USBFS_UIF_TRANSFER ) == 0 )
|
||||
USBFSH->HOST_EP_PID = 0x00; // Stop USB transfer
|
||||
if( ( USBFSH->INT_FG & USBFS_UIF_TRANSFER ) == 0 )
|
||||
{
|
||||
return ERR_USB_UNKNOWN;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Complete transfer */
|
||||
if( USBOTG_H_FS->INT_ST & USBFS_UIS_TOG_OK )
|
||||
if( USBFSH->INT_ST & USBFS_UIS_TOG_OK )
|
||||
{
|
||||
return ERR_SUCCESS;
|
||||
}
|
||||
r = USBOTG_H_FS->INT_ST & USBFS_UIS_H_RES_MASK; // USB device answer status
|
||||
r = USBFSH->INT_ST & USBFS_UIS_H_RES_MASK; // USB device answer status
|
||||
if( r == USB_PID_STALL )
|
||||
{
|
||||
return ( r | ERR_USB_TRANSFER );
|
||||
@@ -316,7 +316,7 @@ uint8_t USBFSH_Transact( uint8_t endp_pid, uint8_t endp_tog, uint16_t timeout )
|
||||
}
|
||||
}
|
||||
Delay_Us( 15 );
|
||||
if( USBOTG_H_FS->INT_FG & USBFS_UIF_DETECT )
|
||||
if( USBFSH->INT_FG & USBFS_UIF_DETECT )
|
||||
{
|
||||
Delay_Us( 200 );
|
||||
if( USBFSH_CheckRootHubPortEnable( ) == 0 )
|
||||
@@ -349,14 +349,14 @@ uint8_t USBFSH_CtrlTransfer( uint8_t ep0_size, uint8_t *pbuf, uint16_t *plen )
|
||||
{
|
||||
*plen = 0;
|
||||
}
|
||||
USBOTG_H_FS->HOST_TX_LEN = sizeof( USB_SETUP_REQ );
|
||||
USBFSH->HOST_TX_LEN = sizeof( USB_SETUP_REQ );
|
||||
s = USBFSH_Transact( USB_PID_SETUP << 4 | 0x00, 0x00, DEF_CTRL_TRANS_TIMEOVER_CNT ); // SETUP stage, 200mS timeout
|
||||
if( s != ERR_SUCCESS )
|
||||
{
|
||||
return s;
|
||||
}
|
||||
USBOTG_H_FS->HOST_TX_CTRL = USBOTG_H_FS->HOST_RX_CTRL = USBFS_UH_T_TOG | USBFS_UH_R_TOG | USBFS_UH_T_AUTO_TOG | USBFS_UH_R_AUTO_TOG; // Default DATA1
|
||||
USBOTG_H_FS->HOST_TX_LEN = 0x01; // The default no-data state stage is IN
|
||||
USBFSH->HOST_TX_CTRL = USBFSH->HOST_RX_CTRL = USBFS_UH_T_TOG | USBFS_UH_R_TOG | USBFS_UH_T_AUTO_TOG | USBFS_UH_R_AUTO_TOG; // Default DATA1
|
||||
USBFSH->HOST_TX_LEN = 0x01; // The default no-data state stage is IN
|
||||
rem_len = pUSBFS_SetupRequest->wLength;
|
||||
if( rem_len && pbuf )
|
||||
{
|
||||
@@ -366,12 +366,12 @@ uint8_t USBFSH_CtrlTransfer( uint8_t ep0_size, uint8_t *pbuf, uint16_t *plen )
|
||||
while( rem_len )
|
||||
{
|
||||
Delay_Us( 100 );
|
||||
s = USBFSH_Transact( USB_PID_IN << 4 | 0x00, USBOTG_H_FS->HOST_RX_CTRL, DEF_CTRL_TRANS_TIMEOVER_CNT ); // IN
|
||||
s = USBFSH_Transact( USB_PID_IN << 4 | 0x00, USBFSH->HOST_RX_CTRL, DEF_CTRL_TRANS_TIMEOVER_CNT ); // IN
|
||||
if( s != ERR_SUCCESS )
|
||||
{
|
||||
return s;
|
||||
}
|
||||
rx_len = ( USBOTG_H_FS->RX_LEN < rem_len )? USBOTG_H_FS->RX_LEN : rem_len;
|
||||
rx_len = ( USBFSH->RX_LEN < rem_len )? USBFSH->RX_LEN : rem_len;
|
||||
rem_len -= rx_len;
|
||||
if( plen )
|
||||
{
|
||||
@@ -383,12 +383,12 @@ uint8_t USBFSH_CtrlTransfer( uint8_t ep0_size, uint8_t *pbuf, uint16_t *plen )
|
||||
pbuf++;
|
||||
}
|
||||
|
||||
if( ( USBOTG_H_FS->RX_LEN == 0 ) || ( USBOTG_H_FS->RX_LEN & ( ep0_size - 1 ) ) )
|
||||
if( ( USBFSH->RX_LEN == 0 ) || ( USBFSH->RX_LEN & ( ep0_size - 1 ) ) )
|
||||
{
|
||||
break; // Short package
|
||||
}
|
||||
}
|
||||
USBOTG_H_FS->HOST_TX_LEN = 0x00; // Status stage is OUT
|
||||
USBFSH->HOST_TX_LEN = 0x00; // Status stage is OUT
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -396,36 +396,36 @@ uint8_t USBFSH_CtrlTransfer( uint8_t ep0_size, uint8_t *pbuf, uint16_t *plen )
|
||||
while( rem_len )
|
||||
{
|
||||
Delay_Us( 100 );
|
||||
USBOTG_H_FS->HOST_TX_LEN = ( rem_len >= ep0_size )? ep0_size : rem_len;
|
||||
for( tx_cnt = 0; tx_cnt != USBOTG_H_FS->HOST_TX_LEN; tx_cnt++ )
|
||||
USBFSH->HOST_TX_LEN = ( rem_len >= ep0_size )? ep0_size : rem_len;
|
||||
for( tx_cnt = 0; tx_cnt != USBFSH->HOST_TX_LEN; tx_cnt++ )
|
||||
{
|
||||
USBFS_TX_Buf[ tx_cnt ] = *pbuf;
|
||||
pbuf++;
|
||||
}
|
||||
s = USBFSH_Transact( USB_PID_OUT << 4 | 0x00, USBOTG_H_FS->HOST_TX_CTRL, DEF_CTRL_TRANS_TIMEOVER_CNT ); // OUT
|
||||
s = USBFSH_Transact( USB_PID_OUT << 4 | 0x00, USBFSH->HOST_TX_CTRL, DEF_CTRL_TRANS_TIMEOVER_CNT ); // OUT
|
||||
if( s != ERR_SUCCESS )
|
||||
{
|
||||
return s;
|
||||
}
|
||||
rem_len -= USBOTG_H_FS->HOST_TX_LEN;
|
||||
rem_len -= USBFSH->HOST_TX_LEN;
|
||||
if( plen )
|
||||
{
|
||||
*plen += USBOTG_H_FS->HOST_TX_LEN; // The total length of the actual successful transmission and reception
|
||||
*plen += USBFSH->HOST_TX_LEN; // The total length of the actual successful transmission and reception
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
Delay_Us( 100 );
|
||||
s = USBFSH_Transact( ( USBOTG_H_FS->HOST_TX_LEN )? ( USB_PID_IN << 4 | 0x00 ) : ( USB_PID_OUT << 4 | 0x00 ), USBFS_UH_R_TOG | USBFS_UH_T_TOG, DEF_CTRL_TRANS_TIMEOVER_CNT ); /* STATUS½×¶Î */
|
||||
s = USBFSH_Transact( ( USBFSH->HOST_TX_LEN )? ( USB_PID_IN << 4 | 0x00 ) : ( USB_PID_OUT << 4 | 0x00 ), USBFS_UH_R_TOG | USBFS_UH_T_TOG, DEF_CTRL_TRANS_TIMEOVER_CNT ); /* STATUS½×¶Î */
|
||||
if( s != ERR_SUCCESS )
|
||||
{
|
||||
return s;
|
||||
}
|
||||
if( USBOTG_H_FS->HOST_TX_LEN == 0 )
|
||||
if( USBFSH->HOST_TX_LEN == 0 )
|
||||
{
|
||||
return ERR_SUCCESS;
|
||||
}
|
||||
if( USBOTG_H_FS->RX_LEN == 0 )
|
||||
if( USBFSH->RX_LEN == 0 )
|
||||
{
|
||||
return ERR_SUCCESS;
|
||||
}
|
||||
@@ -619,7 +619,7 @@ uint8_t USBFSH_GetEndpData( uint8_t endp_num, uint8_t *pendp_tog, uint8_t *pbuf,
|
||||
if( s == ERR_SUCCESS )
|
||||
{
|
||||
*pendp_tog ^= USBFS_UH_T_TOG | USBFS_UH_R_TOG;
|
||||
*plen = USBOTG_H_FS->RX_LEN;
|
||||
*plen = USBFSH->RX_LEN;
|
||||
memcpy( pbuf, USBFS_RX_Buf, *plen );
|
||||
}
|
||||
|
||||
@@ -643,7 +643,7 @@ uint8_t USBFSH_SendEndpData( uint8_t endp_num, uint8_t *pendp_tog, uint8_t *pbuf
|
||||
uint8_t s;
|
||||
|
||||
memcpy( USBFS_TX_Buf, pbuf, len );
|
||||
USBOTG_H_FS->HOST_TX_LEN = len;
|
||||
USBFSH->HOST_TX_LEN = len;
|
||||
|
||||
s = USBFSH_Transact( ( USB_PID_OUT << 4 ) | endp_num, *pendp_tog, 0 );
|
||||
if( s == ERR_SUCCESS )
|
||||
|
||||
@@ -3,7 +3,7 @@
|
||||
* Author : WCH
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : USBOTG full speed host header file
|
||||
* Description : USBFS firmware full speed host header file
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
|
||||
@@ -24,6 +24,9 @@ void SW_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
|
||||
@@ -33,7 +33,7 @@ int main(void)
|
||||
USART_Printf_Init(115200);
|
||||
Delay_Init( );
|
||||
printf("SystemClk:%d\r\n",SystemCoreClock);
|
||||
printf("USBFS-OTG HOST,UDisk IAP.\r\n");
|
||||
printf("USBFS HOST,UDisk IAP.\r\n");
|
||||
|
||||
IAP_Initialization( );
|
||||
|
||||
|
||||
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
|
||||
void SystemInit (void)
|
||||
{
|
||||
RCC->CTLR |= (uint32_t)0x00000001;
|
||||
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
|
||||
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
|
||||
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
|
||||
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
|
||||
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
|
||||
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
|
||||
RCC->INTR = 0x009F0000;
|
||||
SetSysClock();
|
||||
}
|
||||
|
||||
@@ -57,7 +57,7 @@ void TIM3_Init( uint16_t arr, uint16_t psc )
|
||||
/* Configure timer3 interrupt */
|
||||
NVIC_InitStructure.NVIC_IRQChannel = TIM3_IRQn;
|
||||
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
|
||||
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
||||
NVIC_Init( &NVIC_InitStructure );
|
||||
|
||||
@@ -1719,7 +1719,7 @@ void USBH_MainDeal( void )
|
||||
USBFSH_SetSelfSpeed( RootHubDev.Device[ hub_port ].bSpeed );
|
||||
if( RootHubDev.bSpeed != USB_LOW_SPEED )
|
||||
{
|
||||
USBOTG_H_FS->HOST_CTRL &= ~USBFS_UH_LOW_SPEED;
|
||||
USBFSH->HOST_CTRL &= ~USBFS_UH_LOW_SPEED;
|
||||
}
|
||||
|
||||
/* Enumerate the USB device of the current HUB port */
|
||||
@@ -1795,7 +1795,7 @@ void USBH_MainDeal( void )
|
||||
USBFSH_SetSelfSpeed( RootHubDev.Device[ hub_port ].bSpeed );
|
||||
if( RootHubDev.bSpeed != USB_LOW_SPEED )
|
||||
{
|
||||
USBOTG_H_FS->HOST_CTRL &= ~USBFS_UH_LOW_SPEED;
|
||||
USBFSH->HOST_CTRL &= ~USBFS_UH_LOW_SPEED;
|
||||
}
|
||||
|
||||
/* Get endpoint data */
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/********************************** (C) COPYRIGHT *******************************
|
||||
* File Name : usbhd_host_km.h
|
||||
* File Name : app_km.h
|
||||
* Author : WCH
|
||||
* Version : V1.0.0
|
||||
* Date : 2020/04/30
|
||||
|
||||
@@ -43,7 +43,7 @@ void USBFS_RCC_Init( void )
|
||||
{
|
||||
RCC_USBCLKConfig( RCC_USBCLKSource_PLLCLK_Div1 );
|
||||
}
|
||||
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_OTG_FS, ENABLE );
|
||||
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_USBFS, ENABLE );
|
||||
}
|
||||
/*********************************************************************
|
||||
* @fn USBFS_Host_Init
|
||||
@@ -58,25 +58,25 @@ void USBFS_Host_Init( FunctionalState sta )
|
||||
{
|
||||
if( sta == ENABLE )
|
||||
{
|
||||
USBOTG_H_FS->BASE_CTRL = USBFS_UC_HOST_MODE;
|
||||
USBOTG_H_FS->HOST_CTRL = 0;
|
||||
USBOTG_H_FS->DEV_ADDR = 0;
|
||||
USBOTG_H_FS->HOST_EP_MOD = USBFS_UH_EP_TX_EN | USBFS_UH_EP_RX_EN;
|
||||
USBFSH->BASE_CTRL = USBFS_UC_HOST_MODE;
|
||||
USBFSH->HOST_CTRL = 0;
|
||||
USBFSH->DEV_ADDR = 0;
|
||||
USBFSH->HOST_EP_MOD = USBFS_UH_EP_TX_EN | USBFS_UH_EP_RX_EN;
|
||||
|
||||
USBOTG_H_FS->HOST_RX_DMA = (uint32_t)USBFS_RX_Buf;
|
||||
USBOTG_H_FS->HOST_TX_DMA = (uint32_t)USBFS_TX_Buf;
|
||||
USBFSH->HOST_RX_DMA = (uint32_t)USBFS_RX_Buf;
|
||||
USBFSH->HOST_TX_DMA = (uint32_t)USBFS_TX_Buf;
|
||||
|
||||
USBOTG_H_FS->HOST_RX_CTRL = 0;
|
||||
USBOTG_H_FS->HOST_TX_CTRL = 0;
|
||||
USBOTG_H_FS->BASE_CTRL = USBFS_UC_HOST_MODE | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
|
||||
USBFSH->HOST_RX_CTRL = 0;
|
||||
USBFSH->HOST_TX_CTRL = 0;
|
||||
USBFSH->BASE_CTRL = USBFS_UC_HOST_MODE | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
|
||||
|
||||
USBOTG_H_FS->INT_FG = 0xFF;
|
||||
USBFSH->INT_FG = 0xFF;
|
||||
|
||||
USBOTG_H_FS->INT_EN = USBFS_UIE_TRANSFER | USBFS_UIE_DETECT;
|
||||
USBFSH->INT_EN = USBFS_UIE_TRANSFER | USBFS_UIE_DETECT;
|
||||
}
|
||||
else
|
||||
{
|
||||
USBOTG_H_FS->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
USBFSH->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -92,10 +92,10 @@ void USBFS_Host_Init( FunctionalState sta )
|
||||
*/
|
||||
uint8_t USBFSH_CheckRootHubPortStatus( uint8_t dev_sta )
|
||||
{
|
||||
if( USBOTG_H_FS->INT_FG & USBFS_UIF_DETECT )// Check that there is a device connection or disconnection event on the port
|
||||
if( USBFSH->INT_FG & USBFS_UIF_DETECT )// Check that there is a device connection or disconnection event on the port
|
||||
{
|
||||
USBOTG_H_FS->INT_FG = USBFS_UIF_DETECT; // Clear flag
|
||||
if( USBOTG_H_FS->MIS_ST & USBFS_UMS_DEV_ATTACH ) // Check that there is a device connection to the port
|
||||
USBFSH->INT_FG = USBFS_UIF_DETECT; // Clear flag
|
||||
if( USBFSH->MIS_ST & USBFS_UMS_DEV_ATTACH ) // Check that there is a device connection to the port
|
||||
{
|
||||
if( ( dev_sta == ROOT_DEV_DISCONNECT ) || ( ( dev_sta != ROOT_DEV_FAILED ) && ( USBFSH_CheckRootHubPortEnable( ) == 0x00 ) ) )
|
||||
{
|
||||
@@ -127,7 +127,7 @@ uint8_t USBFSH_CheckRootHubPortStatus( uint8_t dev_sta )
|
||||
*/
|
||||
uint8_t USBFSH_CheckRootHubPortEnable( void )
|
||||
{
|
||||
return ( USBOTG_H_FS->HOST_CTRL & USBFS_UH_PORT_EN );
|
||||
return ( USBFSH->HOST_CTRL & USBFS_UH_PORT_EN );
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
@@ -139,7 +139,7 @@ uint8_t USBFSH_CheckRootHubPortEnable( void )
|
||||
*/
|
||||
uint8_t USBFSH_CheckRootHubPortSpeed( void )
|
||||
{
|
||||
return ( USBOTG_H_FS->MIS_ST & USBFS_UMS_DM_LEVEL? USB_LOW_SPEED: USB_FULL_SPEED );
|
||||
return ( USBFSH->MIS_ST & USBFS_UMS_DM_LEVEL? USB_LOW_SPEED: USB_FULL_SPEED );
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
@@ -153,7 +153,7 @@ uint8_t USBFSH_CheckRootHubPortSpeed( void )
|
||||
*/
|
||||
void USBFSH_SetSelfAddr( uint8_t addr )
|
||||
{
|
||||
USBOTG_H_FS->DEV_ADDR = ( USBOTG_H_FS->DEV_ADDR & USBFS_UDA_GP_BIT ) | ( addr & USBFS_USB_ADDR_MASK );
|
||||
USBFSH->DEV_ADDR = ( USBFSH->DEV_ADDR & USBFS_UDA_GP_BIT ) | ( addr & USBFS_USB_ADDR_MASK );
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
@@ -169,15 +169,15 @@ void USBFSH_SetSelfSpeed( uint8_t speed )
|
||||
{
|
||||
if( speed == USB_FULL_SPEED )
|
||||
{
|
||||
USBOTG_H_FS->BASE_CTRL &= ~USBFS_UC_LOW_SPEED;
|
||||
USBOTG_H_FS->HOST_CTRL &= ~USBFS_UH_LOW_SPEED;
|
||||
USBOTG_H_FS->HOST_SETUP &= ~USBFS_UH_PRE_PID_EN;
|
||||
USBFSH->BASE_CTRL &= ~USBFS_UC_LOW_SPEED;
|
||||
USBFSH->HOST_CTRL &= ~USBFS_UH_LOW_SPEED;
|
||||
USBFSH->HOST_SETUP &= ~USBFS_UH_PRE_PID_EN;
|
||||
}
|
||||
else
|
||||
{
|
||||
USBOTG_H_FS->BASE_CTRL |= USBFS_UC_LOW_SPEED;
|
||||
USBOTG_H_FS->HOST_CTRL |= USBFS_UH_LOW_SPEED;
|
||||
USBOTG_H_FS->HOST_SETUP |= USBFS_UH_PRE_PID_EN;
|
||||
USBFSH->BASE_CTRL |= USBFS_UC_LOW_SPEED;
|
||||
USBFSH->HOST_CTRL |= USBFS_UH_LOW_SPEED;
|
||||
USBFSH->HOST_SETUP |= USBFS_UH_PRE_PID_EN;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -200,7 +200,7 @@ void USBFSH_ResetRootHubPort( uint8_t mode )
|
||||
|
||||
if( mode <= 1 )
|
||||
{
|
||||
USBOTG_H_FS->HOST_CTRL |= USBFS_UH_BUS_RESET; // Start reset
|
||||
USBFSH->HOST_CTRL |= USBFS_UH_BUS_RESET; // Start reset
|
||||
}
|
||||
if( mode == 0 )
|
||||
{
|
||||
@@ -208,15 +208,15 @@ void USBFSH_ResetRootHubPort( uint8_t mode )
|
||||
}
|
||||
if( mode != 1 )
|
||||
{
|
||||
USBOTG_H_FS->HOST_CTRL &= ~USBFS_UH_BUS_RESET; // End reset
|
||||
USBFSH->HOST_CTRL &= ~USBFS_UH_BUS_RESET; // End reset
|
||||
}
|
||||
Delay_Ms( 2 );
|
||||
|
||||
if( USBOTG_H_FS->INT_FG & USBFS_UIF_DETECT )
|
||||
if( USBFSH->INT_FG & USBFS_UIF_DETECT )
|
||||
{
|
||||
if( USBOTG_H_FS->MIS_ST & USBFS_UMS_DEV_ATTACH )
|
||||
if( USBFSH->MIS_ST & USBFS_UMS_DEV_ATTACH )
|
||||
{
|
||||
USBOTG_H_FS->INT_FG = USBFS_UIF_DETECT;
|
||||
USBFSH->INT_FG = USBFS_UIF_DETECT;
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -232,7 +232,7 @@ void USBFSH_ResetRootHubPort( uint8_t mode )
|
||||
*/
|
||||
uint8_t USBFSH_EnableRootHubPort( uint8_t *pspeed )
|
||||
{
|
||||
if( USBOTG_H_FS->MIS_ST & USBFS_UMS_DEV_ATTACH )
|
||||
if( USBFSH->MIS_ST & USBFS_UMS_DEV_ATTACH )
|
||||
{
|
||||
if( USBFSH_CheckRootHubPortEnable( ) == 0x00 )
|
||||
{
|
||||
@@ -242,8 +242,8 @@ uint8_t USBFSH_EnableRootHubPort( uint8_t *pspeed )
|
||||
USBFSH_SetSelfSpeed( USB_LOW_SPEED );
|
||||
}
|
||||
}
|
||||
USBOTG_H_FS->HOST_CTRL |= USBFS_UH_PORT_EN;
|
||||
USBOTG_H_FS->HOST_SETUP |= USBFS_UH_SOF_EN;
|
||||
USBFSH->HOST_CTRL |= USBFS_UH_PORT_EN;
|
||||
USBFSH->HOST_SETUP |= USBFS_UH_SOF_EN;
|
||||
|
||||
return ERR_SUCCESS;
|
||||
}
|
||||
@@ -267,28 +267,28 @@ uint8_t USBFSH_Transact( uint8_t endp_pid, uint8_t endp_tog, uint16_t timeout )
|
||||
uint8_t r, trans_retry;
|
||||
uint16_t i;
|
||||
|
||||
USBOTG_H_FS->HOST_TX_CTRL = USBOTG_H_FS->HOST_RX_CTRL = endp_tog;
|
||||
USBFSH->HOST_TX_CTRL = USBFSH->HOST_RX_CTRL = endp_tog;
|
||||
trans_retry = 0;
|
||||
do
|
||||
{
|
||||
USBOTG_H_FS->HOST_EP_PID = endp_pid; // Specify token PID and endpoint number
|
||||
USBOTG_H_FS->INT_FG = USBFS_UIF_TRANSFER; // Allow transfer
|
||||
for( i = DEF_WAIT_USB_TRANSFER_CNT; ( i != 0 ) && ( ( USBOTG_H_FS->INT_FG & USBFS_UIF_TRANSFER ) == 0 ); i-- )
|
||||
USBFSH->HOST_EP_PID = endp_pid; // Specify token PID and endpoint number
|
||||
USBFSH->INT_FG = USBFS_UIF_TRANSFER; // Allow transfer
|
||||
for( i = DEF_WAIT_USB_TRANSFER_CNT; ( i != 0 ) && ( ( USBFSH->INT_FG & USBFS_UIF_TRANSFER ) == 0 ); i-- )
|
||||
{
|
||||
Delay_Us( 1 ); // Delay for USB transfer
|
||||
}
|
||||
USBOTG_H_FS->HOST_EP_PID = 0x00; // Stop USB transfer
|
||||
if( ( USBOTG_H_FS->INT_FG & USBFS_UIF_TRANSFER ) == 0 )
|
||||
USBFSH->HOST_EP_PID = 0x00; // Stop USB transfer
|
||||
if( ( USBFSH->INT_FG & USBFS_UIF_TRANSFER ) == 0 )
|
||||
{
|
||||
return ERR_USB_UNKNOWN;
|
||||
}
|
||||
else // Complete transfer
|
||||
{
|
||||
if( USBOTG_H_FS->INT_ST & USBFS_UIS_TOG_OK )
|
||||
if( USBFSH->INT_ST & USBFS_UIS_TOG_OK )
|
||||
{
|
||||
return ERR_SUCCESS;
|
||||
}
|
||||
r = USBOTG_H_FS->INT_ST & USBFS_UIS_H_RES_MASK; // Response status of current USB transaction
|
||||
r = USBFSH->INT_ST & USBFS_UIS_H_RES_MASK; // Response status of current USB transaction
|
||||
if( r == USB_PID_STALL )
|
||||
{
|
||||
return ( r | ERR_USB_TRANSFER );
|
||||
@@ -330,7 +330,7 @@ uint8_t USBFSH_Transact( uint8_t endp_pid, uint8_t endp_tog, uint16_t timeout )
|
||||
}
|
||||
Delay_Us( 20 );
|
||||
|
||||
if( USBOTG_H_FS->INT_FG & USBFS_UIF_DETECT )
|
||||
if( USBFSH->INT_FG & USBFS_UIF_DETECT )
|
||||
{
|
||||
Delay_Us( 200 );
|
||||
|
||||
@@ -340,7 +340,7 @@ uint8_t USBFSH_Transact( uint8_t endp_pid, uint8_t endp_tog, uint16_t timeout )
|
||||
}
|
||||
else
|
||||
{
|
||||
USBOTG_H_FS->INT_FG = USBFS_UIF_DETECT;
|
||||
USBFSH->INT_FG = USBFS_UIF_DETECT;
|
||||
}
|
||||
}
|
||||
}while( ++trans_retry < 10 );
|
||||
@@ -369,13 +369,13 @@ uint8_t USBFSH_CtrlTransfer( uint8_t ep0_size, uint8_t *pbuf, uint16_t *plen )
|
||||
{
|
||||
*plen = 0;
|
||||
}
|
||||
USBOTG_H_FS->HOST_TX_LEN = sizeof( USB_SETUP_REQ );
|
||||
USBFSH->HOST_TX_LEN = sizeof( USB_SETUP_REQ );
|
||||
s = USBFSH_Transact( ( USB_PID_SETUP << 4 ) | 0x00, 0x00, DEF_CTRL_TRANS_TIMEOVER_CNT ); // SETUP stage
|
||||
if( s != ERR_SUCCESS )
|
||||
{
|
||||
return s;
|
||||
}
|
||||
USBOTG_H_FS->HOST_TX_CTRL = USBOTG_H_FS->HOST_RX_CTRL = USBFS_UH_T_TOG | USBFS_UH_R_TOG; // Default DATA1
|
||||
USBFSH->HOST_TX_CTRL = USBFSH->HOST_RX_CTRL = USBFS_UH_T_TOG | USBFS_UH_R_TOG; // Default DATA1
|
||||
rem_len = pUSBFS_SetupRequest->wLength;
|
||||
if( rem_len && pbuf )
|
||||
{
|
||||
@@ -385,14 +385,14 @@ uint8_t USBFSH_CtrlTransfer( uint8_t ep0_size, uint8_t *pbuf, uint16_t *plen )
|
||||
while( rem_len )
|
||||
{
|
||||
Delay_Us( 100 );
|
||||
s = USBFSH_Transact( ( USB_PID_IN << 4 ) | 0x00, USBOTG_H_FS->HOST_RX_CTRL, DEF_CTRL_TRANS_TIMEOVER_CNT ); // IN
|
||||
s = USBFSH_Transact( ( USB_PID_IN << 4 ) | 0x00, USBFSH->HOST_RX_CTRL, DEF_CTRL_TRANS_TIMEOVER_CNT ); // IN
|
||||
if( s != ERR_SUCCESS )
|
||||
{
|
||||
return s;
|
||||
}
|
||||
USBOTG_H_FS->HOST_RX_CTRL ^= USBFS_UH_R_TOG;
|
||||
USBFSH->HOST_RX_CTRL ^= USBFS_UH_R_TOG;
|
||||
|
||||
rx_len = ( USBOTG_H_FS->RX_LEN < rem_len )? USBOTG_H_FS->RX_LEN : rem_len;
|
||||
rx_len = ( USBFSH->RX_LEN < rem_len )? USBFSH->RX_LEN : rem_len;
|
||||
rem_len -= rx_len;
|
||||
if( plen )
|
||||
{
|
||||
@@ -404,12 +404,12 @@ uint8_t USBFSH_CtrlTransfer( uint8_t ep0_size, uint8_t *pbuf, uint16_t *plen )
|
||||
pbuf++;
|
||||
}
|
||||
|
||||
if( ( USBOTG_H_FS->RX_LEN == 0 ) || ( USBOTG_H_FS->RX_LEN & ( ep0_size - 1 ) ) )
|
||||
if( ( USBFSH->RX_LEN == 0 ) || ( USBFSH->RX_LEN & ( ep0_size - 1 ) ) )
|
||||
{
|
||||
break; // Short package
|
||||
}
|
||||
}
|
||||
USBOTG_H_FS->HOST_TX_LEN = 0; // Status stage is OUT
|
||||
USBFSH->HOST_TX_LEN = 0; // Status stage is OUT
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -417,38 +417,38 @@ uint8_t USBFSH_CtrlTransfer( uint8_t ep0_size, uint8_t *pbuf, uint16_t *plen )
|
||||
while( rem_len )
|
||||
{
|
||||
Delay_Us( 100 );
|
||||
USBOTG_H_FS->HOST_TX_LEN = ( rem_len >= ep0_size )? ep0_size : rem_len;
|
||||
for( tx_cnt = 0; tx_cnt != USBOTG_H_FS->HOST_TX_LEN; tx_cnt++ )
|
||||
USBFSH->HOST_TX_LEN = ( rem_len >= ep0_size )? ep0_size : rem_len;
|
||||
for( tx_cnt = 0; tx_cnt != USBFSH->HOST_TX_LEN; tx_cnt++ )
|
||||
{
|
||||
USBFS_TX_Buf[ tx_cnt ] = *pbuf;
|
||||
pbuf++;
|
||||
}
|
||||
s = USBFSH_Transact( USB_PID_OUT << 4 | 0x00, USBOTG_H_FS->HOST_TX_CTRL, DEF_CTRL_TRANS_TIMEOVER_CNT ); // OUT
|
||||
s = USBFSH_Transact( USB_PID_OUT << 4 | 0x00, USBFSH->HOST_TX_CTRL, DEF_CTRL_TRANS_TIMEOVER_CNT ); // OUT
|
||||
if( s != ERR_SUCCESS )
|
||||
{
|
||||
return s;
|
||||
}
|
||||
USBOTG_H_FS->HOST_TX_CTRL ^= USBFS_UH_T_TOG;
|
||||
USBFSH->HOST_TX_CTRL ^= USBFS_UH_T_TOG;
|
||||
|
||||
rem_len -= USBOTG_H_FS->HOST_TX_LEN;
|
||||
rem_len -= USBFSH->HOST_TX_LEN;
|
||||
if( plen )
|
||||
{
|
||||
*plen += USBOTG_H_FS->HOST_TX_LEN; // The total length of the actual successful transmission and reception
|
||||
*plen += USBFSH->HOST_TX_LEN; // The total length of the actual successful transmission and reception
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
Delay_Us( 100 );
|
||||
s = USBFSH_Transact( ( USBOTG_H_FS->HOST_TX_LEN )? ( USB_PID_IN << 4 | 0x00 ) : ( USB_PID_OUT << 4 | 0x00 ), USBFS_UH_R_TOG | USBFS_UH_T_TOG, DEF_CTRL_TRANS_TIMEOVER_CNT ); // STATUS stage
|
||||
s = USBFSH_Transact( ( USBFSH->HOST_TX_LEN )? ( USB_PID_IN << 4 | 0x00 ) : ( USB_PID_OUT << 4 | 0x00 ), USBFS_UH_R_TOG | USBFS_UH_T_TOG, DEF_CTRL_TRANS_TIMEOVER_CNT ); // STATUS stage
|
||||
if( s != ERR_SUCCESS )
|
||||
{
|
||||
return s;
|
||||
}
|
||||
if( USBOTG_H_FS->HOST_TX_LEN == 0 )
|
||||
if( USBFSH->HOST_TX_LEN == 0 )
|
||||
{
|
||||
return ERR_SUCCESS;
|
||||
}
|
||||
if( USBOTG_H_FS->RX_LEN == 0 )
|
||||
if( USBFSH->RX_LEN == 0 )
|
||||
{
|
||||
return ERR_SUCCESS;
|
||||
}
|
||||
@@ -641,7 +641,7 @@ uint8_t USBFSH_GetEndpData( uint8_t endp_num, uint8_t *pendp_tog, uint8_t *pbuf,
|
||||
s = USBFSH_Transact( ( USB_PID_IN << 4 ) | endp_num, *pendp_tog, 0 );
|
||||
if( s == ERR_SUCCESS )
|
||||
{
|
||||
*plen = USBOTG_H_FS->RX_LEN;
|
||||
*plen = USBFSH->RX_LEN;
|
||||
memcpy( pbuf, USBFS_RX_Buf, *plen );
|
||||
|
||||
*pendp_tog ^= USBFS_UH_R_TOG;
|
||||
@@ -667,7 +667,7 @@ uint8_t USBFSH_SendEndpData( uint8_t endp_num, uint8_t *pendp_tog, uint8_t *pbuf
|
||||
uint8_t s;
|
||||
|
||||
memcpy( USBFS_TX_Buf, pbuf, len );
|
||||
USBOTG_H_FS->HOST_TX_LEN = len;
|
||||
USBFSH->HOST_TX_LEN = len;
|
||||
s = USBFSH_Transact( ( USB_PID_OUT << 4 ) | endp_num, *pendp_tog, 0 );
|
||||
if( s == ERR_SUCCESS )
|
||||
{
|
||||
|
||||
@@ -3,7 +3,7 @@
|
||||
* Author : WCH
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : USBOTG full speed host header file
|
||||
* Description : USBFS firmware full speed host header file
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
|
||||
@@ -22,6 +22,9 @@ void HardFault_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
|
||||
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
|
||||
void SystemInit (void)
|
||||
{
|
||||
RCC->CTLR |= (uint32_t)0x00000001;
|
||||
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
|
||||
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
|
||||
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
|
||||
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
|
||||
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
|
||||
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
|
||||
RCC->INTR = 0x009F0000;
|
||||
SetSysClock();
|
||||
}
|
||||
|
||||
@@ -447,12 +447,12 @@ uint8_t MTP_SendData( uint8_t *pbuf, uint32_t len )
|
||||
{
|
||||
if( len > HostCtl[ index ].Interface[ 0 ].OutEndpSize[ 0 ] )
|
||||
{
|
||||
USBOTG_H_FS->HOST_TX_LEN = HostCtl[ index ].Interface[ 0 ].OutEndpSize[ 0 ];
|
||||
USBFSH->HOST_TX_LEN = HostCtl[ index ].Interface[ 0 ].OutEndpSize[ 0 ];
|
||||
memcpy( USBFS_TX_Buf, pbuf, HostCtl[ index ].Interface[ 0 ].OutEndpSize[ 0 ] );
|
||||
}
|
||||
else
|
||||
{
|
||||
USBOTG_H_FS->HOST_TX_LEN = len;
|
||||
USBFSH->HOST_TX_LEN = len;
|
||||
memcpy( USBFS_TX_Buf, pbuf, len );
|
||||
}
|
||||
|
||||
@@ -503,7 +503,7 @@ uint8_t MTP_RecvData( uint8_t *pbuf, uint32_t *plen )
|
||||
{
|
||||
HostCtl[ index ].Interface[ 0 ].InEndpTog[ 0 ] ^= USBFS_UH_R_TOG;
|
||||
|
||||
*plen = USBOTG_H_FS->RX_LEN;
|
||||
*plen = USBFSH->RX_LEN;
|
||||
memcpy( pbuf, USBFS_RX_Buf, *plen );
|
||||
}
|
||||
|
||||
|
||||
@@ -43,7 +43,7 @@ void USBFS_RCC_Init( void )
|
||||
{
|
||||
RCC_USBCLKConfig( RCC_USBCLKSource_PLLCLK_Div1 );
|
||||
}
|
||||
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_OTG_FS, ENABLE );
|
||||
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_USBFS, ENABLE );
|
||||
}
|
||||
/*********************************************************************
|
||||
* @fn USBFS_Host_Init
|
||||
@@ -58,25 +58,25 @@ void USBFS_Host_Init( FunctionalState sta )
|
||||
{
|
||||
if( sta == ENABLE )
|
||||
{
|
||||
USBOTG_H_FS->BASE_CTRL = USBFS_UC_HOST_MODE;
|
||||
USBOTG_H_FS->HOST_CTRL = 0;
|
||||
USBOTG_H_FS->DEV_ADDR = 0;
|
||||
USBOTG_H_FS->HOST_EP_MOD = USBFS_UH_EP_TX_EN | USBFS_UH_EP_RX_EN;
|
||||
USBFSH->BASE_CTRL = USBFS_UC_HOST_MODE;
|
||||
USBFSH->HOST_CTRL = 0;
|
||||
USBFSH->DEV_ADDR = 0;
|
||||
USBFSH->HOST_EP_MOD = USBFS_UH_EP_TX_EN | USBFS_UH_EP_RX_EN;
|
||||
|
||||
USBOTG_H_FS->HOST_RX_DMA = (uint32_t)USBFS_RX_Buf;
|
||||
USBOTG_H_FS->HOST_TX_DMA = (uint32_t)USBFS_TX_Buf;
|
||||
USBFSH->HOST_RX_DMA = (uint32_t)USBFS_RX_Buf;
|
||||
USBFSH->HOST_TX_DMA = (uint32_t)USBFS_TX_Buf;
|
||||
|
||||
USBOTG_H_FS->HOST_RX_CTRL = 0;
|
||||
USBOTG_H_FS->HOST_TX_CTRL = 0;
|
||||
USBOTG_H_FS->BASE_CTRL = USBFS_UC_HOST_MODE | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
|
||||
USBFSH->HOST_RX_CTRL = 0;
|
||||
USBFSH->HOST_TX_CTRL = 0;
|
||||
USBFSH->BASE_CTRL = USBFS_UC_HOST_MODE | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
|
||||
|
||||
USBOTG_H_FS->INT_FG = 0xFF;
|
||||
USBFSH->INT_FG = 0xFF;
|
||||
|
||||
USBOTG_H_FS->INT_EN = USBFS_UIE_TRANSFER | USBFS_UIE_DETECT;
|
||||
USBFSH->INT_EN = USBFS_UIE_TRANSFER | USBFS_UIE_DETECT;
|
||||
}
|
||||
else
|
||||
{
|
||||
USBOTG_H_FS->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
USBFSH->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -92,10 +92,10 @@ void USBFS_Host_Init( FunctionalState sta )
|
||||
*/
|
||||
uint8_t USBFSH_CheckRootHubPortStatus( uint8_t dev_sta )
|
||||
{
|
||||
if( USBOTG_H_FS->INT_FG & USBFS_UIF_DETECT )// Check that there is a device connection or disconnection event on the port
|
||||
if( USBFSH->INT_FG & USBFS_UIF_DETECT )// Check that there is a device connection or disconnection event on the port
|
||||
{
|
||||
USBOTG_H_FS->INT_FG = USBFS_UIF_DETECT; // Clear flag
|
||||
if( USBOTG_H_FS->MIS_ST & USBFS_UMS_DEV_ATTACH ) // Check that there is a device connection to the port
|
||||
USBFSH->INT_FG = USBFS_UIF_DETECT; // Clear flag
|
||||
if( USBFSH->MIS_ST & USBFS_UMS_DEV_ATTACH ) // Check that there is a device connection to the port
|
||||
{
|
||||
if( ( dev_sta == ROOT_DEV_DISCONNECT ) || ( ( dev_sta != ROOT_DEV_FAILED ) && ( USBFSH_CheckRootHubPortEnable( ) == 0x00 ) ) )
|
||||
{
|
||||
@@ -127,7 +127,7 @@ uint8_t USBFSH_CheckRootHubPortStatus( uint8_t dev_sta )
|
||||
*/
|
||||
uint8_t USBFSH_CheckRootHubPortEnable( void )
|
||||
{
|
||||
return ( USBOTG_H_FS->HOST_CTRL & USBFS_UH_PORT_EN );
|
||||
return ( USBFSH->HOST_CTRL & USBFS_UH_PORT_EN );
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
@@ -139,7 +139,7 @@ uint8_t USBFSH_CheckRootHubPortEnable( void )
|
||||
*/
|
||||
uint8_t USBFSH_CheckRootHubPortSpeed( void )
|
||||
{
|
||||
return ( USBOTG_H_FS->MIS_ST & USBFS_UMS_DM_LEVEL? USB_LOW_SPEED: USB_FULL_SPEED );
|
||||
return ( USBFSH->MIS_ST & USBFS_UMS_DM_LEVEL? USB_LOW_SPEED: USB_FULL_SPEED );
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
@@ -153,7 +153,7 @@ uint8_t USBFSH_CheckRootHubPortSpeed( void )
|
||||
*/
|
||||
void USBFSH_SetSelfAddr( uint8_t addr )
|
||||
{
|
||||
USBOTG_H_FS->DEV_ADDR = ( USBOTG_H_FS->DEV_ADDR & USBFS_UDA_GP_BIT ) | ( addr & USBFS_USB_ADDR_MASK );
|
||||
USBFSH->DEV_ADDR = ( USBFSH->DEV_ADDR & USBFS_UDA_GP_BIT ) | ( addr & USBFS_USB_ADDR_MASK );
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
@@ -169,15 +169,15 @@ void USBFSH_SetSelfSpeed( uint8_t speed )
|
||||
{
|
||||
if( speed == USB_FULL_SPEED )
|
||||
{
|
||||
USBOTG_H_FS->BASE_CTRL &= ~USBFS_UC_LOW_SPEED;
|
||||
USBOTG_H_FS->HOST_CTRL &= ~USBFS_UH_LOW_SPEED;
|
||||
USBOTG_H_FS->HOST_SETUP &= ~USBFS_UH_PRE_PID_EN;
|
||||
USBFSH->BASE_CTRL &= ~USBFS_UC_LOW_SPEED;
|
||||
USBFSH->HOST_CTRL &= ~USBFS_UH_LOW_SPEED;
|
||||
USBFSH->HOST_SETUP &= ~USBFS_UH_PRE_PID_EN;
|
||||
}
|
||||
else
|
||||
{
|
||||
USBOTG_H_FS->BASE_CTRL |= USBFS_UC_LOW_SPEED;
|
||||
USBOTG_H_FS->HOST_CTRL |= USBFS_UH_LOW_SPEED;
|
||||
USBOTG_H_FS->HOST_SETUP |= USBFS_UH_PRE_PID_EN;
|
||||
USBFSH->BASE_CTRL |= USBFS_UC_LOW_SPEED;
|
||||
USBFSH->HOST_CTRL |= USBFS_UH_LOW_SPEED;
|
||||
USBFSH->HOST_SETUP |= USBFS_UH_PRE_PID_EN;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -200,7 +200,7 @@ void USBFSH_ResetRootHubPort( uint8_t mode )
|
||||
|
||||
if( mode <= 1 )
|
||||
{
|
||||
USBOTG_H_FS->HOST_CTRL |= USBFS_UH_BUS_RESET; // Start reset
|
||||
USBFSH->HOST_CTRL |= USBFS_UH_BUS_RESET; // Start reset
|
||||
}
|
||||
if( mode == 0 )
|
||||
{
|
||||
@@ -208,15 +208,15 @@ void USBFSH_ResetRootHubPort( uint8_t mode )
|
||||
}
|
||||
if( mode != 1 )
|
||||
{
|
||||
USBOTG_H_FS->HOST_CTRL &= ~USBFS_UH_BUS_RESET; // End reset
|
||||
USBFSH->HOST_CTRL &= ~USBFS_UH_BUS_RESET; // End reset
|
||||
}
|
||||
Delay_Ms( 2 );
|
||||
|
||||
if( USBOTG_H_FS->INT_FG & USBFS_UIF_DETECT )
|
||||
if( USBFSH->INT_FG & USBFS_UIF_DETECT )
|
||||
{
|
||||
if( USBOTG_H_FS->MIS_ST & USBFS_UMS_DEV_ATTACH )
|
||||
if( USBFSH->MIS_ST & USBFS_UMS_DEV_ATTACH )
|
||||
{
|
||||
USBOTG_H_FS->INT_FG = USBFS_UIF_DETECT;
|
||||
USBFSH->INT_FG = USBFS_UIF_DETECT;
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -232,7 +232,7 @@ void USBFSH_ResetRootHubPort( uint8_t mode )
|
||||
*/
|
||||
uint8_t USBFSH_EnableRootHubPort( uint8_t *pspeed )
|
||||
{
|
||||
if( USBOTG_H_FS->MIS_ST & USBFS_UMS_DEV_ATTACH )
|
||||
if( USBFSH->MIS_ST & USBFS_UMS_DEV_ATTACH )
|
||||
{
|
||||
if( USBFSH_CheckRootHubPortEnable( ) == 0x00 )
|
||||
{
|
||||
@@ -242,8 +242,8 @@ uint8_t USBFSH_EnableRootHubPort( uint8_t *pspeed )
|
||||
USBFSH_SetSelfSpeed( USB_LOW_SPEED );
|
||||
}
|
||||
}
|
||||
USBOTG_H_FS->HOST_CTRL |= USBFS_UH_PORT_EN;
|
||||
USBOTG_H_FS->HOST_SETUP |= USBFS_UH_SOF_EN;
|
||||
USBFSH->HOST_CTRL |= USBFS_UH_PORT_EN;
|
||||
USBFSH->HOST_SETUP |= USBFS_UH_SOF_EN;
|
||||
|
||||
return ERR_SUCCESS;
|
||||
}
|
||||
@@ -267,28 +267,28 @@ uint8_t USBFSH_Transact( uint8_t endp_pid, uint8_t endp_tog, uint16_t timeout )
|
||||
uint8_t r, trans_retry;
|
||||
uint16_t i;
|
||||
|
||||
USBOTG_H_FS->HOST_TX_CTRL = USBOTG_H_FS->HOST_RX_CTRL = endp_tog;
|
||||
USBFSH->HOST_TX_CTRL = USBFSH->HOST_RX_CTRL = endp_tog;
|
||||
trans_retry = 0;
|
||||
do
|
||||
{
|
||||
USBOTG_H_FS->HOST_EP_PID = endp_pid; // Specify token PID and endpoint number
|
||||
USBOTG_H_FS->INT_FG = USBFS_UIF_TRANSFER; // Allow transfer
|
||||
for( i = DEF_WAIT_USB_TRANSFER_CNT; ( i != 0 ) && ( ( USBOTG_H_FS->INT_FG & USBFS_UIF_TRANSFER ) == 0 ); i-- )
|
||||
USBFSH->HOST_EP_PID = endp_pid; // Specify token PID and endpoint number
|
||||
USBFSH->INT_FG = USBFS_UIF_TRANSFER; // Allow transfer
|
||||
for( i = DEF_WAIT_USB_TRANSFER_CNT; ( i != 0 ) && ( ( USBFSH->INT_FG & USBFS_UIF_TRANSFER ) == 0 ); i-- )
|
||||
{
|
||||
Delay_Us( 1 ); // Delay for USB transfer
|
||||
}
|
||||
USBOTG_H_FS->HOST_EP_PID = 0x00; // Stop USB transfer
|
||||
if( ( USBOTG_H_FS->INT_FG & USBFS_UIF_TRANSFER ) == 0 )
|
||||
USBFSH->HOST_EP_PID = 0x00; // Stop USB transfer
|
||||
if( ( USBFSH->INT_FG & USBFS_UIF_TRANSFER ) == 0 )
|
||||
{
|
||||
return ERR_USB_UNKNOWN;
|
||||
}
|
||||
else // Complete transfer
|
||||
{
|
||||
if( USBOTG_H_FS->INT_ST & USBFS_UIS_TOG_OK )
|
||||
if( USBFSH->INT_ST & USBFS_UIS_TOG_OK )
|
||||
{
|
||||
return ERR_SUCCESS;
|
||||
}
|
||||
r = USBOTG_H_FS->INT_ST & USBFS_UIS_H_RES_MASK; // Response status of current USB transaction
|
||||
r = USBFSH->INT_ST & USBFS_UIS_H_RES_MASK; // Response status of current USB transaction
|
||||
if( r == USB_PID_STALL )
|
||||
{
|
||||
return ( r | ERR_USB_TRANSFER );
|
||||
@@ -330,7 +330,7 @@ uint8_t USBFSH_Transact( uint8_t endp_pid, uint8_t endp_tog, uint16_t timeout )
|
||||
}
|
||||
Delay_Us( 20 );
|
||||
|
||||
if( USBOTG_H_FS->INT_FG & USBFS_UIF_DETECT )
|
||||
if( USBFSH->INT_FG & USBFS_UIF_DETECT )
|
||||
{
|
||||
Delay_Us( 200 );
|
||||
|
||||
@@ -340,7 +340,7 @@ uint8_t USBFSH_Transact( uint8_t endp_pid, uint8_t endp_tog, uint16_t timeout )
|
||||
}
|
||||
else
|
||||
{
|
||||
USBOTG_H_FS->INT_FG = USBFS_UIF_DETECT;
|
||||
USBFSH->INT_FG = USBFS_UIF_DETECT;
|
||||
}
|
||||
}
|
||||
}while( ++trans_retry < 10 );
|
||||
@@ -369,13 +369,13 @@ uint8_t USBFSH_CtrlTransfer( uint8_t ep0_size, uint8_t *pbuf, uint16_t *plen )
|
||||
{
|
||||
*plen = 0;
|
||||
}
|
||||
USBOTG_H_FS->HOST_TX_LEN = sizeof( USB_SETUP_REQ );
|
||||
USBFSH->HOST_TX_LEN = sizeof( USB_SETUP_REQ );
|
||||
s = USBFSH_Transact( ( USB_PID_SETUP << 4 ) | 0x00, 0x00, DEF_CTRL_TRANS_TIMEOVER_CNT ); // SETUP stage
|
||||
if( s != ERR_SUCCESS )
|
||||
{
|
||||
return s;
|
||||
}
|
||||
USBOTG_H_FS->HOST_TX_CTRL = USBOTG_H_FS->HOST_RX_CTRL = USBFS_UH_T_TOG | USBFS_UH_R_TOG; // Default DATA1
|
||||
USBFSH->HOST_TX_CTRL = USBFSH->HOST_RX_CTRL = USBFS_UH_T_TOG | USBFS_UH_R_TOG; // Default DATA1
|
||||
rem_len = pUSBFS_SetupRequest->wLength;
|
||||
if( rem_len && pbuf )
|
||||
{
|
||||
@@ -385,14 +385,14 @@ uint8_t USBFSH_CtrlTransfer( uint8_t ep0_size, uint8_t *pbuf, uint16_t *plen )
|
||||
while( rem_len )
|
||||
{
|
||||
Delay_Us( 100 );
|
||||
s = USBFSH_Transact( ( USB_PID_IN << 4 ) | 0x00, USBOTG_H_FS->HOST_RX_CTRL, DEF_CTRL_TRANS_TIMEOVER_CNT ); // IN
|
||||
s = USBFSH_Transact( ( USB_PID_IN << 4 ) | 0x00, USBFSH->HOST_RX_CTRL, DEF_CTRL_TRANS_TIMEOVER_CNT ); // IN
|
||||
if( s != ERR_SUCCESS )
|
||||
{
|
||||
return s;
|
||||
}
|
||||
USBOTG_H_FS->HOST_RX_CTRL ^= USBFS_UH_R_TOG;
|
||||
USBFSH->HOST_RX_CTRL ^= USBFS_UH_R_TOG;
|
||||
|
||||
rx_len = ( USBOTG_H_FS->RX_LEN < rem_len )? USBOTG_H_FS->RX_LEN : rem_len;
|
||||
rx_len = ( USBFSH->RX_LEN < rem_len )? USBFSH->RX_LEN : rem_len;
|
||||
rem_len -= rx_len;
|
||||
if( plen )
|
||||
{
|
||||
@@ -404,12 +404,12 @@ uint8_t USBFSH_CtrlTransfer( uint8_t ep0_size, uint8_t *pbuf, uint16_t *plen )
|
||||
pbuf++;
|
||||
}
|
||||
|
||||
if( ( USBOTG_H_FS->RX_LEN == 0 ) || ( USBOTG_H_FS->RX_LEN & ( ep0_size - 1 ) ) )
|
||||
if( ( USBFSH->RX_LEN == 0 ) || ( USBFSH->RX_LEN & ( ep0_size - 1 ) ) )
|
||||
{
|
||||
break; // Short package
|
||||
}
|
||||
}
|
||||
USBOTG_H_FS->HOST_TX_LEN = 0; // Status stage is OUT
|
||||
USBFSH->HOST_TX_LEN = 0; // Status stage is OUT
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -417,38 +417,38 @@ uint8_t USBFSH_CtrlTransfer( uint8_t ep0_size, uint8_t *pbuf, uint16_t *plen )
|
||||
while( rem_len )
|
||||
{
|
||||
Delay_Us( 100 );
|
||||
USBOTG_H_FS->HOST_TX_LEN = ( rem_len >= ep0_size )? ep0_size : rem_len;
|
||||
for( tx_cnt = 0; tx_cnt != USBOTG_H_FS->HOST_TX_LEN; tx_cnt++ )
|
||||
USBFSH->HOST_TX_LEN = ( rem_len >= ep0_size )? ep0_size : rem_len;
|
||||
for( tx_cnt = 0; tx_cnt != USBFSH->HOST_TX_LEN; tx_cnt++ )
|
||||
{
|
||||
USBFS_TX_Buf[ tx_cnt ] = *pbuf;
|
||||
pbuf++;
|
||||
}
|
||||
s = USBFSH_Transact( USB_PID_OUT << 4 | 0x00, USBOTG_H_FS->HOST_TX_CTRL, DEF_CTRL_TRANS_TIMEOVER_CNT ); // OUT
|
||||
s = USBFSH_Transact( USB_PID_OUT << 4 | 0x00, USBFSH->HOST_TX_CTRL, DEF_CTRL_TRANS_TIMEOVER_CNT ); // OUT
|
||||
if( s != ERR_SUCCESS )
|
||||
{
|
||||
return s;
|
||||
}
|
||||
USBOTG_H_FS->HOST_TX_CTRL ^= USBFS_UH_T_TOG;
|
||||
USBFSH->HOST_TX_CTRL ^= USBFS_UH_T_TOG;
|
||||
|
||||
rem_len -= USBOTG_H_FS->HOST_TX_LEN;
|
||||
rem_len -= USBFSH->HOST_TX_LEN;
|
||||
if( plen )
|
||||
{
|
||||
*plen += USBOTG_H_FS->HOST_TX_LEN; // The total length of the actual successful transmission and reception
|
||||
*plen += USBFSH->HOST_TX_LEN; // The total length of the actual successful transmission and reception
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
Delay_Us( 100 );
|
||||
s = USBFSH_Transact( ( USBOTG_H_FS->HOST_TX_LEN )? ( USB_PID_IN << 4 | 0x00 ) : ( USB_PID_OUT << 4 | 0x00 ), USBFS_UH_R_TOG | USBFS_UH_T_TOG, DEF_CTRL_TRANS_TIMEOVER_CNT ); // STATUS stage
|
||||
s = USBFSH_Transact( ( USBFSH->HOST_TX_LEN )? ( USB_PID_IN << 4 | 0x00 ) : ( USB_PID_OUT << 4 | 0x00 ), USBFS_UH_R_TOG | USBFS_UH_T_TOG, DEF_CTRL_TRANS_TIMEOVER_CNT ); // STATUS stage
|
||||
if( s != ERR_SUCCESS )
|
||||
{
|
||||
return s;
|
||||
}
|
||||
if( USBOTG_H_FS->HOST_TX_LEN == 0 )
|
||||
if( USBFSH->HOST_TX_LEN == 0 )
|
||||
{
|
||||
return ERR_SUCCESS;
|
||||
}
|
||||
if( USBOTG_H_FS->RX_LEN == 0 )
|
||||
if( USBFSH->RX_LEN == 0 )
|
||||
{
|
||||
return ERR_SUCCESS;
|
||||
}
|
||||
@@ -641,7 +641,7 @@ uint8_t USBFSH_GetEndpData( uint8_t endp_num, uint8_t *pendp_tog, uint8_t *pbuf,
|
||||
s = USBFSH_Transact( ( USB_PID_IN << 4 ) | endp_num, *pendp_tog, 0 );
|
||||
if( s == ERR_SUCCESS )
|
||||
{
|
||||
*plen = USBOTG_H_FS->RX_LEN;
|
||||
*plen = USBFSH->RX_LEN;
|
||||
memcpy( pbuf, USBFS_RX_Buf, *plen );
|
||||
|
||||
*pendp_tog ^= USBFS_UH_R_TOG;
|
||||
@@ -667,7 +667,7 @@ uint8_t USBFSH_SendEndpData( uint8_t endp_num, uint8_t *pendp_tog, uint8_t *pbuf
|
||||
uint8_t s;
|
||||
|
||||
memcpy( USBFS_TX_Buf, pbuf, len );
|
||||
USBOTG_H_FS->HOST_TX_LEN = len;
|
||||
USBFSH->HOST_TX_LEN = len;
|
||||
s = USBFSH_Transact( ( USB_PID_OUT << 4 ) | endp_num, *pendp_tog, 0 );
|
||||
if( s == ERR_SUCCESS )
|
||||
{
|
||||
|
||||
@@ -3,7 +3,7 @@
|
||||
* Author : WCH
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : USBOTG full speed host header file
|
||||
* Description : USBFS firmware full speed host header file
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
|
||||
@@ -22,6 +22,9 @@ void HardFault_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
|
||||
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
|
||||
void SystemInit (void)
|
||||
{
|
||||
RCC->CTLR |= (uint32_t)0x00000001;
|
||||
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
|
||||
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
|
||||
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
|
||||
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
|
||||
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
|
||||
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
|
||||
RCC->INTR = 0x009F0000;
|
||||
SetSysClock();
|
||||
}
|
||||
|
||||
@@ -39,13 +39,13 @@ void UDisk_USBH_ByteOperation( void )
|
||||
UDisk_Opeation_Flag = 0;
|
||||
printf("CHRV3DiskStatus:%02x\r\n",CHRV3DiskStatus);
|
||||
/* 读文件 */
|
||||
strcpy( (char *)mCmdParam.Open.mPathName, "/C51/NEWFILE.C" ); //设置将要操作的文件路径和文件名/C51/NEWFILE.C
|
||||
strcpy( (char *)mCmdParam.Open.mPathName, "/NEWFILE.C" ); //设置将要操作的文件路径和文件名/C51/NEWFILE.C
|
||||
ret = CHRV3FileOpen( ); //打开文件
|
||||
if ( ret == ERR_MISS_DIR || ret == ERR_MISS_FILE ) //没有找到文件
|
||||
{
|
||||
//创建文件演示
|
||||
printf( "Find No File And Create\r\n" );
|
||||
strcpy( (char *)mCmdParam.Create.mPathName, "/C51/NEWFILE.C" ); //新文件名,在根目录下,中文文件名
|
||||
strcpy( (char *)mCmdParam.Create.mPathName, "/NEWFILE.C" ); //新文件名,在根目录下,中文文件名
|
||||
ret = CHRV3FileCreate( ); //新建文件并打开,如果文件已经存在则先删除后再新建
|
||||
mStopIfError( ret );
|
||||
printf( "ByteWrite\r\n" );
|
||||
@@ -95,7 +95,7 @@ void UDisk_USBH_ByteOperation( void )
|
||||
}
|
||||
/* 二、读取文件前N字节 */
|
||||
TotalCount = 60; //设置准备读取总长度100字节
|
||||
strcpy( (char *)mCmdParam.Open.mPathName, "/C51/NEWFILE.C" ); //设置将要操作的文件路径和文件名/C51/NEWFILE.C
|
||||
strcpy( (char *)mCmdParam.Open.mPathName, "/NEWFILE.C" ); //设置将要操作的文件路径和文件名/C51/NEWFILE.C
|
||||
CHRV3FileOpen( ); //打开文件
|
||||
printf( "读出的前%d个字符是:\r\n",TotalCount );
|
||||
while ( TotalCount )
|
||||
|
||||
@@ -41,7 +41,7 @@ void USBFS_RCC_Init( void )
|
||||
{
|
||||
RCC_USBCLKConfig( RCC_USBCLKSource_PLLCLK_Div1 );
|
||||
}
|
||||
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_OTG_FS, ENABLE );
|
||||
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_USBFS, ENABLE );
|
||||
}
|
||||
/*********************************************************************
|
||||
* @fn USBFS_Host_Init
|
||||
@@ -56,25 +56,25 @@ void USBFS_Host_Init( FunctionalState sta )
|
||||
{
|
||||
if( sta == ENABLE )
|
||||
{
|
||||
USBOTG_H_FS->BASE_CTRL = USBFS_UC_HOST_MODE;
|
||||
USBOTG_H_FS->HOST_CTRL = 0;
|
||||
USBOTG_H_FS->DEV_ADDR = 0;
|
||||
USBOTG_H_FS->HOST_EP_MOD = USBFS_UH_EP_TX_EN | USBFS_UH_EP_RX_EN;
|
||||
USBFSH->BASE_CTRL = USBFS_UC_HOST_MODE;
|
||||
USBFSH->HOST_CTRL = 0;
|
||||
USBFSH->DEV_ADDR = 0;
|
||||
USBFSH->HOST_EP_MOD = USBFS_UH_EP_TX_EN | USBFS_UH_EP_RX_EN;
|
||||
|
||||
USBOTG_H_FS->HOST_RX_DMA = (uint32_t)USBFS_RX_Buf;
|
||||
USBOTG_H_FS->HOST_TX_DMA = (uint32_t)USBFS_TX_Buf;
|
||||
USBFSH->HOST_RX_DMA = (uint32_t)USBFS_RX_Buf;
|
||||
USBFSH->HOST_TX_DMA = (uint32_t)USBFS_TX_Buf;
|
||||
|
||||
USBOTG_H_FS->HOST_RX_CTRL = 0;
|
||||
USBOTG_H_FS->HOST_TX_CTRL = 0;
|
||||
USBOTG_H_FS->BASE_CTRL = USBFS_UC_HOST_MODE | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
|
||||
USBFSH->HOST_RX_CTRL = 0;
|
||||
USBFSH->HOST_TX_CTRL = 0;
|
||||
USBFSH->BASE_CTRL = USBFS_UC_HOST_MODE | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
|
||||
|
||||
USBOTG_H_FS->INT_FG = 0xFF;
|
||||
USBFSH->INT_FG = 0xFF;
|
||||
|
||||
USBOTG_H_FS->INT_EN = USBFS_UIE_TRANSFER | USBFS_UIE_DETECT;
|
||||
USBFSH->INT_EN = USBFS_UIE_TRANSFER | USBFS_UIE_DETECT;
|
||||
}
|
||||
else
|
||||
{
|
||||
USBOTG_H_FS->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
USBFSH->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -90,10 +90,10 @@ void USBFS_Host_Init( FunctionalState sta )
|
||||
uint8_t USBFSH_CheckRootHubPortStatus( uint8_t dev_sta )
|
||||
{
|
||||
/* Check USB device connection or disconnection */
|
||||
if( ( USBOTG_H_FS->INT_FG ) & USBFS_UIF_DETECT )
|
||||
if( ( USBFSH->INT_FG ) & USBFS_UIF_DETECT )
|
||||
{
|
||||
USBOTG_H_FS->INT_FG = USBFS_UIF_DETECT; // Clear flag
|
||||
if( USBOTG_H_FS->MIS_ST & USBFS_UMS_DEV_ATTACH ) // Check that the USB device has been connected to the port
|
||||
USBFSH->INT_FG = USBFS_UIF_DETECT; // Clear flag
|
||||
if( USBFSH->MIS_ST & USBFS_UMS_DEV_ATTACH ) // Check that the USB device has been connected to the port
|
||||
{
|
||||
if( ( dev_sta == ROOT_DEV_DISCONNECT ) || ( ( dev_sta != ROOT_DEV_FAILED ) && ( USBFSH_CheckRootHubPortEnable( ) == 0x00 ) ) )
|
||||
{
|
||||
@@ -124,7 +124,7 @@ uint8_t USBFSH_CheckRootHubPortStatus( uint8_t dev_sta )
|
||||
*/
|
||||
uint8_t USBFSH_CheckRootHubPortEnable( void )
|
||||
{
|
||||
return ( USBOTG_H_FS->HOST_CTRL & USBFS_UH_PORT_EN );
|
||||
return ( USBFSH->HOST_CTRL & USBFS_UH_PORT_EN );
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
@@ -136,7 +136,7 @@ uint8_t USBFSH_CheckRootHubPortEnable( void )
|
||||
*/
|
||||
uint8_t USBFSH_CheckRootHubPortSpeed( void )
|
||||
{
|
||||
return ( USBOTG_H_FS->MIS_ST & USBFS_UMS_DM_LEVEL? USB_LOW_SPEED: USB_FULL_SPEED );
|
||||
return ( USBFSH->MIS_ST & USBFS_UMS_DM_LEVEL? USB_LOW_SPEED: USB_FULL_SPEED );
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
@@ -150,7 +150,7 @@ uint8_t USBFSH_CheckRootHubPortSpeed( void )
|
||||
*/
|
||||
void USBFSH_SetSelfAddr( uint8_t addr )
|
||||
{
|
||||
USBOTG_H_FS->DEV_ADDR = ( USBOTG_H_FS->DEV_ADDR & USBFS_UDA_GP_BIT ) | ( addr & USBFS_USB_ADDR_MASK );
|
||||
USBFSH->DEV_ADDR = ( USBFSH->DEV_ADDR & USBFS_UDA_GP_BIT ) | ( addr & USBFS_USB_ADDR_MASK );
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
@@ -166,12 +166,12 @@ void USBFSH_SetSelfSpeed( uint8_t speed )
|
||||
{
|
||||
if( speed )
|
||||
{
|
||||
USBOTG_H_FS->BASE_CTRL &= ~USBFS_UC_LOW_SPEED;
|
||||
USBOTG_H_FS->HOST_SETUP &= ~USBFS_UH_PRE_PID_EN;
|
||||
USBFSH->BASE_CTRL &= ~USBFS_UC_LOW_SPEED;
|
||||
USBFSH->HOST_SETUP &= ~USBFS_UH_PRE_PID_EN;
|
||||
}
|
||||
else
|
||||
{
|
||||
USBOTG_H_FS->BASE_CTRL |= USBFS_UC_LOW_SPEED;
|
||||
USBFSH->BASE_CTRL |= USBFS_UC_LOW_SPEED;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -193,7 +193,7 @@ void USBFSH_ResetRootHubPort( uint8_t mode )
|
||||
USBFSH_SetSelfSpeed( 1 );
|
||||
if( mode <= 1 )
|
||||
{
|
||||
USBOTG_H_FS->HOST_CTRL = ( USBOTG_H_FS->HOST_CTRL & ~USBFS_UH_LOW_SPEED ) | USBFS_UH_BUS_RESET;
|
||||
USBFSH->HOST_CTRL = ( USBFSH->HOST_CTRL & ~USBFS_UH_LOW_SPEED ) | USBFS_UH_BUS_RESET;
|
||||
}
|
||||
if( mode == 0 )
|
||||
{
|
||||
@@ -201,10 +201,10 @@ void USBFSH_ResetRootHubPort( uint8_t mode )
|
||||
}
|
||||
if( mode != 1 )
|
||||
{
|
||||
USBOTG_H_FS->HOST_CTRL = USBOTG_H_FS->HOST_CTRL & ~USBFS_UH_BUS_RESET; // End Reset
|
||||
USBFSH->HOST_CTRL = USBFSH->HOST_CTRL & ~USBFS_UH_BUS_RESET; // End Reset
|
||||
}
|
||||
Delay_Ms( 2 );
|
||||
USBOTG_H_FS->INT_FG = USBFS_UIF_DETECT;
|
||||
USBFSH->INT_FG = USBFS_UIF_DETECT;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
@@ -218,18 +218,18 @@ void USBFSH_ResetRootHubPort( uint8_t mode )
|
||||
*/
|
||||
uint8_t USBFSH_EnableRootHubPort( uint8_t *pspeed )
|
||||
{
|
||||
if( USBOTG_H_FS->MIS_ST & USBFS_UMS_DEV_ATTACH )
|
||||
if( USBFSH->MIS_ST & USBFS_UMS_DEV_ATTACH )
|
||||
{
|
||||
if( USBFSH_CheckRootHubPortEnable( ) == 0x00 )
|
||||
{
|
||||
*pspeed = USBFSH_CheckRootHubPortSpeed( );
|
||||
if( *pspeed == 0 )
|
||||
{
|
||||
USBOTG_H_FS->HOST_CTRL |= USBFS_UH_LOW_SPEED;
|
||||
USBFSH->HOST_CTRL |= USBFS_UH_LOW_SPEED;
|
||||
}
|
||||
}
|
||||
USBOTG_H_FS->HOST_CTRL |= USBFS_UH_PORT_EN;
|
||||
USBOTG_H_FS->HOST_SETUP |= USBFS_UH_SOF_EN;
|
||||
USBFSH->HOST_CTRL |= USBFS_UH_PORT_EN;
|
||||
USBFSH->HOST_SETUP |= USBFS_UH_SOF_EN;
|
||||
|
||||
return ERR_SUCCESS;
|
||||
}
|
||||
@@ -253,29 +253,29 @@ uint8_t USBFSH_Transact( uint8_t endp_pid, uint8_t endp_tog, uint16_t timeout )
|
||||
uint8_t r, trans_rerty;
|
||||
uint16_t i;
|
||||
|
||||
USBOTG_H_FS->HOST_TX_CTRL = USBOTG_H_FS->HOST_RX_CTRL = endp_tog;
|
||||
USBFSH->HOST_TX_CTRL = USBFSH->HOST_RX_CTRL = endp_tog;
|
||||
trans_rerty = 0;
|
||||
do
|
||||
{
|
||||
USBOTG_H_FS->HOST_EP_PID = endp_pid; // Specify token PID and endpoint number
|
||||
USBOTG_H_FS->INT_FG = USBFS_UIF_TRANSFER; // Allow transmission
|
||||
for( i = DEF_WAIT_USB_TOUT_200US; ( i != 0 ) && ( ( USBOTG_H_FS->INT_FG & USBFS_UIF_TRANSFER ) == 0 ); i-- )
|
||||
USBFSH->HOST_EP_PID = endp_pid; // Specify token PID and endpoint number
|
||||
USBFSH->INT_FG = USBFS_UIF_TRANSFER; // Allow transmission
|
||||
for( i = DEF_WAIT_USB_TOUT_200US; ( i != 0 ) && ( ( USBFSH->INT_FG & USBFS_UIF_TRANSFER ) == 0 ); i-- )
|
||||
{
|
||||
Delay_Us( 1 );
|
||||
}
|
||||
USBOTG_H_FS->HOST_EP_PID = 0x00; // Stop USB transfer
|
||||
if( ( USBOTG_H_FS->INT_FG & USBFS_UIF_TRANSFER ) == 0 )
|
||||
USBFSH->HOST_EP_PID = 0x00; // Stop USB transfer
|
||||
if( ( USBFSH->INT_FG & USBFS_UIF_TRANSFER ) == 0 )
|
||||
{
|
||||
return ERR_USB_UNKNOWN;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Complete transfer */
|
||||
if( USBOTG_H_FS->INT_ST & USBFS_UIS_TOG_OK )
|
||||
if( USBFSH->INT_ST & USBFS_UIS_TOG_OK )
|
||||
{
|
||||
return ERR_SUCCESS;
|
||||
}
|
||||
r = USBOTG_H_FS->INT_ST & USBFS_UIS_H_RES_MASK; // USB device answer status
|
||||
r = USBFSH->INT_ST & USBFS_UIS_H_RES_MASK; // USB device answer status
|
||||
if( r == USB_PID_STALL )
|
||||
{
|
||||
return ( r | ERR_USB_TRANSFER );
|
||||
@@ -316,7 +316,7 @@ uint8_t USBFSH_Transact( uint8_t endp_pid, uint8_t endp_tog, uint16_t timeout )
|
||||
}
|
||||
}
|
||||
Delay_Us( 15 );
|
||||
if( USBOTG_H_FS->INT_FG & USBFS_UIF_DETECT )
|
||||
if( USBFSH->INT_FG & USBFS_UIF_DETECT )
|
||||
{
|
||||
Delay_Us( 200 );
|
||||
if( USBFSH_CheckRootHubPortEnable( ) == 0 )
|
||||
@@ -349,14 +349,14 @@ uint8_t USBFSH_CtrlTransfer( uint8_t ep0_size, uint8_t *pbuf, uint16_t *plen )
|
||||
{
|
||||
*plen = 0;
|
||||
}
|
||||
USBOTG_H_FS->HOST_TX_LEN = sizeof( USB_SETUP_REQ );
|
||||
USBFSH->HOST_TX_LEN = sizeof( USB_SETUP_REQ );
|
||||
s = USBFSH_Transact( USB_PID_SETUP << 4 | 0x00, 0x00, DEF_CTRL_TRANS_TIMEOVER_CNT ); // SETUP stage, 200mS timeout
|
||||
if( s != ERR_SUCCESS )
|
||||
{
|
||||
return s;
|
||||
}
|
||||
USBOTG_H_FS->HOST_TX_CTRL = USBOTG_H_FS->HOST_RX_CTRL = USBFS_UH_T_TOG | USBFS_UH_R_TOG | USBFS_UH_T_AUTO_TOG | USBFS_UH_R_AUTO_TOG; // Default DATA1
|
||||
USBOTG_H_FS->HOST_TX_LEN = 0x01; // The default no-data state stage is IN
|
||||
USBFSH->HOST_TX_CTRL = USBFSH->HOST_RX_CTRL = USBFS_UH_T_TOG | USBFS_UH_R_TOG | USBFS_UH_T_AUTO_TOG | USBFS_UH_R_AUTO_TOG; // Default DATA1
|
||||
USBFSH->HOST_TX_LEN = 0x01; // The default no-data state stage is IN
|
||||
rem_len = pUSBFS_SetupRequest->wLength;
|
||||
if( rem_len && pbuf )
|
||||
{
|
||||
@@ -366,12 +366,12 @@ uint8_t USBFSH_CtrlTransfer( uint8_t ep0_size, uint8_t *pbuf, uint16_t *plen )
|
||||
while( rem_len )
|
||||
{
|
||||
Delay_Us( 100 );
|
||||
s = USBFSH_Transact( USB_PID_IN << 4 | 0x00, USBOTG_H_FS->HOST_RX_CTRL, DEF_CTRL_TRANS_TIMEOVER_CNT ); // IN
|
||||
s = USBFSH_Transact( USB_PID_IN << 4 | 0x00, USBFSH->HOST_RX_CTRL, DEF_CTRL_TRANS_TIMEOVER_CNT ); // IN
|
||||
if( s != ERR_SUCCESS )
|
||||
{
|
||||
return s;
|
||||
}
|
||||
rx_len = ( USBOTG_H_FS->RX_LEN < rem_len )? USBOTG_H_FS->RX_LEN : rem_len;
|
||||
rx_len = ( USBFSH->RX_LEN < rem_len )? USBFSH->RX_LEN : rem_len;
|
||||
rem_len -= rx_len;
|
||||
if( plen )
|
||||
{
|
||||
@@ -383,12 +383,12 @@ uint8_t USBFSH_CtrlTransfer( uint8_t ep0_size, uint8_t *pbuf, uint16_t *plen )
|
||||
pbuf++;
|
||||
}
|
||||
|
||||
if( ( USBOTG_H_FS->RX_LEN == 0 ) || ( USBOTG_H_FS->RX_LEN & ( ep0_size - 1 ) ) )
|
||||
if( ( USBFSH->RX_LEN == 0 ) || ( USBFSH->RX_LEN & ( ep0_size - 1 ) ) )
|
||||
{
|
||||
break; // Short package
|
||||
}
|
||||
}
|
||||
USBOTG_H_FS->HOST_TX_LEN = 0x00; // Status stage is OUT
|
||||
USBFSH->HOST_TX_LEN = 0x00; // Status stage is OUT
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -396,36 +396,36 @@ uint8_t USBFSH_CtrlTransfer( uint8_t ep0_size, uint8_t *pbuf, uint16_t *plen )
|
||||
while( rem_len )
|
||||
{
|
||||
Delay_Us( 100 );
|
||||
USBOTG_H_FS->HOST_TX_LEN = ( rem_len >= ep0_size )? ep0_size : rem_len;
|
||||
for( tx_cnt = 0; tx_cnt != USBOTG_H_FS->HOST_TX_LEN; tx_cnt++ )
|
||||
USBFSH->HOST_TX_LEN = ( rem_len >= ep0_size )? ep0_size : rem_len;
|
||||
for( tx_cnt = 0; tx_cnt != USBFSH->HOST_TX_LEN; tx_cnt++ )
|
||||
{
|
||||
USBFS_TX_Buf[ tx_cnt ] = *pbuf;
|
||||
pbuf++;
|
||||
}
|
||||
s = USBFSH_Transact( USB_PID_OUT << 4 | 0x00, USBOTG_H_FS->HOST_TX_CTRL, DEF_CTRL_TRANS_TIMEOVER_CNT ); // OUT
|
||||
s = USBFSH_Transact( USB_PID_OUT << 4 | 0x00, USBFSH->HOST_TX_CTRL, DEF_CTRL_TRANS_TIMEOVER_CNT ); // OUT
|
||||
if( s != ERR_SUCCESS )
|
||||
{
|
||||
return s;
|
||||
}
|
||||
rem_len -= USBOTG_H_FS->HOST_TX_LEN;
|
||||
rem_len -= USBFSH->HOST_TX_LEN;
|
||||
if( plen )
|
||||
{
|
||||
*plen += USBOTG_H_FS->HOST_TX_LEN; // The total length of the actual successful transmission and reception
|
||||
*plen += USBFSH->HOST_TX_LEN; // The total length of the actual successful transmission and reception
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
Delay_Us( 100 );
|
||||
s = USBFSH_Transact( ( USBOTG_H_FS->HOST_TX_LEN )? ( USB_PID_IN << 4 | 0x00 ) : ( USB_PID_OUT << 4 | 0x00 ), USBFS_UH_R_TOG | USBFS_UH_T_TOG, DEF_CTRL_TRANS_TIMEOVER_CNT ); /* STATUS½×¶Î */
|
||||
s = USBFSH_Transact( ( USBFSH->HOST_TX_LEN )? ( USB_PID_IN << 4 | 0x00 ) : ( USB_PID_OUT << 4 | 0x00 ), USBFS_UH_R_TOG | USBFS_UH_T_TOG, DEF_CTRL_TRANS_TIMEOVER_CNT ); /* STATUS½×¶Î */
|
||||
if( s != ERR_SUCCESS )
|
||||
{
|
||||
return s;
|
||||
}
|
||||
if( USBOTG_H_FS->HOST_TX_LEN == 0 )
|
||||
if( USBFSH->HOST_TX_LEN == 0 )
|
||||
{
|
||||
return ERR_SUCCESS;
|
||||
}
|
||||
if( USBOTG_H_FS->RX_LEN == 0 )
|
||||
if( USBFSH->RX_LEN == 0 )
|
||||
{
|
||||
return ERR_SUCCESS;
|
||||
}
|
||||
@@ -619,7 +619,7 @@ uint8_t USBFSH_GetEndpData( uint8_t endp_num, uint8_t *pendp_tog, uint8_t *pbuf,
|
||||
if( s == ERR_SUCCESS )
|
||||
{
|
||||
*pendp_tog ^= USBFS_UH_T_TOG | USBFS_UH_R_TOG;
|
||||
*plen = USBOTG_H_FS->RX_LEN;
|
||||
*plen = USBFSH->RX_LEN;
|
||||
memcpy( pbuf, USBFS_RX_Buf, *plen );
|
||||
}
|
||||
|
||||
@@ -643,7 +643,7 @@ uint8_t USBFSH_SendEndpData( uint8_t endp_num, uint8_t *pendp_tog, uint8_t *pbuf
|
||||
uint8_t s;
|
||||
|
||||
memcpy( USBFS_TX_Buf, pbuf, len );
|
||||
USBOTG_H_FS->HOST_TX_LEN = len;
|
||||
USBFSH->HOST_TX_LEN = len;
|
||||
|
||||
s = USBFSH_Transact( ( USB_PID_OUT << 4 ) | endp_num, *pendp_tog, 0 );
|
||||
if( s == ERR_SUCCESS )
|
||||
|
||||
@@ -3,7 +3,7 @@
|
||||
* Author : WCH
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : USBOTG full speed host header file
|
||||
* Description : USBFS firmware full speed host header file
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
|
||||
@@ -22,6 +22,9 @@ void HardFault_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
|
||||
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
|
||||
void SystemInit (void)
|
||||
{
|
||||
RCC->CTLR |= (uint32_t)0x00000001;
|
||||
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
|
||||
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
|
||||
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
|
||||
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
|
||||
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
|
||||
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
|
||||
RCC->INTR = 0x009F0000;
|
||||
SetSysClock();
|
||||
}
|
||||
|
||||
@@ -7,14 +7,14 @@
|
||||
** KEIL423, gcc 8.20 **
|
||||
*****************************************
|
||||
*/
|
||||
/* CHRV3 U盘主机文件系统接口, 支持: FAT12/FAT16/FAT32 */
|
||||
/* CH103 U盘主机文件系统接口, 支持: FAT12/FAT16/FAT32 */
|
||||
|
||||
//#define DISK_BASE_BUF_LEN 512 /* 默认的磁盘数据缓冲区大小为512字节(可以选择为2048甚至4096以支持某些大扇区的U盘),为0则禁止在本文件中定义缓冲区并由应用程序在pDISK_BASE_BUF中指定 */
|
||||
/* 如果需要复用磁盘数据缓冲区以节约RAM,那么可将DISK_BASE_BUF_LEN定义为0以禁止在本文件中定义缓冲区,而由应用程序在调用CHRV3LibInit之前将与其它程序合用的缓冲区起始地址置入pDISK_BASE_BUF变量 */
|
||||
//#define DISK_BASE_BUF_LEN 512 /* 默认的磁盘数据缓冲区大小为512字节(可以选择为2048甚至4096以支持某些大扇区的U盘),为0则禁止在本文件中定义缓冲区并由应用程序在pDISK_BASE_BUF中指定 */
|
||||
/* 如果需要复用磁盘数据缓冲区以节约RAM,那么可将DISK_BASE_BUF_LEN定义为0以禁止在本文件中定义缓冲区,而由应用程序在调用CH103LibInit之前将与其它程序合用的缓冲区起始地址置入pDISK_BASE_BUF变量 */
|
||||
|
||||
//#define NO_DEFAULT_ACCESS_SECTOR 1 /* 禁止默认的磁盘扇区读写子程序,下面用自行编写的程序代替它 */
|
||||
//#define NO_DEFAULT_DISK_CONNECT 1 /* 禁止默认的检查磁盘连接子程序,下面用自行编写的程序代替它 */
|
||||
//#define NO_DEFAULT_FILE_ENUMER 1 /* 禁止默认的文件名枚举回调程序,下面用自行编写的程序代替它 */
|
||||
//#define NO_DEFAULT_ACCESS_SECTOR 1 /* 禁止默认的磁盘扇区读写子程序,下面用自行编写的程序代替它 */
|
||||
//#define NO_DEFAULT_DISK_CONNECT 1 /* 禁止默认的检查磁盘连接子程序,下面用自行编写的程序代替它 */
|
||||
//#define NO_DEFAULT_FILE_ENUMER 1 /* 禁止默认的文件名枚举回调程序,下面用自行编写的程序代替它 */
|
||||
//#include "CHRV3SFR.H"
|
||||
|
||||
#include "debug.h"
|
||||
@@ -26,37 +26,37 @@ uint8_t USBHostTransact( uint8_t endp_pid, uint8_t tog, uint32_t timeout )
|
||||
{
|
||||
uint8_t r, trans_rerty;
|
||||
uint16_t i;
|
||||
USBOTG_H_FS->HOST_TX_CTRL = USBOTG_H_FS->HOST_RX_CTRL = 0;
|
||||
USBFSH->HOST_TX_CTRL = USBFSH->HOST_RX_CTRL = 0;
|
||||
if( tog & 0x80 )
|
||||
{
|
||||
USBOTG_H_FS->HOST_RX_CTRL = 1<<2;
|
||||
USBFSH->HOST_RX_CTRL = 1<<2;
|
||||
}
|
||||
if( tog & 0x40 )
|
||||
{
|
||||
USBOTG_H_FS->HOST_TX_CTRL = 1<<2;
|
||||
USBFSH->HOST_TX_CTRL = 1<<2;
|
||||
}
|
||||
trans_rerty = 0;
|
||||
do
|
||||
{
|
||||
USBOTG_H_FS->HOST_EP_PID = endp_pid; // Specify token PID and endpoint number
|
||||
USBOTG_H_FS->INT_FG = USBFS_UIF_TRANSFER; // Allow transmission
|
||||
for( i = DEF_WAIT_USB_TOUT_200US; ( i != 0 ) && ( ( USBOTG_H_FS->INT_FG & USBFS_UIF_TRANSFER ) == 0 ); i-- )
|
||||
USBFSH->HOST_EP_PID = endp_pid; // Specify token PID and endpoint number
|
||||
USBFSH->INT_FG = USBFS_UIF_TRANSFER; // Allow transmission
|
||||
for( i = DEF_WAIT_USB_TOUT_200US; ( i != 0 ) && ( ( USBFSH->INT_FG & USBFS_UIF_TRANSFER ) == 0 ); i-- )
|
||||
{
|
||||
Delay_Us( 1 );
|
||||
}
|
||||
USBOTG_H_FS->HOST_EP_PID = 0x00; // Stop USB transfer
|
||||
if( ( USBOTG_H_FS->INT_FG & USBFS_UIF_TRANSFER ) == 0 )
|
||||
USBFSH->HOST_EP_PID = 0x00; // Stop USB transfer
|
||||
if( ( USBFSH->INT_FG & USBFS_UIF_TRANSFER ) == 0 )
|
||||
{
|
||||
return ERR_USB_UNKNOWN;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Complete transfer */
|
||||
if( USBOTG_H_FS->INT_ST & USBFS_UIS_TOG_OK )
|
||||
if( USBFSH->INT_ST & USBFS_UIS_TOG_OK )
|
||||
{
|
||||
return ERR_SUCCESS;
|
||||
}
|
||||
r = USBOTG_H_FS->INT_ST & USBFS_UIS_H_RES_MASK; // USB device answer status
|
||||
r = USBFSH->INT_ST & USBFS_UIS_H_RES_MASK; // USB device answer status
|
||||
if( r == USB_PID_STALL )
|
||||
{
|
||||
return ( r | ERR_USB_TRANSFER );
|
||||
@@ -97,7 +97,7 @@ uint8_t USBHostTransact( uint8_t endp_pid, uint8_t tog, uint32_t timeout )
|
||||
}
|
||||
}
|
||||
Delay_Us( 15 );
|
||||
if( USBOTG_H_FS->INT_FG & USBFS_UIF_DETECT )
|
||||
if( USBFSH->INT_FG & USBFS_UIF_DETECT )
|
||||
{
|
||||
Delay_Us( 200 );
|
||||
if( USBFSH_CheckRootHubPortEnable( ) == 0 )
|
||||
@@ -191,28 +191,29 @@ uint8_t HubClearPortFeature( uint8_t HubPortIndex, uint8_t FeatureSelt )
|
||||
}
|
||||
#endif
|
||||
|
||||
CMD_PARAM_I mCmdParam; /* 命令参数 */
|
||||
#if DISK_BASE_BUF_LEN > 0
|
||||
//uint8_t DISK_BASE_BUF[ DISK_BASE_BUF_LEN ] __attribute__((at(BA_RAM+SZ_RAM/2))); /* 外部RAM的磁盘数据缓冲区,缓冲区长度为一个扇区的长度 */
|
||||
uint8_t DISK_BASE_BUF[ DISK_BASE_BUF_LEN ] __attribute__((aligned (4))); /* 外部RAM的磁盘数据缓冲区,缓冲区长度为一个扇区的长度 */
|
||||
//UINT8 DISK_FAT_BUF[ DISK_BASE_BUF_LEN ] __attribute__((aligned (4))); /* 外部RAM的磁盘FAT数据缓冲区,缓冲区长度为一个扇区的长度 */
|
||||
CMD_PARAM_I mCmdParam; /* 命令参数 */
|
||||
#if DISK_BASE_BUF_LEN > 0
|
||||
//uint8_t DISK_BASE_BUF[ DISK_BASE_BUF_LEN ] __attribute__((at(BA_RAM+SZ_RAM/2))); /* 外部RAM的磁盘数据缓冲区,缓冲区长度为一个扇区的长度 */
|
||||
uint8_t DISK_BASE_BUF[ DISK_BASE_BUF_LEN ] __attribute__((aligned (4))); /* 外部RAM的磁盘数据缓冲区,缓冲区长度为一个扇区的长度 */
|
||||
//uint8_t DISK_FAT_BUF[ DISK_BASE_BUF_LEN ] __attribute__((aligned (4))); /* 外部RAM的磁盘FAT数据缓冲区,缓冲区长度为一个扇区的长度 */
|
||||
#endif
|
||||
|
||||
/* 以下程序可以根据需要修改 */
|
||||
/* 以下程序可以根据需要修改 */
|
||||
#ifndef NO_DEFAULT_ACCESS_SECTOR /* 在应用程序中定义NO_DEFAULT_ACCESS_SECTOR可以禁止默认的磁盘扇区读写子程序,然后用自行编写的程序代替它 */
|
||||
//if ( use_external_interface )
|
||||
//{
|
||||
// //替换U盘扇区底层读写子程序
|
||||
// CH103vSectorSize=512; // 设置实际的扇区大小,必须是512的倍数,该值是磁盘的扇区大小
|
||||
// CH103vSectorSizeB=9; // 设置实际的扇区大小的位移数,512则对应9,1024对应10,2048对应11
|
||||
// CH103DiskStatus=DISK_MOUNTED; // 强制块设备连接成功(只差分析文件系统)
|
||||
|
||||
#ifndef NO_DEFAULT_ACCESS_SECTOR /* 在应用程序中定义NO_DEFAULT_ACCESS_SECTOR可以禁止默认的磁盘扇区读写子程序,然后用自行编写的程序代替它 */
|
||||
//if ( use_external_interface ) { // 替换U盘扇区底层读写子程序
|
||||
// CHRV3vSectorSize=512; // 设置实际的扇区大小,必须是512的倍数,该值是磁盘的扇区大小
|
||||
// CHRV3vSectorSizeB=9; // 设置实际的扇区大小的位移数,512则对应9,1024对应10,2048对应11
|
||||
// CHRV3DiskStatus=DISK_MOUNTED; // 强制块设备连接成功(只差分析文件系统)
|
||||
//}
|
||||
|
||||
uint8_t CHRV3ReadSector( uint8_t SectCount, uint8_t *DataBuf ) /* 从磁盘读取多个扇区的数据到缓冲区中 */
|
||||
uint8_t CHRV3ReadSector( uint8_t SectCount, uint8_t *DataBuf ) /* 从磁盘读取多个扇区的数据到缓冲区中 */
|
||||
{
|
||||
uint8_t retry;
|
||||
// if ( use_external_interface ) return( extReadSector( CHRV3vLbaCurrent, SectCount, DataBuf ) ); /* 外部接口 */
|
||||
for( retry = 0; retry < 3; retry ++ ) { /* 错误重试 */
|
||||
pCBW -> mCBW_DataLen = (uint32_t)SectCount << CHRV3vSectorSizeB; /* 数据传输长度 */
|
||||
// if ( use_external_interface ) return( extReadSector( CHRV3vLbaCurrent, SectCount, DataBuf ) ); /* 外部接口 */
|
||||
for( retry = 0; retry < 3; retry ++ ) { /* 错误重试 */
|
||||
pCBW -> mCBW_DataLen = (uint32_t)SectCount << CHRV3vSectorSizeB; /* 数据传输长度 */
|
||||
pCBW -> mCBW_Flag = 0x80;
|
||||
pCBW -> mCBW_LUN = CHRV3vCurrentLun;
|
||||
pCBW -> mCBW_CB_Len = 10;
|
||||
@@ -226,7 +227,7 @@ uint8_t CHRV3ReadSector( uint8_t SectCount, uint8_t *DataBuf ) /*
|
||||
pCBW -> mCBW_CB_Buf[ 7 ] = 0x00;
|
||||
pCBW -> mCBW_CB_Buf[ 8 ] = SectCount;
|
||||
pCBW -> mCBW_CB_Buf[ 9 ] = 0x00;
|
||||
CHRV3BulkOnlyCmd( DataBuf ); /* 执行基于BulkOnly协议的命令 */
|
||||
CHRV3BulkOnlyCmd( DataBuf ); /* 执行基于BulkOnly协议的命令 */
|
||||
if ( CHRV3IntStatus == ERR_SUCCESS ) {
|
||||
return( ERR_SUCCESS );
|
||||
}
|
||||
@@ -235,16 +236,16 @@ uint8_t CHRV3ReadSector( uint8_t SectCount, uint8_t *DataBuf ) /*
|
||||
return( CHRV3IntStatus );
|
||||
}
|
||||
}
|
||||
return( CHRV3IntStatus = ERR_USB_DISK_ERR ); /* 磁盘操作错误 */
|
||||
return( CHRV3IntStatus = ERR_USB_DISK_ERR ); /* 磁盘操作错误 */
|
||||
}
|
||||
|
||||
#ifdef EN_DISK_WRITE
|
||||
uint8_t CHRV3WriteSector( uint8_t SectCount, uint8_t *DataBuf ) /* 将缓冲区中的多个扇区的数据块写入磁盘 */
|
||||
uint8_t CHRV3WriteSector( uint8_t SectCount, uint8_t *DataBuf ) /* 将缓冲区中的多个扇区的数据块写入磁盘 */
|
||||
{
|
||||
uint8_t retry;
|
||||
// if ( use_external_interface ) return( extWriteSector( CHRV3vLbaCurrent, SectCount, DataBuf ) ); /* 外部接口 */
|
||||
for( retry = 0; retry < 3; retry ++ ) { /* 错误重试 */
|
||||
pCBW -> mCBW_DataLen = (uint32_t)SectCount << CHRV3vSectorSizeB; /* 数据传输长度 */
|
||||
// if ( use_external_interface ) return( extWriteSector( CHRV3vLbaCurrent, SectCount, DataBuf ) ); /* 外部接口 */
|
||||
for( retry = 0; retry < 3; retry ++ ) { /* 错误重试 */
|
||||
pCBW -> mCBW_DataLen = (uint32_t)SectCount << CHRV3vSectorSizeB; /* 数据传输长度 */
|
||||
pCBW -> mCBW_Flag = 0x00;
|
||||
pCBW -> mCBW_LUN = CHRV3vCurrentLun;
|
||||
pCBW -> mCBW_CB_Len = 10;
|
||||
@@ -258,9 +259,9 @@ uint8_t CHRV3WriteSector( uint8_t SectCount, uint8_t *DataBuf ) /*
|
||||
pCBW -> mCBW_CB_Buf[ 7 ] = 0x00;
|
||||
pCBW -> mCBW_CB_Buf[ 8 ] = SectCount;
|
||||
pCBW -> mCBW_CB_Buf[ 9 ] = 0x00;
|
||||
CHRV3BulkOnlyCmd( DataBuf ); /* 执行基于BulkOnly协议的命令 */
|
||||
CHRV3BulkOnlyCmd( DataBuf ); /* 执行基于BulkOnly协议的命令 */
|
||||
if ( CHRV3IntStatus == ERR_SUCCESS ) {
|
||||
Delay_Us( 200 ); /* 写操作后延时 */
|
||||
Delay_Us( 200 ); /* 写操作后延时 */
|
||||
return( ERR_SUCCESS );
|
||||
}
|
||||
CHRV3IntStatus = CHRV3AnalyzeError( retry );
|
||||
@@ -268,26 +269,18 @@ uint8_t CHRV3WriteSector( uint8_t SectCount, uint8_t *DataBuf ) /*
|
||||
return( CHRV3IntStatus );
|
||||
}
|
||||
}
|
||||
return( CHRV3IntStatus = ERR_USB_DISK_ERR ); /* 磁盘操作错误 */
|
||||
return( CHRV3IntStatus = ERR_USB_DISK_ERR ); /* 磁盘操作错误 */
|
||||
}
|
||||
#endif
|
||||
#endif // NO_DEFAULT_ACCESS_SECTOR
|
||||
|
||||
#ifndef NO_DEFAULT_DISK_CONNECT /* 在应用程序中定义NO_DEFAULT_DISK_CONNECT可以禁止默认的检查磁盘连接子程序,然后用自行编写的程序代替它 */
|
||||
#ifndef NO_DEFAULT_DISK_CONNECT
|
||||
|
||||
/*
|
||||
约定: USB设备地址分配规则(参考USB_DEVICE_ADDR)
|
||||
地址值 设备位置
|
||||
0x02 内置Root-HUB0下的USB设备或外部HUB
|
||||
0x03 内置Root-HUB1下的USB设备或外部HUB
|
||||
0x1x 内置Root-HUB0下的外部HUB的端口x下的USB设备,x为1~n
|
||||
0x2x 内置Root-HUB1下的外部HUB的端口x下的USB设备,x为1~n
|
||||
*/
|
||||
#if DEF_USB_PORT_FS_EN
|
||||
#define UHUB_DEV_ADDR (USBOTG_H_FS->DEV_ADDR)
|
||||
#define UHUB_MIS_STAT (USBOTG_H_FS->MIS_ST)
|
||||
#define UHUB_HOST_CTRL (USBOTG_H_FS->HOST_CTRL)
|
||||
#define UHUB_INT_FLAG (USBOTG_H_FS->INT_FG)
|
||||
#define UHUB_DEV_ADDR (USBFSH->DEV_ADDR)
|
||||
#define UHUB_MIS_STAT (USBFSH->MIS_ST)
|
||||
#define UHUB_HOST_CTRL (USBFSH->HOST_CTRL)
|
||||
#define UHUB_INT_FLAG (USBFSH->INT_FG)
|
||||
#define bUMS_ATTACH USBFS_UMS_DEV_ATTACH
|
||||
#define bUMS_SUSPEND USBFS_UMS_SUSPEND
|
||||
#define DEF_ADR_OFFSET 0
|
||||
@@ -301,7 +294,7 @@ uint8_t CHRV3WriteSector( uint8_t SectCount, uint8_t *DataBuf ) /*
|
||||
#define DEF_ADR_OFFSET 1
|
||||
#endif
|
||||
|
||||
/* 检查磁盘是否连接 */
|
||||
/* 检查磁盘是否连接 */
|
||||
uint8_t CHRV3DiskConnect( void )
|
||||
{
|
||||
uint8_t ums, devaddr;
|
||||
@@ -310,25 +303,25 @@ uint8_t CHRV3DiskConnect( void )
|
||||
devaddr = UHUB_DEV_ADDR;
|
||||
if ( devaddr == (USB_DEVICE_ADDR + DEF_ADR_OFFSET) )
|
||||
{
|
||||
/* 内置Root-HUB下的USB设备 */
|
||||
/* 内置Root-HUB下的USB设备 */
|
||||
if ( ums & bUMS_ATTACH )
|
||||
{
|
||||
/* 内置Root-HUB下的USB设备存在 */
|
||||
/* 内置Root-HUB下的USB设备存在 */
|
||||
if ( ( ums & bUMS_SUSPEND ) == 0 )
|
||||
{
|
||||
/* 内置Root-HUB下的USB设备存在且未插拔 */
|
||||
return( ERR_SUCCESS ); /* USB设备已经连接且未插拔 */
|
||||
/* 内置Root-HUB下的USB设备存在且未插拔 */
|
||||
return( ERR_SUCCESS ); /* USB设备已经连接且未插拔 */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* 内置Root-HUB下的USB设备存在 */
|
||||
CHRV3DiskStatus = DISK_CONNECT; /* 曾经断开过 */
|
||||
return( ERR_SUCCESS ); /* 外部HUB或USB设备已经连接或者断开后重新连接 */
|
||||
/* 内置Root-HUB下的USB设备存在 */
|
||||
CHRV3DiskStatus = DISK_CONNECT; /* 曾经断开过 */
|
||||
return( ERR_SUCCESS ); /* 外部HUB或USB设备已经连接或者断开后重新连接 */
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* USB设备断开 */
|
||||
/* USB设备断开 */
|
||||
mDiskDisconn:
|
||||
CHRV3DiskStatus = DISK_DISCONNECT;
|
||||
return( ERR_USB_DISCON );
|
||||
@@ -341,63 +334,63 @@ mDiskDisconn:
|
||||
}
|
||||
#endif // NO_DEFAULT_DISK_CONNECT
|
||||
|
||||
#ifndef NO_DEFAULT_FILE_ENUMER /* 在应用程序中定义NO_DEFAULT_FILE_ENUMER可以禁止默认的文件名枚举回调程序,然后用自行编写的程序代替它 */
|
||||
void xFileNameEnumer( void ) /* 文件名枚举回调子程序 */
|
||||
#ifndef NO_DEFAULT_FILE_ENUMER /* 在应用程序中定义NO_DEFAULT_FILE_ENUMER可以禁止默认的文件名枚举回调程序,然后用自行编写的程序代替它 */
|
||||
void xFileNameEnumer( void ) /* 文件名枚举回调子程序 */
|
||||
{
|
||||
/* 如果指定枚举序号CHRV3vFileSize为0xFFFFFFFF后调用FileOpen,那么每搜索到一个文件FileOpen都会调用本回调程序,
|
||||
回调程序xFileNameEnumer返回后,FileOpen递减CHRV3vFileSize并继续枚举直到搜索不到文件或者目录。建议做法是,
|
||||
在调用FileOpen之前定义一个全局变量为0,当FileOpen回调本程序后,本程序由CHRV3vFdtOffset得到结构FAT_DIR_INFO,
|
||||
分析结构中的DIR_Attr以及DIR_Name判断是否为所需文件名或者目录名,记录相关信息,并将全局变量计数增量,
|
||||
当FileOpen返回后,判断返回值如果是ERR_MISS_FILE或ERR_FOUND_NAME都视为操作成功,全局变量为搜索到的有效文件数。
|
||||
如果在本回调程序xFileNameEnumer中将CHRV3vFileSize置为1,那么可以通知FileOpen提前结束搜索。以下是回调程序例子 */
|
||||
/* 如果指定枚举序号CHRV3vFileSize为0xFFFFFFFF后调用FileOpen,那么每搜索到一个文件FileOpen都会调用本回调程序,
|
||||
回调程序xFileNameEnumer返回后,FileOpen递减CHRV3vFileSize并继续枚举直到搜索不到文件或者目录。建议做法是,
|
||||
在调用FileOpen之前定义一个全局变量为0,当FileOpen回调本程序后,本程序由CHRV3vFileSize得到结构FAT_DIR_INFO,
|
||||
分析结构中的DIR_Attr以及DIR_Name判断是否为所需文件名或者目录名,记录相关信息,并将全局变量计数增量,
|
||||
当FileOpen返回后,判断返回值如果是ERR_MISS_FILE或ERR_FOUND_NAME都视为操作成功,全局变量为搜索到的有效文件数。
|
||||
如果在本回调程序xFileNameEnumer中将CHRV3vFileSize置为1,那么可以通知FileOpen提前结束搜索。以下是回调程序例子 */
|
||||
#if 0
|
||||
uint8_t i;
|
||||
uint16_t FileCount;
|
||||
PX_FAT_DIR_INFO pFileDir;
|
||||
uint8_t *NameBuf;
|
||||
pFileDir = (PX_FAT_DIR_INFO)( pDISK_BASE_BUF + CHRV3vFdtOffset ); /* 当前FDT的起始地址 */
|
||||
FileCount = (UINT16)( 0xFFFFFFFF - CHRV3vFileSize ); /* 当前文件名的枚举序号,CHRV3vFileSize初值是0xFFFFFFFF,找到文件名后递减 */
|
||||
if ( FileCount < sizeof( FILE_DATA_BUF ) / 12 ) { /* 检查缓冲区是否足够存放,假定每个文件名需占用12个字节存放 */
|
||||
NameBuf = & FILE_DATA_BUF[ FileCount * 12 ]; /* 计算保存当前文件名的缓冲区地址 */
|
||||
for ( i = 0; i < 11; i ++ ) NameBuf[ i ] = pFileDir -> DIR_Name[ i ]; /* 复制文件名,长度为11个字符,未处理空格 */
|
||||
// if ( pFileDir -> DIR_Attr & ATTR_DIRECTORY ) NameBuf[ i ] = 1; /* 判断是目录名 */
|
||||
NameBuf[ i ] = 0; /* 文件名结束符 */
|
||||
pFileDir = (PX_FAT_DIR_INFO)( pDISK_BASE_BUF + CHRV3vFdtOffset ); /* 当前FDT的起始地址 */
|
||||
FileCount = (UINT16)( 0xFFFFFFFF - CHRV3vFileSize ); /* 当前文件名的枚举序号,CH103vFileSize初值是0xFFFFFFFF,找到文件名后递减 */
|
||||
if ( FileCount < sizeof( FILE_DATA_BUF ) / 12 ) { /* 检查缓冲区是否足够存放,假定每个文件名需占用12个字节存放 */
|
||||
NameBuf = & FILE_DATA_BUF[ FileCount * 12 ]; /* 计算保存当前文件名的缓冲区地址 */
|
||||
for ( i = 0; i < 11; i ++ ) NameBuf[ i ] = pFileDir -> DIR_Name[ i ]; /* 复制文件名,长度为11个字符,未处理空格 */
|
||||
// if ( pFileDir -> DIR_Attr & ATTR_DIRECTORY ) NameBuf[ i ] = 1; /* 判断是目录名 */
|
||||
NameBuf[ i ] = 0; /* 文件名结束符 */
|
||||
}
|
||||
#endif
|
||||
}
|
||||
#endif // NO_DEFAULT_FILE_ENUMER
|
||||
|
||||
uint8_t CHRV3LibInit( void ) /* 初始化CHRV3程序库,操作成功返回0 */
|
||||
uint8_t CHRV3LibInit( void ) /* 初始化CH103程序库,操作成功返回0 */
|
||||
{
|
||||
uint8_t s;
|
||||
s = CHRV3GetVer( );
|
||||
if( s < CHRV3_LIB_VER )
|
||||
{
|
||||
return( 0xFF ); /* 获取当前子程序库的版本号,版本太低则返回错误 */
|
||||
return( 0xFF ); /* 获取当前子程序库的版本号,版本太低则返回错误 */
|
||||
}
|
||||
printf( "lib vision:%02x\r\n",s );
|
||||
#if DISK_BASE_BUF_LEN > 0
|
||||
pDISK_BASE_BUF = & DISK_BASE_BUF[0]; /* 指向外部RAM的磁盘数据缓冲区 */
|
||||
pDISK_FAT_BUF = & DISK_BASE_BUF[0]; /* 指向外部RAM的磁盘FAT数据缓冲区,可以与pDISK_BASE_BUF合用以节约RAM */
|
||||
// pDISK_FAT_BUF = & DISK_FAT_BUF[0]; /* 指向外部RAM的磁盘FAT数据缓冲区,独立于pDISK_BASE_BUF以提高速度 */
|
||||
/* 如果希望提高文件存取速度,那么可以在主程序中调用CHRV3LibInit之后,将pDISK_FAT_BUF重新指向另一个独立分配的与pDISK_BASE_BUF同样大小的缓冲区 */
|
||||
pDISK_BASE_BUF = & DISK_BASE_BUF[0]; /* 指向外部RAM的磁盘数据缓冲区 */
|
||||
pDISK_FAT_BUF = & DISK_BASE_BUF[0]; /* 指向外部RAM的磁盘FAT数据缓冲区,可以与pDISK_BASE_BUF合用以节约RAM */
|
||||
// pDISK_FAT_BUF = & DISK_FAT_BUF[0]; /* 指向外部RAM的磁盘FAT数据缓冲区,独立于pDISK_BASE_BUF以提高速度 */
|
||||
/* 如果希望提高文件存取速度,那么可以在主程序中调用CH103LibInit之后,将pDISK_FAT_BUF重新指向另一个独立分配的与pDISK_BASE_BUF同样大小的缓冲区 */
|
||||
#endif
|
||||
CHRV3DiskStatus = DISK_UNKNOWN; /* 未知状态 */
|
||||
CHRV3vSectorSizeB = 9; /* 默认的物理磁盘的扇区是512B */
|
||||
CHRV3vSectorSize = 512; /* 默认的物理磁盘的扇区是512B,该值是磁盘的扇区大小 */
|
||||
CHRV3vStartLba = 0; /* 默认为自动分析FDD和HDD */
|
||||
CHRV3DiskStatus = DISK_UNKNOWN; /* 未知状态 */
|
||||
CHRV3vSectorSizeB = 9; /* 默认的物理磁盘的扇区是512B */
|
||||
CHRV3vSectorSize = 512; // 默认的物理磁盘的扇区是512B,该值是磁盘的扇区大小
|
||||
CHRV3vStartLba = 0; /* 默认为自动分析FDD和HDD */
|
||||
#if DEF_USB_PORT_FS_EN
|
||||
CHRV3vPacketSize = 64; /* USB存储类设备的最大包长度:64@FS,512@HS/SS,由应用程序初始化,枚举U盘后如果是高速或者超速那么及时更新为512 */
|
||||
pTX_DMA_A_REG = (uint32_t *)&(USBOTG_H_FS->HOST_TX_DMA); /* 指向发送DMA地址寄存器,由应用程序初始化 */
|
||||
pRX_DMA_A_REG = (uint32_t *)&(USBOTG_H_FS->HOST_RX_DMA); /* 指向接收DMA地址寄存器,由应用程序初始化 */
|
||||
pTX_LEN_REG = (uint16_t *)&(USBOTG_H_FS->HOST_TX_LEN); /* 指向发送长度寄存器,由应用程序初始化 */
|
||||
pRX_LEN_REG = (uint16_t *)&(USBOTG_H_FS->RX_LEN); /* 指向接收长度寄存器,由应用程序初始化 */
|
||||
CHRV3vPacketSize = 64; /* USB存储类设备的最大包长度:64@FS,512@HS/SS,由应用程序初始化,枚举U盘后如果是高速或者超速那么及时更新为512 */
|
||||
pTX_DMA_A_REG = (uint32_t *)&(USBFSH->HOST_TX_DMA); /* 指向发送DMA地址寄存器,由应用程序初始化 */
|
||||
pRX_DMA_A_REG = (uint32_t *)&(USBFSH->HOST_RX_DMA); /* 指向接收DMA地址寄存器,由应用程序初始化 */
|
||||
pTX_LEN_REG = (uint16_t *)&(USBFSH->HOST_TX_LEN); /* 指向发送长度寄存器,由应用程序初始化 */
|
||||
pRX_LEN_REG = (uint16_t *)&(USBFSH->RX_LEN); /* 指向接收长度寄存器,由应用程序初始化 */
|
||||
#elif DEF_USB_PORT_HS_EN
|
||||
CHRV3vPacketSize = 512; /* USB存储类设备的最大包长度:64@FS,512@HS/SS,由应用程序初始化,枚举U盘后如果是高速或者超速那么及时更新为512 */
|
||||
pTX_DMA_A_REG = (uint32_t *)&(USBHSH->HOST_TX_DMA); /* 指向发送DMA地址寄存器,由应用程序初始化 */
|
||||
pRX_DMA_A_REG = (uint32_t *)&(USBHSH->HOST_RX_DMA); /* 指向接收DMA地址寄存器,由应用程序初始化 */
|
||||
pTX_LEN_REG = (uint16_t *)&(USBHSH->HOST_TX_LEN); /* 指向发送长度寄存器,由应用程序初始化 */
|
||||
pRX_LEN_REG = (uint16_t *)&(USBHSH->RX_LEN); /* 指向接收长度寄存器,由应用程序初始化 */
|
||||
CHRV3vPacketSize = 512; /* USB存储类设备的最大包长度:64@FS,512@HS/SS,由应用程序初始化,枚举U盘后如果是高速或者超速那么及时更新为512 */
|
||||
pTX_DMA_A_REG = (uint32_t *)&(USBHSH->HOST_TX_DMA); /* 指向发送DMA地址寄存器,由应用程序初始化 */
|
||||
pRX_DMA_A_REG = (uint32_t *)&(USBHSH->HOST_RX_DMA); /* 指向接收DMA地址寄存器,由应用程序初始化 */
|
||||
pTX_LEN_REG = (uint16_t *)&(USBHSH->HOST_TX_LEN); /* 指向发送长度寄存器,由应用程序初始化 */
|
||||
pRX_LEN_REG = (uint16_t *)&(USBHSH->RX_LEN); /* 指向接收长度寄存器,由应用程序初始化 */
|
||||
#endif
|
||||
|
||||
return( ERR_SUCCESS );
|
||||
|
||||
Reference in New Issue
Block a user