bstanwell/ch32v20x-examples
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This commit is contained in:
qiyongshuang
2024-02-26 13:22:09 +08:00
parent 0ad592325e
commit 9596a13c17
573 changed files with 36301 additions and 23003 deletions
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EVT/EXAM/USB/USBFS/DEVICE/CompatibilityHID/User/ch32v20x_it.c
+3
View File
@@ -23,6 +23,9 @@ void HardFault_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
*/
void NMI_Handler(void)
{
while (1)
{
}
}
/*********************************************************************
EVT/EXAM/USB/USBFS/DEVICE/CompatibilityHID/User/ch32v20x_usbfs_device.c
+61 -64
View File
@@ -3,7 +3,7 @@
* Author : WCH
* Version : V1.0.0
* Date : 2021/06/06
* Description : This file provides all the USBOTG firmware functions.
* Description : This file provides all the USBFS firmware functions.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
@@ -49,7 +49,7 @@ __attribute__ ((aligned(4))) uint8_t Data_Buffer[DEF_RING_BUFFER_SIZE];
/******************************************************************************/
/* Function declarations */
void USBHD_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void USBFS_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
/*********************************************************************
* @fn USBFS_RCC_Init
@@ -72,7 +72,7 @@ void USBFS_RCC_Init( void )
{
RCC_USBCLKConfig( RCC_USBCLKSource_PLLCLK_Div1 );
}
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_OTG_FS, ENABLE );
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_USBFS, ENABLE );
}
@@ -85,17 +85,17 @@ void USBFS_RCC_Init( void )
*/
void USBFS_Device_Endp_Init( void )
{
USBOTG_FS->UEP4_1_MOD = USBFS_UEP1_RX_EN;
USBOTG_FS->UEP2_3_MOD = USBFS_UEP2_TX_EN;
USBFSD->UEP4_1_MOD = USBFS_UEP1_RX_EN;
USBFSD->UEP2_3_MOD = USBFS_UEP2_TX_EN;
USBOTG_FS->UEP0_DMA = (uint32_t)USBFS_EP0_Buf;
USBOTG_FS->UEP1_DMA = (uint32_t)Data_Buffer;
USBOTG_FS->UEP2_DMA = (uint32_t)USBFS_EP2_Buf;
USBFSD->UEP0_DMA = (uint32_t)USBFS_EP0_Buf;
USBFSD->UEP1_DMA = (uint32_t)Data_Buffer;
USBFSD->UEP2_DMA = (uint32_t)USBFS_EP2_Buf;
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBOTG_FS->UEP1_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBOTG_FS->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBFSD->UEP1_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBFSD->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
/* Clear End-points Busy Status */
for(uint8_t i=0; i<DEF_UEP_NUM; i++ )
{
@@ -114,27 +114,27 @@ void USBFS_Device_Init( FunctionalState sta )
{
if( sta )
{
USBOTG_H_FS->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
USBFSH->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
Delay_Us( 10 );
USBFS_Device_Endp_Init( );
USBOTG_FS->INT_EN = USBFS_UIE_SUSPEND | USBFS_UIE_BUS_RST | USBFS_UIE_TRANSFER;
USBOTG_FS->BASE_CTRL = USBFS_UC_DEV_PU_EN | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
USBOTG_FS->UDEV_CTRL = USBFS_UD_PD_DIS | USBFS_UD_PORT_EN;
NVIC_EnableIRQ( USBHD_IRQn );
USBFSD->INT_EN = USBFS_UIE_SUSPEND | USBFS_UIE_BUS_RST | USBFS_UIE_TRANSFER;
USBFSD->BASE_CTRL = USBFS_UC_DEV_PU_EN | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
USBFSD->UDEV_CTRL = USBFS_UD_PD_DIS | USBFS_UD_PORT_EN;
NVIC_EnableIRQ( USBFS_IRQn );
}
else
{
USBOTG_H_FS->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
USBFSH->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
Delay_Us( 10 );
USBOTG_FS->BASE_CTRL = 0x00;
NVIC_DisableIRQ( USBHD_IRQn );
USBFSD->BASE_CTRL = 0x00;
NVIC_DisableIRQ( USBFS_IRQn );
}
}
/*********************************************************************
* @fn USBFS_Endp_DataUp
*
* @brief usbhd-fs device data upload
* @brief usbfs device data upload
* input: endp - end-point numbers
* *pubf - data buffer
* len - load data length
@@ -264,19 +264,19 @@ uint8_t USBFS_Endp_DataUp(uint8_t endp, uint8_t *pbuf, uint16_t len, uint8_t mod
/*********************************************************************
* @fn USBHD_IRQHandler
* @fn USBFS_IRQHandler
*
* @brief This function handles HD-FS exception.
*
* @return none
*/
void USBHD_IRQHandler( void )
void USBFS_IRQHandler( void )
{
uint8_t intflag, intst, errflag;
uint16_t len;
intflag = USBOTG_FS->INT_FG;
intst = USBOTG_FS->INT_ST;
intflag = USBFSD->INT_FG;
intst = USBFSD->INT_ST;
if( intflag & USBFS_UIF_TRANSFER )
{
@@ -290,7 +290,7 @@ void USBHD_IRQHandler( void )
case USBFS_UIS_TOKEN_IN | DEF_UEP0:
if( USBFS_SetupReqLen == 0 )
{
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_ACK;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_ACK;
}
if ( ( USBFS_SetupReqType & USB_REQ_TYP_MASK ) != USB_REQ_TYP_STANDARD )
@@ -306,12 +306,12 @@ void USBHD_IRQHandler( void )
memcpy( USBFS_EP0_Buf, pUSBFS_Descr, len );
USBFS_SetupReqLen -= len;
pUSBFS_Descr += len;
USBOTG_FS->UEP0_TX_LEN = len;
USBOTG_FS->UEP0_TX_CTRL ^= USBFS_UEP_T_TOG;
USBFSD->UEP0_TX_LEN = len;
USBFSD->UEP0_TX_CTRL ^= USBFS_UEP_T_TOG;
break;
case USB_SET_ADDRESS:
USBOTG_FS->DEV_ADDR = (USBOTG_FS->DEV_ADDR & USBFS_UDA_GP_BIT) | USBFS_DevAddr;
USBFSD->DEV_ADDR = (USBFSD->DEV_ADDR & USBFS_UDA_GP_BIT) | USBFS_DevAddr;
break;
default:
@@ -325,8 +325,8 @@ void USBHD_IRQHandler( void )
/* end-point 2 data in interrupt */
case USBFS_UIS_TOKEN_IN | DEF_UEP2:
USBOTG_FS->UEP2_TX_CTRL = (USBOTG_FS->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
USBOTG_FS->UEP2_TX_CTRL ^= USBFS_UEP_T_TOG;
USBFSD->UEP2_TX_CTRL = (USBFSD->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
USBFSD->UEP2_TX_CTRL ^= USBFS_UEP_T_TOG;
USBFS_Endp_Busy[ DEF_UEP2 ] = 0;
break;
@@ -353,7 +353,7 @@ void USBHD_IRQHandler( void )
case HID_SET_REPORT:
memcpy(&HID_Report_Buffer[0],USBFS_EP0_Buf,DEF_USBD_UEP0_SIZE);
HID_Set_Report_Flag = SET_REPORT_WAIT_DEAL;
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_NAK;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_NAK;
break;
default:
break;
@@ -374,18 +374,18 @@ void USBHD_IRQHandler( void )
if ( intst & USBFS_UIS_TOG_OK )
{
/* Write In Buffer */
USBOTG_FS->UEP1_RX_CTRL ^= USBFS_UEP_R_TOG;
RingBuffer_Comm.PackLen[RingBuffer_Comm.LoadPtr] = USBOTG_FS->RX_LEN;
USBFSD->UEP1_RX_CTRL ^= USBFS_UEP_R_TOG;
RingBuffer_Comm.PackLen[RingBuffer_Comm.LoadPtr] = USBFSD->RX_LEN;
RingBuffer_Comm.LoadPtr ++;
if(RingBuffer_Comm.LoadPtr == DEF_Ring_Buffer_Max_Blks)
{
RingBuffer_Comm.LoadPtr = 0;
}
USBOTG_FS->UEP1_DMA = (uint32_t)(&Data_Buffer[(RingBuffer_Comm.LoadPtr) * DEF_USBD_FS_PACK_SIZE]);
USBFSD->UEP1_DMA = (uint32_t)(&Data_Buffer[(RingBuffer_Comm.LoadPtr) * DEF_USBD_FS_PACK_SIZE]);
RingBuffer_Comm.RemainPack ++;
if(RingBuffer_Comm.RemainPack >= DEF_Ring_Buffer_Max_Blks-DEF_RING_BUFFER_REMINE)
{
USBOTG_FS->UEP1_RX_CTRL = (USBOTG_FS->UEP1_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_NAK;
USBFSD->UEP1_RX_CTRL = (USBFSD->UEP1_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_NAK;
RingBuffer_Comm.StopFlag = 1;
}
}
@@ -398,8 +398,8 @@ void USBHD_IRQHandler( void )
/* Setup stage processing */
case USBFS_UIS_TOKEN_SETUP:
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_NAK;
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_NAK;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_NAK;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_NAK;
/* Store All Setup Values */
USBFS_SetupReqType = pUSBFS_SetupReqPak->bRequestType;
USBFS_SetupReqCode = pUSBFS_SetupReqPak->bRequest;
@@ -612,12 +612,12 @@ void USBHD_IRQHandler( void )
{
case ( DEF_UEP_OUT | DEF_UEP1 ):
/* Set End-point 1 OUT ACK */
USBOTG_FS->UEP1_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBFSD->UEP1_RX_CTRL = USBFS_UEP_R_RES_ACK;
break;
case ( DEF_UEP_IN | DEF_UEP2 ):
/* Set End-point 2 IN NAK */
USBOTG_FS->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBFSD->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
break;
default:
@@ -667,10 +667,10 @@ void USBHD_IRQHandler( void )
switch( (uint8_t)(USBFS_SetupReqIndex&0xFF) )
{
case ( DEF_UEP_OUT | DEF_UEP1 ):
USBOTG_FS->UEP1_RX_CTRL = ( USBOTG_FS->UEP1_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
USBFSD->UEP1_RX_CTRL = ( USBFSD->UEP1_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
break;
case ( DEF_UEP_IN | DEF_UEP2 ):
USBOTG_FS->UEP2_TX_CTRL = ( USBOTG_FS->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
USBFSD->UEP2_TX_CTRL = ( USBFSD->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
break;
default:
@@ -717,14 +717,14 @@ void USBHD_IRQHandler( void )
{
if((uint8_t)(USBFS_SetupReqIndex&0xFF) == ( DEF_UEP_OUT |DEF_UEP1 ))
{
if( ( USBOTG_FS->UEP1_RX_CTRL & USBFS_UEP_R_RES_MASK ) == USBFS_UEP_R_RES_STALL )
if( ( USBFSD->UEP1_RX_CTRL & USBFS_UEP_R_RES_MASK ) == USBFS_UEP_R_RES_STALL )
{
USBFS_EP0_Buf[ 0 ] = 0x01;
}
}
else if((uint8_t)(USBFS_SetupReqIndex&0xFF) == ( DEF_UEP_IN | DEF_UEP2 ))
{
if( ( USBOTG_FS->UEP2_TX_CTRL & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
if( ( USBFSD->UEP2_TX_CTRL & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
{
USBFS_EP0_Buf[ 0 ] = 0x01;
}
@@ -756,8 +756,8 @@ void USBHD_IRQHandler( void )
if( errflag == 0xFF)
{
/* if one request not support, return stall */
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_STALL;
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_STALL;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_STALL;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_STALL;
}
else
{
@@ -766,32 +766,28 @@ void USBHD_IRQHandler( void )
{
len = ( USBFS_SetupReqLen > DEF_USBD_UEP0_SIZE )? DEF_USBD_UEP0_SIZE : USBFS_SetupReqLen;
USBFS_SetupReqLen -= len;
USBOTG_FS->UEP0_TX_LEN = len;
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
USBFSD->UEP0_TX_LEN = len;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
}
else
{
if( USBFS_SetupReqLen == 0 )
{
USBOTG_FS->UEP0_TX_LEN = 0;
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
USBFSD->UEP0_TX_LEN = 0;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
}
else
{
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_ACK;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_ACK;
}
}
}
break;
/* Sof pack processing */
case USBFS_UIS_TOKEN_SOF:
break;
default :
break;
}
USBOTG_FS->INT_FG = USBFS_UIF_TRANSFER;
USBFSD->INT_FG = USBFS_UIF_TRANSFER;
}
else if( intflag & USBFS_UIF_BUS_RST )
{
@@ -801,15 +797,16 @@ void USBHD_IRQHandler( void )
USBFS_DevSleepStatus = 0;
USBFS_DevEnumStatus = 0;
USBOTG_FS->DEV_ADDR = 0;
USBFSD->DEV_ADDR = 0;
USBFS_Device_Endp_Init( );
USBOTG_FS->INT_FG = USBFS_UIF_BUS_RST;
USBFSD->INT_FG = USBFS_UIF_BUS_RST;
}
else if( intflag & USBFS_UIF_SUSPEND )
{
USBOTG_FS->INT_FG = USBFS_UIF_SUSPEND;
USBFSD->INT_FG = USBFS_UIF_SUSPEND;
Delay_Us(10);
/* usb suspend interrupt processing */
if( USBOTG_FS->MIS_ST & USBFS_UMS_SUSPEND )
if( USBFSD->MIS_ST & USBFS_UMS_SUSPEND )
{
USBFS_DevSleepStatus |= 0x02;
if( USBFS_DevSleepStatus == 0x03 )
@@ -826,21 +823,21 @@ void USBHD_IRQHandler( void )
else
{
/* other interrupts */
USBOTG_FS->INT_FG = intflag;
USBFSD->INT_FG = intflag;
}
}
/*********************************************************************
* @fn USBFS_Send_Resume
*
* @brief USBHD device sends wake-up signal to host
* @brief USBFS device sends wake-up signal to host
*
* @return none
*/
void USBFS_Send_Resume( void )
{
USBOTG_FS->UDEV_CTRL ^= USBFS_UD_LOW_SPEED;
USBFSD->UDEV_CTRL ^= USBFS_UD_LOW_SPEED;
Delay_Ms( 5 );
USBOTG_FS->UDEV_CTRL ^= USBFS_UD_LOW_SPEED;
USBFSD->UDEV_CTRL ^= USBFS_UD_LOW_SPEED;
Delay_Ms( 1 );
}
EVT/EXAM/USB/USBFS/DEVICE/CompatibilityHID/User/ch32v20x_usbfs_device.h
+2 -2
View File
@@ -9,8 +9,8 @@
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH32V20X_USBOTG_DEVICE_H_
#define __CH32V20X_USBOTG_DEVICE_H_
#ifndef __CH32V20X_USBFS_DEVICE_H_
#define __CH32V20X_USBFS_DEVICE_H_
#ifdef __cplusplus
extern "C" {
#endif
EVT/EXAM/USB/USBFS/DEVICE/CompatibilityHID/User/main.c
+2 -2
View File
@@ -64,7 +64,7 @@ int main(void)
Delay_Init();
USART_Printf_Init( 115200 );
printf("SystemClk:%d\r\n",SystemCoreClock);
printf("USBHD Compatibility HID Example\r\n");
printf("USBFS Compatibility HID Example\r\n");
Delay_Ms(10);
/* Variables init */
@@ -77,7 +77,7 @@ int main(void)
/* Usb Init */
USBFS_RCC_Init();
USBFS_Device_Init(ENABLE);
NVIC_EnableIRQ(USBHD_IRQn);
NVIC_EnableIRQ(USBFS_IRQn);
/* Timer init */
TIM2_Init();
EVT/EXAM/USB/USBFS/DEVICE/CompatibilityHID/User/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
EVT/EXAM/USB/USBFS/DEVICE/CompatibilityHID/User/usbd_compatibility_hid.c
+13 -13
View File
@@ -1,8 +1,8 @@
/********************************** (C) COPYRIGHT *******************************
* File Name :usbd_compatibility_hid.c
* Author :OWNER
* File Name : usbd_compatibility_hid.c
* Author : WCH
* Version : v0.01
* Date : 2022年7月8日
* Date : 2024/02/05
* Description:
*******************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
@@ -229,12 +229,12 @@ void UART2_Rx_Service( void )
/* Upload packet via USB. */
if (pkg_len)
{
USBOTG_FS->UEP2_DMA = (uint16_t)(uint32_t)USBFS_EP2_Buf;
USBFSD->UEP2_DMA = (uint16_t)(uint32_t)USBFS_EP2_Buf;
USBFS_EP2_Buf[0] = pkg_len;
memcpy(USBFS_EP2_Buf + 1,&UART2_RxBuffer[UART2_Rx_Deal_Ptr],pkg_len);
USBOTG_FS->UEP2_TX_LEN = pkg_len + 1;
USBFSD->UEP2_TX_LEN = pkg_len + 1;
USBFS_Endp_Busy[DEF_UEP2] = 1;
USBOTG_FS->UEP2_TX_CTRL = (USBOTG_FS->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_ACK; // Start Upload
USBFSD->UEP2_TX_CTRL = (USBFSD->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_ACK; // Start Upload
UART2_Rx_RemainLen -= pkg_len;
UART2_Rx_Deal_Ptr += pkg_len;
@@ -268,14 +268,14 @@ void UART2_Tx_Service( void )
USART_ClearFlag(USART2, USART_FLAG_TC);
USART_DMACmd(USART2, USART_DMAReq_Tx, DISABLE);
UART2_Tx_Flag = 0;
NVIC_DisableIRQ(USBHD_IRQn); // Disable USB interrupts
NVIC_DisableIRQ(USBFS_IRQn); // Disable USB interrupts
RingBuffer_Comm.RemainPack--;
RingBuffer_Comm.DealPtr++;
if(RingBuffer_Comm.DealPtr == DEF_Ring_Buffer_Max_Blks)
{
RingBuffer_Comm.DealPtr = 0;
}
NVIC_EnableIRQ(USBHD_IRQn); // Enable USB interrupts
NVIC_EnableIRQ(USBFS_IRQn); // Enable USB interrupts
}
}
else
@@ -297,14 +297,14 @@ void UART2_Tx_Service( void )
else
{
/* drop out */
NVIC_DisableIRQ(USBHD_IRQn); // Disable USB interrupts
NVIC_DisableIRQ(USBFS_IRQn); // Disable USB interrupts
RingBuffer_Comm.RemainPack--;
RingBuffer_Comm.DealPtr++;
if(RingBuffer_Comm.DealPtr == DEF_Ring_Buffer_Max_Blks)
{
RingBuffer_Comm.DealPtr = 0;
}
NVIC_EnableIRQ(USBHD_IRQn); // Enable USB interrupts
NVIC_EnableIRQ(USBFS_IRQn); // Enable USB interrupts
}
}
}
@@ -316,7 +316,7 @@ void UART2_Tx_Service( void )
{
printf("USB ring buffer full, stop receiving further data.\r\n");
RingBuffer_Comm.StopFlag = 0;
USBOTG_FS->UEP1_RX_CTRL = (USBOTG_FS->UEP1_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_ACK;
USBFSD->UEP1_RX_CTRL = (USBFSD->UEP1_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_ACK;
}
}
@@ -341,8 +341,8 @@ void HID_Set_Report_Deal()
}
printf("\r\n");
HID_Set_Report_Flag = SET_REPORT_DEAL_OVER;
USBOTG_FS->UEP0_TX_LEN = 0;
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_RES_ACK | USBFS_UEP_T_TOG;
USBFSD->UEP0_TX_LEN = 0;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_RES_ACK | USBFS_UEP_T_TOG;
}
}