bstanwell/ch32v20x-examples
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This commit is contained in:
qiyongshuang
2024-02-26 13:22:09 +08:00
parent 0ad592325e
commit 9596a13c17
573 changed files with 36301 additions and 23003 deletions
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EVT/EXAM/USB/USBFS/DEVICE/MSC_CD-ROM/User/SW_CDROM.c
+2 -2
View File
@@ -312,13 +312,13 @@ void CDROM_CMD_Deal_Fail( void )
if( CDROM_Transfer_Status & DEF_CDROM_BLUCK_UP_FLAG )
{
/* EP2 -> STALL */
USBOTG_FS->UEP2_TX_CTRL = ( USBOTG_FS->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
USBFSD->UEP2_TX_CTRL = ( USBFSD->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
CDROM_Transfer_Status &= ~DEF_CDROM_BLUCK_UP_FLAG;
}
if( CDROM_Transfer_Status & DEF_CDROM_BLUCK_DOWN_FLAG )
{
/* EP3 -> STALL */
USBOTG_FS->UEP3_RX_CTRL = ( USBOTG_FS->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
USBFSD->UEP3_RX_CTRL = ( USBFSD->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
CDROM_Transfer_Status &= ~DEF_CDROM_BLUCK_DOWN_FLAG;
}
}
EVT/EXAM/USB/USBFS/DEVICE/MSC_CD-ROM/User/ch32v20x_it.c
+3
View File
@@ -23,6 +23,9 @@ void HardFault_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
*/
void NMI_Handler(void)
{
while (1)
{
}
}
/*********************************************************************
EVT/EXAM/USB/USBFS/DEVICE/MSC_CD-ROM/User/ch32v20x_usbfs_device.c
+63 -66
View File
@@ -3,7 +3,7 @@
* Author : WCH
* Version : V1.0.0
* Date : 2022/08/20
* Description : This file provides all the USBOTG firmware functions.
* Description : This file provides all the USBFS firmware functions.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
@@ -40,12 +40,12 @@ volatile uint8_t USBFS_Endp_Busy[ DEF_UEP_NUM ];
/******************************************************************************/
/* Interrupt Service Routine Declaration*/
void USBHD_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void USBFS_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
/*********************************************************************
* @fn USBFS_RCC_Init
*
* @brief Initializes the usbotg clock configuration.
* @brief Initializes the usbfs clock configuration.
*
* @return none
*/
@@ -63,7 +63,7 @@ void USBFS_RCC_Init( void )
{
RCC_USBCLKConfig( RCC_USBCLKSource_PLLCLK_Div1 );
}
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_OTG_FS, ENABLE );
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_USBFS, ENABLE );
}
/*********************************************************************
@@ -76,19 +76,19 @@ void USBFS_RCC_Init( void )
void USBFS_Device_Endp_Init( void )
{
USBOTG_FS->UEP2_3_MOD = USBFS_UEP2_TX_EN|USBFS_UEP3_RX_EN;
USBFSD->UEP2_3_MOD = USBFS_UEP2_TX_EN|USBFS_UEP3_RX_EN;
USBOTG_FS->UEP0_DMA = (uint32_t)USBFS_EP0_Buf;
USBOTG_FS->UEP2_DMA = (uint32_t)CDROM_In_Buf;
USBOTG_FS->UEP3_DMA = (uint32_t)CDROM_Out_Buf;
USBFSD->UEP0_DMA = (uint32_t)USBFS_EP0_Buf;
USBFSD->UEP2_DMA = (uint32_t)CDROM_In_Buf;
USBFSD->UEP3_DMA = (uint32_t)CDROM_Out_Buf;
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBOTG_FS->UEP3_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBFSD->UEP3_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBOTG_FS->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBFSD->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBOTG_FS->UEP2_TX_LEN = 0;
USBFSD->UEP2_TX_LEN = 0;
/* Clear End-points Busy Status */
for(uint8_t i=0; i<DEF_UEP_NUM; i++ )
@@ -108,21 +108,21 @@ void USBFS_Device_Init( FunctionalState sta )
{
if( sta )
{
USBOTG_H_FS->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
USBFSH->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
Delay_Us( 10 );
USBOTG_H_FS->BASE_CTRL = 0x00;
USBOTG_FS->INT_EN = USBFS_UIE_SUSPEND | USBFS_UIE_BUS_RST | USBFS_UIE_TRANSFER;
USBOTG_FS->BASE_CTRL = USBFS_UC_DEV_PU_EN | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
USBFSH->BASE_CTRL = 0x00;
USBFSD->INT_EN = USBFS_UIE_SUSPEND | USBFS_UIE_BUS_RST | USBFS_UIE_TRANSFER;
USBFSD->BASE_CTRL = USBFS_UC_DEV_PU_EN | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
USBFS_Device_Endp_Init( );
USBOTG_FS->UDEV_CTRL = USBFS_UD_PD_DIS | USBFS_UD_PORT_EN;
NVIC_EnableIRQ( USBHD_IRQn );
USBFSD->UDEV_CTRL = USBFS_UD_PD_DIS | USBFS_UD_PORT_EN;
NVIC_EnableIRQ( USBFS_IRQn );
}
else
{
USBOTG_H_FS->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
USBFSH->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
Delay_Us( 10 );
USBOTG_FS->BASE_CTRL = 0x00;
NVIC_DisableIRQ( USBHD_IRQn );
USBFSD->BASE_CTRL = 0x00;
NVIC_DisableIRQ( USBFS_IRQn );
}
}
@@ -226,19 +226,19 @@ uint8_t USBFS_Endp_DataUp(uint8_t endp, uint8_t *pbuf, uint16_t len, uint8_t mod
/*********************************************************************
* @fn USBHD_IRQHandler
* @fn USBFS_IRQHandler
*
* @brief This function handles HD-FS exception.
*
* @return none
*/
void USBHD_IRQHandler( void )
void USBFS_IRQHandler( void )
{
uint8_t intflag, intst, errflag;
uint16_t len;
intflag = USBOTG_FS->INT_FG;
intst = USBOTG_FS->INT_ST;
intflag = USBFSD->INT_FG;
intst = USBFSD->INT_ST;
if( intflag & USBFS_UIF_TRANSFER )
{
@@ -252,7 +252,7 @@ void USBHD_IRQHandler( void )
case USBFS_UIS_TOKEN_IN | DEF_UEP0:
if( USBFS_SetupReqLen == 0 )
{
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_ACK;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_ACK;
}
if ( ( USBFS_SetupReqType & USB_REQ_TYP_MASK ) != USB_REQ_TYP_STANDARD )
{
@@ -268,12 +268,12 @@ void USBHD_IRQHandler( void )
memcpy( USBFS_EP0_Buf, pUSBFS_Descr, len );
USBFS_SetupReqLen -= len;
pUSBFS_Descr += len;
USBOTG_FS->UEP0_TX_LEN = len;
USBOTG_FS->UEP0_TX_CTRL ^= USBFS_UEP_T_TOG;
USBFSD->UEP0_TX_LEN = len;
USBFSD->UEP0_TX_CTRL ^= USBFS_UEP_T_TOG;
break;
case USB_SET_ADDRESS:
USBOTG_FS->DEV_ADDR = (USBOTG_FS->DEV_ADDR & USBFS_UDA_GP_BIT) | USBFS_DevAddr;
USBFSD->DEV_ADDR = (USBFSD->DEV_ADDR & USBFS_UDA_GP_BIT) | USBFS_DevAddr;
break;
default:
@@ -284,8 +284,8 @@ void USBHD_IRQHandler( void )
/* end-point 2 data in interrupt */
case ( USBFS_UIS_TOKEN_IN | DEF_UEP2 ):
USBOTG_FS->UEP2_TX_CTRL ^= USBFS_UEP_T_TOG;
USBOTG_FS->UEP2_TX_CTRL = (USBOTG_FS->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
USBFSD->UEP2_TX_CTRL ^= USBFS_UEP_T_TOG;
USBFSD->UEP2_TX_CTRL = (USBFSD->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK;
USBFS_Endp_Busy[ DEF_UEP2 ] = 0;
CDROM_In_EP_Deal();
break;
@@ -300,7 +300,7 @@ void USBHD_IRQHandler( void )
{
/* end-point 0 data out interrupt */
case USBFS_UIS_TOKEN_OUT | DEF_UEP0:
len = USBOTG_FS->RX_LEN;
len = USBFSD->RX_LEN;
if ( intst & USBFS_UIS_TOG_OK )
{
if ( ( USBFS_SetupReqType & USB_REQ_TYP_MASK ) != USB_REQ_TYP_STANDARD )
@@ -315,8 +315,8 @@ void USBHD_IRQHandler( void )
}
if( USBFS_SetupReqLen == 0 )
{
USBOTG_FS->UEP0_TX_LEN = 0;
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_ACK;
USBFSD->UEP0_TX_LEN = 0;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_ACK;
}
}
break;
@@ -325,11 +325,11 @@ void USBHD_IRQHandler( void )
case USBFS_UIS_TOKEN_OUT | DEF_UEP3:
if ( intst & USBFS_UIS_TOG_OK )
{
len = USBOTG_FS->RX_LEN;
USBOTG_FS->UEP3_RX_CTRL ^= USBFS_UEP_R_TOG;
USBOTG_FS->UEP3_RX_CTRL = (USBOTG_FS->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_NAK;
len = USBFSD->RX_LEN;
USBFSD->UEP3_RX_CTRL ^= USBFS_UEP_R_TOG;
USBFSD->UEP3_RX_CTRL = (USBFSD->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_NAK;
CDROM_Out_EP_Deal(CDROM_Out_Buf,len);
USBOTG_FS->UEP3_RX_CTRL = (USBOTG_FS->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_ACK;
USBFSD->UEP3_RX_CTRL = (USBFSD->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_ACK;
}
break;
}
@@ -337,8 +337,8 @@ void USBHD_IRQHandler( void )
/* Setup stage processing */
case USBFS_UIS_TOKEN_SETUP:
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_NAK;
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_NAK;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_NAK;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_NAK;
/* Store All Setup Values */
USBFS_SetupReqType = pUSBFS_SetupReqPak->bRequestType;
USBFS_SetupReqCode = pUSBFS_SetupReqPak->bRequest;
@@ -488,7 +488,7 @@ void USBHD_IRQHandler( void )
{
case ( DEF_UEP_IN | DEF_UEP2 ):
/* Set End-point 2 IN NAK */
USBOTG_FS->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
USBFSD->UEP2_TX_CTRL = USBFS_UEP_T_RES_NAK;
/* upload CSW */
if( CDROM_Transfer_Status & DEF_CDROM_CSW_UP_FLAG )
{
@@ -497,7 +497,7 @@ void USBHD_IRQHandler( void )
break;
case ( DEF_UEP_OUT | DEF_UEP3 ):
/* Set End-point 3 OUT ACK */
USBOTG_FS->UEP3_RX_CTRL = USBFS_UEP_R_RES_ACK;
USBFSD->UEP3_RX_CTRL = USBFS_UEP_R_RES_ACK;
/* upload CSW */
if( CDROM_Transfer_Status & DEF_CDROM_CSW_UP_FLAG )
{
@@ -552,12 +552,12 @@ void USBHD_IRQHandler( void )
{
case ( DEF_UEP_IN | DEF_UEP2 ):
/* Set End-point 2 IN STALL */
USBOTG_FS->UEP2_TX_CTRL = ( USBOTG_FS->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
USBFSD->UEP2_TX_CTRL = ( USBFSD->UEP2_TX_CTRL & ~USBFS_UEP_T_RES_MASK ) | USBFS_UEP_T_RES_STALL;
break;
case ( DEF_UEP_OUT | DEF_UEP3 ):
/* Set End-point 3 OUT STALL */
USBOTG_FS->UEP3_RX_CTRL = ( USBOTG_FS->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
USBFSD->UEP3_RX_CTRL = ( USBFSD->UEP3_RX_CTRL & ~USBFS_UEP_R_RES_MASK ) | USBFS_UEP_R_RES_STALL;
break;
default:
@@ -604,14 +604,14 @@ void USBHD_IRQHandler( void )
switch( (uint8_t)( USBFS_SetupReqIndex & 0xFF ) )
{
case ( DEF_UEP_IN | DEF_UEP2 ):
if( ( (USBOTG_FS->UEP2_TX_CTRL) & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
if( ( (USBFSD->UEP2_TX_CTRL) & USBFS_UEP_T_RES_MASK ) == USBFS_UEP_T_RES_STALL )
{
USBFS_EP0_Buf[ 0 ] = 0x01;
}
break;
case ( DEF_UEP_OUT | DEF_UEP3 ):
if( ( (USBOTG_FS->UEP3_RX_CTRL) & USBFS_UEP_R_RES_MASK ) == USBFS_UEP_R_RES_STALL )
if( ( (USBFSD->UEP3_RX_CTRL) & USBFS_UEP_R_RES_MASK ) == USBFS_UEP_R_RES_STALL )
{
USBFS_EP0_Buf[ 0 ] = 0x01;
}
@@ -643,8 +643,8 @@ void USBHD_IRQHandler( void )
if( errflag == 0xFF)
{
/* if one request not support, return stall */
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_STALL;
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_STALL;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_STALL;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_STALL;
}
else
{
@@ -654,33 +654,29 @@ void USBHD_IRQHandler( void )
/* tx */
len = (USBFS_SetupReqLen>DEF_USBD_UEP0_SIZE) ? DEF_USBD_UEP0_SIZE : USBFS_SetupReqLen;
USBFS_SetupReqLen -= len;
USBOTG_FS->UEP0_TX_LEN = len;
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
USBFSD->UEP0_TX_LEN = len;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
}
else
{
/* rx */
if( USBFS_SetupReqLen == 0 )
{
USBOTG_FS->UEP0_TX_LEN = 0;
USBOTG_FS->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
USBFSD->UEP0_TX_LEN = 0;
USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_TOG|USBFS_UEP_T_RES_ACK;
}
else
{
USBOTG_FS->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_ACK;
USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_TOG|USBFS_UEP_R_RES_ACK;
}
}
}
break;
/* Sof pack processing */
case USBFS_UIS_TOKEN_SOF:
break;
default :
break;
}
USBOTG_FS->INT_FG = USBFS_UIF_TRANSFER;
USBFSD->INT_FG = USBFS_UIF_TRANSFER;
}
else if( intflag & USBFS_UIF_BUS_RST )
{
@@ -690,15 +686,16 @@ void USBHD_IRQHandler( void )
USBFS_DevSleepStatus = 0;
USBFS_DevEnumStatus = 0;
USBOTG_FS->DEV_ADDR = 0;
USBFSD->DEV_ADDR = 0;
USBFS_Device_Endp_Init( );
USBOTG_FS->INT_FG = USBFS_UIF_BUS_RST;
USBFSD->INT_FG = USBFS_UIF_BUS_RST;
}
else if( intflag & USBFS_UIF_SUSPEND )
{
USBFSD->INT_FG = USBFS_UIF_SUSPEND;
Delay_Us(10);
/* usb suspend interrupt processing */
USBOTG_FS->INT_FG = USBFS_UIF_SUSPEND;
if ( USBOTG_FS->MIS_ST & USBFS_UMS_SUSPEND )
if ( USBFSD->MIS_ST & USBFS_UMS_SUSPEND )
{
USBFS_DevSleepStatus |= 0x02;
if( USBFS_DevSleepStatus == 0x03 )
@@ -714,7 +711,7 @@ void USBHD_IRQHandler( void )
else
{
/* other interrupts */
USBOTG_FS->INT_FG = intflag;
USBFSD->INT_FG = intflag;
}
}
@@ -727,9 +724,9 @@ void USBHD_IRQHandler( void )
*/
void USBFS_Send_Resume(void)
{
USBOTG_FS->UDEV_CTRL ^= USBFS_UD_LOW_SPEED;
USBFSD->UDEV_CTRL ^= USBFS_UD_LOW_SPEED;
Delay_Ms( 5 );
USBOTG_FS->UDEV_CTRL ^= USBFS_UD_LOW_SPEED;
USBFSD->UDEV_CTRL ^= USBFS_UD_LOW_SPEED;
Delay_Ms( 1 );
}
EVT/EXAM/USB/USBFS/DEVICE/MSC_CD-ROM/User/ch32v20x_usbfs_device.h
+1 -1
View File
@@ -4,7 +4,7 @@
* Version : V1.0.0
* Date : 2022/08/20
* Description : This file contains all the functions prototypes for the
* USBOTG firmware library.
* USBFS firmware library.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
EVT/EXAM/USB/USBFS/DEVICE/MSC_CD-ROM/User/main.c
+2 -2
View File
@@ -36,7 +36,7 @@
*/
int main(void)
{
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
Delay_Init();
USART_Printf_Init(115200);
printf("SystemClk:%d\r\n",SystemCoreClock);
@@ -52,7 +52,7 @@ int main(void)
/* Usb Init */
USBFS_RCC_Init( );
USBFS_Device_Init( ENABLE );
NVIC_EnableIRQ(USBHD_IRQn);
NVIC_EnableIRQ(USBFS_IRQn);
while(1)
{
EVT/EXAM/USB/USBFS/DEVICE/MSC_CD-ROM/User/system_ch32v20x.c
+2 -2
View File
@@ -111,10 +111,10 @@ static void SetSysClockTo144_HSI( void );
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CFGR0 &= (uint32_t)0xF0FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->CFGR0 &= (uint32_t)0xFF00FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}