bstanwell/ch32v20x-examples
2
1
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

V2.2

Browse Source
This commit is contained in:
qiyongshuang
2024-11-11 14:32:11 +08:00
parent c4c38f507e
commit 961943f623
452 changed files with 9316 additions and 862 deletions
Download Patch File Download Diff File Expand all files Collapse all files
EVT/EXAM/IAP/USB_UART/CH32V20x_APP/User/ch32v20x_it.c
+1
View File
@@ -38,6 +38,7 @@ void NMI_Handler(void)
*/
void HardFault_Handler(void)
{
NVIC_SystemReset();
while (1)
{
}
EVT/EXAM/IAP/USB_UART/CH32V20x_APP/User/system_ch32v20x.c
+2 -2
View File
@@ -159,8 +159,8 @@ void SystemCoreClockUpdate (void)
}
else
{
#if defined (CH32V20x_D8W)
if((RCC->CFGR0 & (3<<22)) == (3<<22))
#if defined (CH32V20x_D8W) || defined (CH32V20x_D8)
if(((RCC->CFGR0 & (3<<22)) == (3<<22)) && (RCC_USB5PRE_JUDGE()== SET))
{
SystemCoreClock = ((HSE_VALUE>>1)) * pllmull;
}
EVT/EXAM/IAP/USB_UART/CH32V20x_IAP/CONFIG/hw_config.c
+21 -2
View File
@@ -56,8 +56,27 @@ void USB_LP_CAN1_RX0_IRQHandler(void)
*/
void Set_USBConfig( )
{
RCC_USBCLKConfig(RCC_USBCLKSource_PLLCLK_Div2);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USB, ENABLE);
RCC_ClocksTypeDef RCC_ClocksStatus={0};
RCC_GetClocksFreq(&RCC_ClocksStatus);
if( RCC_ClocksStatus.SYSCLK_Frequency == 144000000 )
{
RCC_USBCLKConfig( RCC_USBCLKSource_PLLCLK_Div3 );
}
else if( RCC_ClocksStatus.SYSCLK_Frequency == 96000000 )
{
RCC_USBCLKConfig( RCC_USBCLKSource_PLLCLK_Div2 );
}
else if( RCC_ClocksStatus.SYSCLK_Frequency == 48000000 )
{
RCC_USBCLKConfig( RCC_USBCLKSource_PLLCLK_Div1 );
}
#if defined(CH32V20x_D8W) || defined(CH32V20x_D8)
else if ( RCC_ClocksStatus.SYSCLK_Frequency == 240000000 && RCC_USB5PRE_JUDGE() == SET )
{
RCC_USBCLKConfig( RCC_USBCLKSource_PLLCLK_Div5 );
}
#endif
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USB, ENABLE);
}
/*******************************************************************************
EVT/EXAM/IAP/USB_UART/CH32V20x_IAP/User/ch32v20x_it.c
+1
View File
@@ -37,6 +37,7 @@ void NMI_Handler(void)
*/
void HardFault_Handler(void)
{
NVIC_SystemReset();
while (1)
{
}
EVT/EXAM/IAP/USB_UART/CH32V20x_IAP/User/ch32v20x_usbfs_device.c
+21 -2
View File
@@ -93,13 +93,32 @@ void USBDeviceInit( void )
/*********************************************************************
* @fn USBFS_RCC_Init
*
* @brief Initializes the USB clock configuration.
* @brief Initializes the usbfs clock configuration.
*
* @return none
*/
void USBFS_RCC_Init(void)
{
RCC_USBCLKConfig(RCC_USBCLKSource_PLLCLK_Div2);
RCC_ClocksTypeDef RCC_ClocksStatus={0};
RCC_GetClocksFreq(&RCC_ClocksStatus);
if( RCC_ClocksStatus.SYSCLK_Frequency == 144000000 )
{
RCC_USBCLKConfig( RCC_USBCLKSource_PLLCLK_Div3 );
}
else if( RCC_ClocksStatus.SYSCLK_Frequency == 96000000 )
{
RCC_USBCLKConfig( RCC_USBCLKSource_PLLCLK_Div2 );
}
else if( RCC_ClocksStatus.SYSCLK_Frequency == 48000000 )
{
RCC_USBCLKConfig( RCC_USBCLKSource_PLLCLK_Div1 );
}
#if defined(CH32V20x_D8W) || defined(CH32V20x_D8)
else if ( RCC_ClocksStatus.SYSCLK_Frequency == 240000000 && RCC_USB5PRE_JUDGE() == SET )
{
RCC_USBCLKConfig( RCC_USBCLKSource_PLLCLK_Div5 );
}
#endif
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_USBFS, ENABLE );
}
EVT/EXAM/IAP/USB_UART/CH32V20x_IAP/User/iap.c
+9 -6
View File
@@ -73,17 +73,20 @@ u8 RecData_Deal(void)
break;
case CMD_IAP_VERIFY:
if (Verity_Star_flag == 0) {
Verity_Star_flag = 1;
for (i = 0; i < (256 - CodeLen); i++) {
if (Verity_Star_flag == 0)
{
Verity_Star_flag = 1;
if(CodeLen != 0)
{
for (i = 0; i < (256 - CodeLen); i++)
{
Fast_Program_Buf[CodeLen + i] = 0xff;
}
FLASH_ErasePage_Fast(Program_addr);
CH32_IAP_Program(Program_addr, (u32*) Fast_Program_Buf);
CodeLen = 0;
}
}
}
s = ERR_SCUESS;
for (i = 0; i < Lenth; i++) {
EVT/EXAM/IAP/USB_UART/CH32V20x_IAP/User/system_ch32v20x.c
+2 -2
View File
@@ -159,8 +159,8 @@ void SystemCoreClockUpdate (void)
}
else
{
#if defined (CH32V20x_D8W)
if((RCC->CFGR0 & (3<<22)) == (3<<22))
#if defined (CH32V20x_D8W) || defined (CH32V20x_D8)
if(((RCC->CFGR0 & (3<<22)) == (3<<22)) && (RCC_USB5PRE_JUDGE()== SET))
{
SystemCoreClock = ((HSE_VALUE>>1)) * pllmull;
}