bstanwell/ch32v20x-examples
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This commit is contained in:
qiyongshuang
2024-11-11 14:32:11 +08:00
parent c4c38f507e
commit 961943f623
452 changed files with 9316 additions and 862 deletions
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EVT/EXAM/PWR/Standby_RAM_LV_Mode/User/ch32v20x_it.c
+1
View File
@@ -38,6 +38,7 @@ void NMI_Handler(void)
*/
void HardFault_Handler(void)
{
NVIC_SystemReset();
while (1)
{
}
EVT/EXAM/PWR/Standby_RAM_LV_Mode/User/main.c
+15 -16
View File
@@ -12,10 +12,12 @@
/*
*@Note
* when LV is enabled in standby mode, RAM 2k and 30K low-power data holding routines:
* This routine demonstrates writing data at the specified location of 2K RAM and 30K RAM,
* then WFI enters STANDBY sleep mode and turns on LV,Input high level through PA0 (wakeup) pin
* to exit standby mode, print RAM data after waking up, and test whether RAM holds data.
* when LV is enabled in standby mode, RAM 2k and 30K low-power data holding routines:
* This routine demonstrates writing data at the specified location of 2K RAM and 30K RAM(Applicable to
* CH32V20x_D8 and CH32V20x_D8W,CH32V20x_D6 has a 20K RAM data holding option),then WFI enters STANDBY
* sleep mode and turns on LV,Input high level through PA0 (wakeup) pin to exit standby mode, print RAM
* data after waking up, and test whether RAM holds data.
*
*/
#include "debug.h"
@@ -27,7 +29,7 @@
/*********************************************************************
* @fn TestDataWrite
*
* @brief Write 0x11111111 to certain address of 2K RAM and 30K RAM.
* @brief Write data to certain address of 2K RAM and 30K RAM.
*
* @return none
*/
@@ -53,7 +55,7 @@ void TestDataWrite(void)
{
*(uint32_t volatile *)(myAddr2 + (i << 2)) = 0x44444444;
}
for(i = 0; i < 10; i++) //Check 30K RAM
for(i = 0; i < 10; i++) //Check 2K RAM
{
if((*(uint32_t volatile *)(myAddr2 + (i << 2))) != 0x44444444)
{
@@ -120,14 +122,11 @@ int main(void)
/* Delay 1.5s to avoid entering low power mode immediately after reset*/
Delay_Ms(1500);
while(1)
{
TestDataRead();
printf("4.Standby Mode RAM LV Test\r\n");
TestDataWrite();
PWR_WakeUpPinCmd(ENABLE);
PWR_EnterSTANDBYMode_RAM_LV();
printf("\r\n4.Out \r\n");
printf("\r\n ########## \r\n");
}
TestDataRead();
printf("Standby RAM LV Mode Test\r\n");
TestDataWrite();
PWR_WakeUpPinCmd(ENABLE);
PWR_EnterSTANDBYMode_RAM_LV();
while(1);
}
EVT/EXAM/PWR/Standby_RAM_LV_Mode/User/system_ch32v20x.c
+2 -2
View File
@@ -159,8 +159,8 @@ void SystemCoreClockUpdate (void)
}
else
{
#if defined (CH32V20x_D8W)
if((RCC->CFGR0 & (3<<22)) == (3<<22))
#if defined (CH32V20x_D8W) || defined (CH32V20x_D8)
if(((RCC->CFGR0 & (3<<22)) == (3<<22)) && (RCC_USB5PRE_JUDGE()== SET))
{
SystemCoreClock = ((HSE_VALUE>>1)) * pllmull;
}