bstanwell/ch32v20x-examples
2
1
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

V2.2

Browse Source
This commit is contained in:
qiyongshuang
2024-11-11 14:32:11 +08:00
parent c4c38f507e
commit 961943f623
452 changed files with 9316 additions and 862 deletions
Download Patch File Download Diff File Expand all files Collapse all files
EVT/EXAM/RTC/RTC_Calendar/User/ch32v20x_it.c
+1
View File
@@ -38,6 +38,7 @@ void NMI_Handler(void)
*/
void HardFault_Handler(void)
{
NVIC_SystemReset();
while (1)
{
}
EVT/EXAM/RTC/RTC_Calendar/User/main.c
+2 -2
View File
@@ -78,7 +78,8 @@ u8 RTC_Init(void)
u8 temp = 0;
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE);
PWR_BackupAccessCmd(ENABLE);
RTC_ClearITPendingBit(RTC_IT_ALR);
RTC_ClearITPendingBit(RTC_IT_SEC);
/* Is it the first configuration */
BKP_DeInit();
@@ -247,7 +248,6 @@ u8 RTC_Get(void)
temp -= 366;
else
{
temp1++;
break;
}
}
EVT/EXAM/RTC/RTC_Calendar/User/system_ch32v20x.c
+2 -2
View File
@@ -159,8 +159,8 @@ void SystemCoreClockUpdate (void)
}
else
{
#if defined (CH32V20x_D8W)
if((RCC->CFGR0 & (3<<22)) == (3<<22))
#if defined (CH32V20x_D8W) || defined (CH32V20x_D8)
if(((RCC->CFGR0 & (3<<22)) == (3<<22)) && (RCC_USB5PRE_JUDGE()== SET))
{
SystemCoreClock = ((HSE_VALUE>>1)) * pllmull;
}
EVT/EXAM/RTC/RTC_Calibrations/User/ch32v20x_it.c
+1
View File
@@ -37,6 +37,7 @@ void NMI_Handler(void)
*/
void HardFault_Handler(void)
{
NVIC_SystemReset();
while (1)
{
}
EVT/EXAM/RTC/RTC_Calibrations/User/main.c
+2 -2
View File
@@ -2,7 +2,7 @@
* File Name : main.c
* Author : WCH
* Version : V1.0.0
* Date : 2024/02/22
* Date : 2024/07/18
* Description : Main program body.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
@@ -185,6 +185,7 @@ u8 RTC_Init(void)
u8 temp = 0;
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE);
PWR_BackupAccessCmd(ENABLE);
RTC_ClearITPendingBit(RTC_IT_SEC);
/* Is it the first configuration */
@@ -358,7 +359,6 @@ u8 RTC_Get(void)
temp -= 366;
else
{
temp1++;
break;
}
}
EVT/EXAM/RTC/RTC_Calibrations/User/system_ch32v20x.c
+2 -2
View File
@@ -159,8 +159,8 @@ void SystemCoreClockUpdate (void)
}
else
{
#if defined (CH32V20x_D8W)
if((RCC->CFGR0 & (3<<22)) == (3<<22))
#if defined (CH32V20x_D8W) || defined (CH32V20x_D8)
if(((RCC->CFGR0 & (3<<22)) == (3<<22)) && (RCC_USB5PRE_JUDGE()== SET))
{
SystemCoreClock = ((HSE_VALUE>>1)) * pllmull;
}