V2.2

EVT/EXAM/RTC/RTC_Calendar/User/ch32v20x_it.c

@@ -38,6 +38,7 @@ void NMI_Handler(void)
  */
 void HardFault_Handler(void)
 {
+  NVIC_SystemReset();
   while (1)
   {
   }

EVT/EXAM/RTC/RTC_Calendar/User/main.c

@@ -78,7 +78,8 @@ u8 RTC_Init(void)
     u8 temp = 0;
     RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE);
     PWR_BackupAccessCmd(ENABLE);
-
+    RTC_ClearITPendingBit(RTC_IT_ALR);
+    RTC_ClearITPendingBit(RTC_IT_SEC);
     /* Is it the first configuration */
 
     BKP_DeInit();
@@ -247,7 +248,6 @@ u8 RTC_Get(void)
                     temp -= 366;
                 else
                 {
-                    temp1++;
                     break;
                 }
             }

EVT/EXAM/RTC/RTC_Calendar/User/system_ch32v20x.c

@@ -159,8 +159,8 @@ void SystemCoreClockUpdate (void)
       }
       else
       {
-#if defined (CH32V20x_D8W)
-        if((RCC->CFGR0 & (3<<22)) == (3<<22))
+#if defined (CH32V20x_D8W) || defined (CH32V20x_D8)
+        if(((RCC->CFGR0 & (3<<22)) == (3<<22)) && (RCC_USB5PRE_JUDGE()== SET))
         {
           SystemCoreClock = ((HSE_VALUE>>1)) * pllmull;
         }