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/********************************** (C) COPYRIGHT *******************************
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* File Name : eth_driver.h
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* Author : WCH
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* Version : V1.3.0
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* Date : 2022/05/27
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* Description : This file contains the headers of the ETH Driver.
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* Attention: This software (modified or not) and binary are used for
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* microcontroller manufactured by Nanjing Qinheng Microelectronics.
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*******************************************************************************/
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#ifndef __ETH_DRIVER__
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#define __ETH_DRIVER__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "debug.h"
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#define USE_10M_BASE 1 // Internal 10M PHY
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#ifndef PHY_MODE
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#define PHY_MODE USE_10M_BASE
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#endif
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#define ROM_CFG_USERADR_ID 0x1FFFF7E8
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#define PHY_LINK_TASK_PERIOD 50
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#define PHY_ANLPAR_SELECTOR_FIELD 0x1F
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#define PHY_ANLPAR_SELECTOR_VALUE 0x01 // 5B'00001
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#define PHY_LINK_INIT 0x00
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#define PHY_LINK_SUC_P (1<<0)
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#define PHY_LINK_SUC_N (1<<1)
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#define PHY_LINK_WAIT_SUC (1<<7)
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#define PHY_PN_SWITCH_P (0<<2)
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#define PHY_PN_SWITCH_N (1<<2)
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#define PHY_PN_SWITCH_AUTO (2<<2)
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#ifndef WCHNETTIMERPERIOD
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#define WCHNETTIMERPERIOD 10 /* Timer period, in Ms. */
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#endif
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#define PHY_NEGOTIATION_PARAM_INIT() do{\
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phySucCnt = 0;\
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phyStatus = 0;\
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phyLinkCnt = 0;\
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phyRetryCnt = 0;\
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phyPNChangeCnt = 0;\
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phyLinkStatus = PHY_LINK_INIT;\
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}while(0)
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/* definition for Ethernet frame */
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#define ETH_MAX_PACKET_SIZE 1536 /* ETH_HEADER + ETH_EXTRA + MAX_ETH_PAYLOAD + ETH_CRC */
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#define ETH_HEADER 14 /* 6 byte Dest addr, 6 byte Src addr, 2 byte length/type */
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#define ETH_CRC 4 /* Ethernet CRC */
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#define ETH_EXTRA 2 /* Extra bytes in some cases */
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#define VLAN_TAG 4 /* optional 802.1q VLAN Tag */
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#define MIN_ETH_PAYLOAD 46 /* Minimum Ethernet payload size */
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#define MAX_ETH_PAYLOAD 1500 /* Maximum Ethernet payload size */
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/* Bit or field definition of TDES0 register (DMA Tx descriptor status register)*/
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#define ETH_DMATxDesc_OWN ((uint32_t)0x80000000) /* OWN bit: descriptor is owned by DMA engine */
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/* Bit or field definition of RDES0 register (DMA Rx descriptor status register) */
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#define ETH_DMARxDesc_OWN ((uint32_t)0x80000000) /* OWN bit: descriptor is owned by DMA engine */
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#define ETH_DMARxDesc_FL ((uint32_t)0x3FFF0000) /* Receive descriptor frame length */
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#define ETH_DMARxDesc_ES ((uint32_t)0x00008000) /* Error summary: */
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#define ETH_DMARxDesc_FS ((uint32_t)0x00000200) /* First descriptor of the frame */
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#define ETH_DMARxDesc_LS ((uint32_t)0x00000100) /* Last descriptor of the frame */
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#define ETH_DMARxDesc_FrameLengthShift 16
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/* ETHERNET errors */
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#define ETH_ERROR ((uint32_t)0)
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#define ETH_SUCCESS ((uint32_t)1)
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/* ETH structure definition */
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typedef struct
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{
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uint32_t volatile Status; /* Status */
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uint32_t ControlBufferSize; /* Control and Buffer1, Buffer2 lengths */
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uint32_t Buffer1Addr; /* Buffer1 address pointer */
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uint32_t Buffer2NextDescAddr; /* Buffer2 or next descriptor address pointer */
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} ETH_DMADESCTypeDef;
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#include "wchnet.h"
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extern SOCK_INF SocketInf[ ];
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void ETH_PHYLink( void );
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void WCHNET_ETHIsr( void );
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void WCHNET_MainTask( void );
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void ETH_LedConfiguration(void);
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void ETH_Init( uint8_t *macAddr );
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void ETH_LedLinkSet( uint8_t mode );
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void ETH_LedDataSet( uint8_t mode );
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void WCHNET_TimeIsr( uint16_t timperiod );
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void ETH_Configuration( uint8_t *macAddr );
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uint8_t ETH_LibInit( uint8_t *ip, uint8_t *gwip, uint8_t *mask, uint8_t *macaddr);
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#ifdef __cplusplus
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}
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#endif
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#endif
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