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qiyongshuang
2023-02-01 14:19:13 +08:00
parent d534aad004
commit b79c6ac80d
3711 changed files with 745432 additions and 2 deletions
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EVT/EXAM/USB/USBD/MSC_CD-ROM/User/Main.c
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/********************************** (C) COPYRIGHT *******************************
* File Name : main.c
* Author : WCH
* Version : V1.0.0
* Date : 2022/08/08
* Description : Main program body.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include <SPI_FLASH.h>
#include <SW_CDROM.h>
#include "debug.h"
#include "usb_lib.h"
/* @Note
* CD-ROM Example:
* 1.This program provides examples of CD-ROM.The iso file TEST.iso used for testing is
* located in the TEST_ISO folder.
* 2.User needs to place the ISO at address 0 of the external Flash.The ISO file is in
* ISO 9660 Joliet Level 1 format and is suitable for a sector size of 512B. If other
* file systems are used, the sector size DEF_CFG_DISK_SEC_SIZE in the program needs to
* be adjusted.
* 3.This Code Only Supports Winboard W25 Series flash, if user needs to use other type
* of flash, you can add flash type by yourself in SPI_FLASH.c in user floder.
* 4.External flash chip needs to be attached to SPI_1.
* 5.CD_ROM iso file 'TEST.iso' contains wch serial-port driver, and autorun.inf.
* */
/*********************************************************************
* @fn main
*
* @brief Main program.
*
* @return none
*/
int main(void)
{
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
Delay_Init();
USART_Printf_Init(115200);
printf("SystemClk:%d\r\n",SystemCoreClock);
printf("USBD CD-ROM Demo\r\nStorage Medium: SPI FLASH \r\n");
/* SPI flash init */
FLASH_Port_Init( );
/* FLASH ID check */
FLASH_IC_Check( );
/* Enable CD-ROM */
CDROM_Capability = Flash_Sector_Count;
CDROM_Status |= DEF_CDROM_EN_FLAG;
/* USBD init */
Set_USBConfig();
USB_Init();
USB_Interrupts_Config();
while(1)
{
;
}
}
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/SPI_FLASH.c
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/********************************** (C) COPYRIGHT *******************************
* File Name : SPI_FLAH.c
* Author : WCH
* Version : V1.0.1
* Date : 2022/11/24
* Description : SPI FLASHChip operation file
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
/******************************************************************************/
/* Header Files */
#include <SPI_FLASH.h>
#include <SW_CDROM.h>
#include "ch32v20x_spi.h"
/******************************************************************************/
volatile uint8_t Flash_Type = 0x00; /* FLASH chip: 0: W25XXXseries */
volatile uint32_t Flash_ID = 0x00; /* FLASH ID */
volatile uint32_t Flash_Sector_Count = 0x00; /* FLASH sector number */
volatile uint16_t Flash_Sector_Size = 0x00; /* FLASH sector size */
/*******************************************************************************
* Function Name : FLASH_Port_Init
* Description : FLASH chip operation related pins and hardware initialization
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void FLASH_Port_Init( void )
{
GPIO_InitTypeDef GPIO_InitStructure = {0};
SPI_InitTypeDef SPI_InitStructure = {0};
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_SPI1 , ENABLE);
/* CS# */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOA, &GPIO_InitStructure);
GPIO_SetBits(GPIOA, GPIO_Pin_2);
/* SCK */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOA, &GPIO_InitStructure);
/* MISO */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_Init(GPIOA, &GPIO_InitStructure);
/* MOSI */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOA, &GPIO_InitStructure);
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_High;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_8;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_Init(SPI1, &SPI_InitStructure);
// SPI1->HSCR |= 0x01; // Enable High Speed Read
SPI_Cmd(SPI1, ENABLE);
}
/*********************************************************************
* @fn SPI1_ReadWriteByte
*
* @brief SPI1 read or write one byte.
*
* @param TxData - write one byte data.
*
* @return Read one byte data.
*/
uint8_t SPI1_ReadWriteByte(uint8_t TxData)
{
uint8_t i = 0;
while(SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET)
{
i++;
if(i > 200)
return 0;
}
SPI_I2S_SendData(SPI1, TxData);
i = 0;
while(SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE) == RESET)
{
i++;
if(i > 200)
return 0;
}
return SPI_I2S_ReceiveData(SPI1);
}
/*******************************************************************************
* Function Name : SPI_FLASH_SendByte
* Description : SPI send a byte
* Input : byte: byte to send
* Output : None
* Return : None
*******************************************************************************/
uint8_t SPI_FLASH_SendByte( uint8_t byte )
{
return SPI1_ReadWriteByte( byte );
}
/*******************************************************************************
* Function Name : SPI_FLASH_ReadByte
* Description : SPI receive a byte
* Input : None
* Output : None
* Return : byte received
*******************************************************************************/
uint8_t SPI_FLASH_ReadByte( void )
{
return SPI1_ReadWriteByte( 0xFF );
}
/*******************************************************************************
* Function Name : FLASH_ReadID
* Description : Read FLASH ID
* Input : None
* Output : None
* Return : chip id
*******************************************************************************/
uint32_t FLASH_ReadID( void )
{
uint32_t dat;
PIN_FLASH_CS_LOW( );
SPI_FLASH_SendByte( CMD_FLASH_JEDEC_ID );
dat = ( uint32_t )SPI_FLASH_SendByte( DEF_DUMMY_BYTE ) << 16;
dat |= ( uint32_t )SPI_FLASH_SendByte( DEF_DUMMY_BYTE ) << 8;
dat |= SPI_FLASH_SendByte( DEF_DUMMY_BYTE );
PIN_FLASH_CS_HIGH( );
return( dat );
}
/*******************************************************************************
* Function Name : FLASH_WriteEnable
* Description : FLASH Write Enable
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void FLASH_WriteEnable( void )
{
PIN_FLASH_CS_LOW( );
SPI_FLASH_SendByte( CMD_FLASH_WREN );
PIN_FLASH_CS_HIGH( );
}
/*******************************************************************************
* Function Name : FLASH_WriteDisable
* Description : FLASH Write Disable
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void FLASH_WriteDisable( void )
{
PIN_FLASH_CS_LOW( );
SPI_FLASH_SendByte( CMD_FLASH_WRDI );
PIN_FLASH_CS_HIGH( );
}
/*******************************************************************************
* Function Name : FLASH_ReadStatusReg
* Description : FLASH Read Status
* Input : None
* Output : None
* Return : status
*******************************************************************************/
uint8_t FLASH_ReadStatusReg( void )
{
uint8_t status;
PIN_FLASH_CS_LOW( );
SPI_FLASH_SendByte( CMD_FLASH_RDSR );
status = SPI_FLASH_ReadByte( );
PIN_FLASH_CS_HIGH( );
return( status );
}
/*******************************************************************************
* Function Name : FLASH_Erase_Sector
* Description : FLASH Erase Sector
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void FLASH_Erase_Sector( uint32_t address )
{
uint8_t temp;
FLASH_WriteEnable( );
PIN_FLASH_CS_LOW( );
SPI_FLASH_SendByte( CMD_FLASH_SECTOR_ERASE );
SPI_FLASH_SendByte( (uint8_t)( address >> 16 ) );
SPI_FLASH_SendByte( (uint8_t)( address >> 8 ) );
SPI_FLASH_SendByte( (uint8_t)address );
PIN_FLASH_CS_HIGH( );
do
{
temp = FLASH_ReadStatusReg( );
}while( temp & 0x01 );
}
/*******************************************************************************
* Function Name : FLASH_RD_Block_Start
* Description : FLASH start block read
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void FLASH_RD_Block_Start( uint32_t address )
{
PIN_FLASH_CS_LOW( );
SPI_FLASH_SendByte( CMD_FLASH_READ );
SPI_FLASH_SendByte( (uint8_t)( address >> 16 ) );
SPI_FLASH_SendByte( (uint8_t)( address >> 8 ) );
SPI_FLASH_SendByte( (uint8_t)address );
}
/*******************************************************************************
* Function Name : FLASH_RD_Block
* Description : FLASH read block
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void FLASH_RD_Block( uint8_t *pbuf, uint32_t len )
{
while( len-- )
{
*pbuf++ = SPI_FLASH_ReadByte( );
}
}
/*******************************************************************************
* Function Name : FLASH_RD_Block_End
* Description : FLASH end block read
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void FLASH_RD_Block_End( void )
{
PIN_FLASH_CS_HIGH( );
}
/*******************************************************************************
* Function Name : W25XXX_WR_Page
* Description : Flash page program
* Input : address
* len
* *pbuf
* Output : None
* Return : None
*******************************************************************************/
void W25XXX_WR_Page( uint8_t *pbuf, uint32_t address, uint32_t len )
{
uint8_t temp;
FLASH_WriteEnable( );
PIN_FLASH_CS_LOW( );
SPI_FLASH_SendByte( CMD_FLASH_BYTE_PROG );
SPI_FLASH_SendByte( (uint8_t)( address >> 16 ) );
SPI_FLASH_SendByte( (uint8_t)( address >> 8 ) );
SPI_FLASH_SendByte( (uint8_t)address );
if( len > SPI_FLASH_PerWritePageSize )
{
len = SPI_FLASH_PerWritePageSize;
}
while( len-- )
{
SPI_FLASH_SendByte( *pbuf++ );
}
PIN_FLASH_CS_HIGH( );
do
{
temp = FLASH_ReadStatusReg( );
}while( temp & 0x01 );
}
/*******************************************************************************
* Function Name : W25XXX_WR_Block
* Description : W25XXX block write
* Input : address
* len
* *pbuf
* Output : None
* Return : None
*******************************************************************************/
void W25XXX_WR_Block( uint8_t *pbuf, uint32_t address, uint32_t len )
{
uint8_t NumOfPage = 0, NumOfSingle = 0, Addr = 0, count = 0, temp = 0;
Addr = address % SPI_FLASH_PageSize;
count = SPI_FLASH_PageSize - Addr;
NumOfPage = len / SPI_FLASH_PageSize;
NumOfSingle = len % SPI_FLASH_PageSize;
if( Addr == 0 )
{
if( NumOfPage == 0 )
{
W25XXX_WR_Page( pbuf, address, len );
}
else
{
while( NumOfPage-- )
{
W25XXX_WR_Page( pbuf, address, SPI_FLASH_PageSize );
address += SPI_FLASH_PageSize;
pbuf += SPI_FLASH_PageSize;
}
W25XXX_WR_Page( pbuf, address, NumOfSingle );
}
}
else
{
if( NumOfPage == 0 )
{
if( NumOfSingle > count )
{
temp = NumOfSingle - count;
W25XXX_WR_Page( pbuf, address, count );
address += count;
pbuf += count;
W25XXX_WR_Page( pbuf, address, temp );
}
else
{
W25XXX_WR_Page( pbuf, address, len );
}
}
else
{
len -= count;
NumOfPage = len / SPI_FLASH_PageSize;
NumOfSingle = len % SPI_FLASH_PageSize;
W25XXX_WR_Page( pbuf, address, count );
address += count;
pbuf += count;
while( NumOfPage-- )
{
W25XXX_WR_Page( pbuf, address, SPI_FLASH_PageSize );
address += SPI_FLASH_PageSize;
pbuf += SPI_FLASH_PageSize;
}
if( NumOfSingle != 0 )
{
W25XXX_WR_Page( pbuf, address, NumOfSingle );
}
}
}
}
/*******************************************************************************
* Function Name : FLASH_IC_Check
* Description : check flash type
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void FLASH_IC_Check( void )
{
uint32_t count;
/* Read FLASH ID */
Flash_ID = FLASH_ReadID( );
printf("Flash_ID: %08x\n",(uint32_t)Flash_ID);
Flash_Type = 0x00;
Flash_Sector_Count = 0x00;
Flash_Sector_Size = 0x00;
switch( Flash_ID )
{
/* W25XXX */
case W25X10_FLASH_ID: /* 0xEF3011-----1M bit */
count = 1;
break;
case W25X20_FLASH_ID: /* 0xEF3012-----2M bit */
count = 2;
break;
case W25X40_FLASH_ID: /* 0xEF3013-----4M bit */
count = 4;
break;
case W25X80_FLASH_ID: /* 0xEF4014-----8M bit */
count = 8;
break;
case W25Q16_FLASH_ID1: /* 0xEF3015-----16M bit */
case W25Q16_FLASH_ID2: /* 0xEF4015-----16M bit */
count = 16;
break;
case W25Q32_FLASH_ID1: /* 0xEF4016-----32M bit */
case W25Q32_FLASH_ID2: /* 0xEF6016-----32M bit */
count = 32;
break;
case W25Q64_FLASH_ID1: /* 0xEF4017-----64M bit */
case W25Q64_FLASH_ID2: /* 0xEF6017-----64M bit */
count = 64;
break;
case W25Q128_FLASH_ID1: /* 0xEF4018-----128M bit */
case W25Q128_FLASH_ID2: /* 0xEF6018-----128M bit */
count = 128;
break;
case W25Q256_FLASH_ID1: /* 0xEF4019-----256M bit */
case W25Q256_FLASH_ID2: /* 0xEF6019-----256M bit */
count = 256;
break;
default:
if( ( Flash_ID != 0xFFFFFFFF ) && ( Flash_ID != 0x00000000 ) )
{
count = 16;
}
else
{
count = 0x00;
}
break;
}
count = ( (uint32_t)count * 1024 ) * ( (uint32_t)1024 / 8 );
if( count )
{
Flash_Sector_Count = count / DEF_CDROM_SECTOR_SIZE;
Flash_Sector_Size = DEF_CDROM_SECTOR_SIZE;
}
else
{
printf("External Flash not connected\r\n");
while(1);
}
}
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/SPI_FLASH.h
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/********************************** (C) COPYRIGHT *******************************
* File Name : SPI_FLAH.h
* Author : WCH
* Version : V1.0.1
* Date : 2022/11/24
* Description : SPI FLASHChip operation file
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __SPI_FLASH_H
#define __SPI_FLASH_H
#ifdef __cplusplus
extern "C" {
#endif
/******************************************************************************/
/* header files */
#include <stdio.h>
#include <string.h>
#include <stdint.h>
/******************************************************************************/
/* SPI Pins */
#define PIN_FLASH_CS_LOW( ) ( GPIOA->BCR = GPIO_Pin_2 )
#define PIN_FLASH_CS_HIGH( ) ( GPIOA->BSHR = GPIO_Pin_2 )
/******************************************************************************/
/* SPI Serial Flash OPERATION INSTRUCTIONS */
#define CMD_FLASH_READ 0x03 /* Read Memory at 25 MHz */
#define CMD_FLASH_SECTOR_ERASE 0x20 /* Erase 4 KByte of memory array */
#define CMD_FLASH_BYTE_PROG 0x02 /* To Program One Data Byte */
#define CMD_FLASH_RDSR 0x05 /* Read-Status-Register */
#define CMD_FLASH_EWSR 0x50 /* Enable-Write-Status-Register */
#define CMD_FLASH_WREN 0x06 /* Write-Enable */
#define CMD_FLASH_WRDI 0x04 /* Write-Disable */
#define CMD_FLASH_JEDEC_ID 0x9F /* JEDEC ID read */
/******************************************************************************/
#define DEF_DUMMY_BYTE 0xFF
/******************************************************************************/
/* FLASH Parameter Definition */
#define SPI_FLASH_SectorSize 4096
#define SPI_FLASH_PageSize 256
#define SPI_FLASH_PerWritePageSize 256
/******************************************************************************/
/* SPI FLASH Type */
#define DEF_TYPE_W25XXX 0 /* W25XXX */
/******************************************************************************/
/* SPI FLASH Type Define */
/* W25XXX*/
#define W25X10_FLASH_ID 0xEF3011 /* 1M bit */
#define W25X20_FLASH_ID 0xEF3012 /* 2M bit */
#define W25X40_FLASH_ID 0xEF3013 /* 4M bit */
#define W25X80_FLASH_ID 0xEF4014 /* 8M bit */
#define W25Q16_FLASH_ID1 0xEF3015 /* 16M bit */
#define W25Q16_FLASH_ID2 0xEF4015 /* 16M bit */
#define W25Q32_FLASH_ID1 0xEF4016 /* 32M bit */
#define W25Q32_FLASH_ID2 0xEF6016 /* 32M bit */
#define W25Q64_FLASH_ID1 0xEF4017 /* 64M bit */
#define W25Q64_FLASH_ID2 0xEF6017 /* 64M bit */
#define W25Q128_FLASH_ID1 0xEF4018 /* 128M bit */
#define W25Q128_FLASH_ID2 0xEF6018 /* 128M bit */
#define W25Q256_FLASH_ID1 0xEF4019 /* 256M bit */
#define W25Q256_FLASH_ID2 0xEF6019 /* 256M bit */
/******************************************************************************/
/* Variable Definition */
extern volatile uint8_t Flash_Type; /* FLASH chip: 0: W25XXXseries */
extern volatile uint32_t Flash_ID; /* FLASH ID */
extern volatile uint32_t Flash_Sector_Count; /* FLASH sector number */
extern volatile uint16_t Flash_Sector_Size; /* FLASH sector size */
/******************************************************************************/
/* external functions */
extern void FLASH_Port_Init( void );
extern uint8_t SPI_FLASH_SendByte( uint8_t byte );
extern uint8_t SPI_FLASH_ReadByte( void );
extern uint32_t FLASH_ReadID( void );
extern void FLASH_WriteEnable( void );
extern void FLASH_WriteDisable( void );
extern uint8_t FLASH_ReadStatusReg( void );
extern void FLASH_IC_Check( void );
extern void FLASH_Erase_Sector( uint32_t address );
extern void FLASH_RD_Block_Start( uint32_t address );
extern void FLASH_RD_Block( uint8_t *pbuf, uint32_t len );
extern void FLASH_RD_Block_End( void );
extern void W25XXX_WR_Block( uint8_t *pbuf, uint32_t address, uint32_t len );
#ifdef __cplusplus
}
#endif
#endif
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/SW_CDROM.c
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/********************************** (C) COPYRIGHT *******************************
* File Name : SW_CDROM.C
* Author : WCH
* Version : V1.0.1
* Date : 2022/11/24
* Description : CD-ROM Source File
*******************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
/******************************************************************************/
/* Header Files */
#include <SPI_FLASH.h>
#include <SW_CDROM.h>
#include "usb_lib.h"
#include "ch32v20x_spi.h"
/******************************************************************************/
/* Variable Definition */
__attribute__ ((aligned(4))) uint8_t CDROM_Pack_Buffer[DEF_CDROM_PACK_64];
/******************************************************************************/
/* INQUITY */
uint8_t CDROM_Inquity_Tab[ ] =
{
0x05, /* Peripheral Device CD-ROM = 0x05 */
0x80, /* Removable */
0x02, /* ISO/ECMA */
0x02,
0x1F, /* Additional Length */
0x00, /* Reserved */
0x00, /* Reserved */
0x00, /* Reserved */
'F', /* Vendor Information */
'l',
'a',
's',
'h',
' ',
' ',
' ',
'U',
'S',
'B',
' ',
'S',
'p',
'e',
'c',
'i',
'a',
'l',
' ',
'D',
'i',
's',
'k',
'2',
'.',
'D',
'0'
};
/******************************************************************************/
/* formatted capacity information */
uint8_t CDROM_Rd_Format_Capacity[ ] =
{
0x00,
0x00,
0x00,
0x08,
( MY_CDROM_SIZE >> 24 ) & 0xFF,
( MY_CDROM_SIZE >> 16 ) & 0xFF,
( MY_CDROM_SIZE >> 8 ) & 0xFF,
( MY_CDROM_SIZE ) & 0xFF,
0x02,
( DEF_CFG_DISK_SEC_SIZE >> 16 ) & 0xFF, /* Number of Blocks */
( DEF_CFG_DISK_SEC_SIZE >> 8 ) & 0xFF,
( DEF_CFG_DISK_SEC_SIZE ) & 0xFF,
};
/******************************************************************************/
/* capacity information */
uint8_t CDROM_Rd_Capacity[ ] =
{
( ( MY_CDROM_SIZE - 1 ) >> 24 ) & 0xFF,
( ( MY_CDROM_SIZE - 1 ) >> 16 ) & 0xFF,
( ( MY_CDROM_SIZE - 1 ) >> 8 ) & 0xFF,
( ( MY_CDROM_SIZE - 1 ) ) & 0xFF,
( DEF_CFG_DISK_SEC_SIZE >> 24 ) & 0xFF, /* Number of Blocks */
( DEF_CFG_DISK_SEC_SIZE >> 16 ) & 0xFF,
( DEF_CFG_DISK_SEC_SIZE >> 8 ) & 0xFF,
( DEF_CFG_DISK_SEC_SIZE ) & 0xFF,
};
/******************************************************************************/
/* MODE_SENSE data,For CMD 0X1A */
uint8_t CDROM_Mode_Sense_1A[ ] =
{
0x0B,
0x00,
0x00, /* 0x00:write-unprotected,0x80:write-protected */
0x08,
( ( MY_CDROM_SIZE - 1 ) >> 24 ) & 0xFF,
( ( MY_CDROM_SIZE - 1 ) >> 16 ) & 0xFF,
( ( MY_CDROM_SIZE - 1 ) >> 8 ) & 0xFF,
( ( MY_CDROM_SIZE - 1 ) ) & 0xFF,
( DEF_CFG_DISK_SEC_SIZE >> 24 ) & 0xFF, /* Number of Blocks */
( DEF_CFG_DISK_SEC_SIZE >> 16 ) & 0xFF,
( DEF_CFG_DISK_SEC_SIZE >> 8 ) & 0xFF,
( DEF_CFG_DISK_SEC_SIZE ) & 0xFF,
};
/******************************************************************************/
/* MODE_SENSE data,For CMD 0X5A */
uint8_t CDROM_Mode_Senese_5A[ ] =
{
0x00,
0x0E,
0x00,
0x00, /* 0x00:write-unprotected,0x80:write-protected */
0x00,
0x00,
0x00,
0x08,
( ( MY_CDROM_SIZE - 1 ) >> 24 ) & 0xFF,
( ( MY_CDROM_SIZE - 1 ) >> 16 ) & 0xFF,
( ( MY_CDROM_SIZE - 1 ) >> 8 ) & 0xFF,
( ( MY_CDROM_SIZE - 1 ) ) & 0xFF,
( DEF_CFG_DISK_SEC_SIZE >> 24 ) & 0xFF, /* Number of Blocks */
( DEF_CFG_DISK_SEC_SIZE >> 16 ) & 0xFF,
( DEF_CFG_DISK_SEC_SIZE >> 8 ) & 0xFF,
( DEF_CFG_DISK_SEC_SIZE ) & 0xFF,
};
/* command response ->0x46 */
uint8_t CDROM_CMD46_Ret[ 136 ] =
{
0x00, 0x00, 0x00, 0x84, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x03, 0x0C, 0x00, 0x08, 0x00, 0x00,
0x00, 0x09, 0x00, 0x00, 0x00, 0x0A, 0x01, 0x00, 0x00, 0x01, 0x03, 0x04, 0x00, 0x00, 0x00, 0x02,
0x00, 0x02, 0x03, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x03, 0x04, 0x2C, 0x00, 0x00, 0x00,
0x00, 0x10, 0x01, 0x08, 0x00, 0x00, 0x08, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x1D, 0x03, 0x00,
0x00, 0x1E, 0x05, 0x04, 0x03, 0x00, 0x00, 0x00, 0x00, 0x21, 0x01, 0x08, 0x00, 0x00, 0x00, 0x01,
0x07, 0x00, 0x00, 0x00, 0x00, 0x23, 0x01, 0x00, 0x00, 0x26, 0x00, 0x00, 0x00, 0x2D, 0x01, 0x04,
0x17, 0x00, 0x00, 0x00, 0x00, 0x2E, 0x01, 0x04, 0x2F, 0x00, 0x20, 0x00, 0x01, 0x00, 0x03, 0x00,
0x01, 0x03, 0x00, 0x04, 0x07, 0x00, 0x00, 0xFF, 0x01, 0x08, 0x03, 0x0C, 0x41, 0x41, 0x30, 0x31,
0x20, 0x30, 0x30, 0x38, 0x31, 0x39, 0x37, 0x20
};
/* command response ->0x4A */
uint8_t CDROM_CMD4A_00_Ret[ 4 ] =
{
/* Event Header Return Data */
0x00, 0x02, /* Event Data Length */
0x04, /* Returns Media Class events */
0x10 /* support Media Status Class Events */
};
uint8_t CDROM_CMD4A_10_Ret[ 8 ] =
{
0x00, 0x06, /* Event Header Return Data */
0x84, /* NEA=1 */
0x10,
0x00, 0x00, 0x00, 0x00 /* Media Event Descriptor */
};
/* command response ->0x43 */
uint8_t CDROM_CMD43_40_Ret[ 12 ] =
{
0x00,
0x0a, /* number of bytes below */
0x01, /*first track */
0x01, /* last track */
0x00, /* reserved */
0x14, /* (adr, control) */
0x01, /* (track being described) */
0x00, /* (reserved) */
0x00,
(uint8_t)( ( MY_CDROM_SIZE - 1 ) >>16 ),
(uint8_t)( ( MY_CDROM_SIZE - 1 ) >> 8 ),
(uint8_t)( MY_CDROM_SIZE - 1 ) /* (start logical block address 0) */
};
uint8_t CDROM_CMD43_00_Ret[ 20 ] =
{
0x00,
0x12, /* number of bytes below */
0x01, /* first track */
0x01, /* last track */
0x00, /* reserved */
0x14, /* (adr, control) */
0x01, /* (track being described) */
0x00, /* (reserved) */
0x00,
0x02,
0x00,
0x00,
0x00,
0x14,
0xaa,
0x00,
0x00,
(uint8_t)( ( MY_CDROM_SIZE - 1 ) >> 16 ),
(uint8_t)( ( MY_CDROM_SIZE - 1 ) >> 8 ),
(uint8_t)( MY_CDROM_SIZE - 1 ) /* (start logical block address 0) */
};
const uint8_t CDROM_CMD43_80_Ret[ 48 ] =
{
0x00, 0x2E, 0x01, 0x01, 0x01, 0x14, 0x00, 0xA0, 0x00, 0x00, 0x00, 0x00, 0x01, 0x20, 0x00, 0x01,
0x14, 0x00, 0xA1, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01, 0x14, 0x00, 0xA2, 0x00, 0x00,
0x00, 0x00, 0x01, 0x2F, 0x3D, 0x01, 0x14, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00
};
/******************************************************************************/
/* command response ->0x51 */
const uint8_t CDROM_CMD51_Ret[ 28 ] =
{
0x00, 0x20, 0x0e, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00
};
/******************************************************************************/
/* command response ->0x52 */
const uint8_t CDROM_CMD52_Ret[ 28 ] =
{
0x00, 0x1A, 0x01, 0x01, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1F, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1F, 0x00
};
const uint8_t CDROM_CMD5A_2A_Ret[ 28 ] =
{
0x00, 0x1a, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2a, 0x12, 0x07, 0x07, 0x70, 0x00, 0x28, 0x00,
0x56, 0xa0, 0x00, 0x00, 0x00, 0x00, 0x56, 0xa0, 0x00, 0x00, 0x00, 0x00
};
volatile uint8_t CDROM_Status = 0x00;
volatile uint8_t CDROM_Transfer_Status = 0x00;
volatile uint32_t CDROM_Capability = 0x00;
volatile uint8_t CDROM_CBW_Tag_Save[ 4 ];
volatile uint8_t CDROM_Sense_Key = 0x00;
volatile uint8_t CDROM_Sense_ASC = 0x00;
volatile uint8_t CDROM_CSW_Status = 0x00;
volatile uint32_t CDROM_Transfer_DataLen = 0x00;
volatile uint32_t CDROM_Cur_Sec_Lba = 0x00;
volatile uint16_t CDROM_Sec_Pack_Count = 0x00;
volatile uint16_t CDROM_Pack_Size = DEF_CDROM_PACK_64;
BULK_ONLY_CMD mBOC;
uint8_t *pEndp2_Buf;
/*******************************************************************************
* Function Name : CDROM_CMD_Deal_Ret_ErrorData
* Description :
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void CDROM_CMD_Deal_Ret_ErrorData()
{
uint16_t i;
/* Upload 60 bytes of all 0 data */
if( CDROM_Transfer_DataLen )
{
if( CDROM_Transfer_DataLen > 60 )
{
CDROM_Transfer_DataLen = 60;
}
for( i = 0x00; i < CDROM_Transfer_DataLen; i++ )
{
mBOC.buf[ i ] = 0x00;
}
pEndp2_Buf = mBOC.buf;
}
}
/*******************************************************************************
* Function Name : CDROM_CMD_Deal_Status
* Description : Current command execution status
* Input : key------Primary key for disk error details
* asc------Minor key for disk error details
* status---Current command execution result status
* Output : None
* Return : None
*******************************************************************************/
void CDROM_CMD_Deal_Status( uint8_t key, uint8_t asc, uint8_t status )
{
CDROM_Sense_Key = key;
CDROM_Sense_ASC = asc;
CDROM_CSW_Status = status;
}
/*******************************************************************************
* Function Name : CDROM_CMD_Deal_Fail
* Description : The current command failed to execute
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void CDROM_CMD_Deal_Fail( void )
{
if( CDROM_Transfer_Status & DEF_CDROM_BLUCK_UP_FLAG )
{
/* EP2 -> STALL */
SetEPTxStatus(ENDP2, EP_TX_STALL);
CDROM_Transfer_Status &= ~DEF_CDROM_BLUCK_DOWN_FLAG;
}
if( CDROM_Transfer_Status & DEF_CDROM_BLUCK_DOWN_FLAG )
{
/* EP3 -> STALL */
SetEPRxStatus(ENDP3, EP_RX_STALL);
CDROM_Transfer_Status &= ~DEF_CDROM_BLUCK_DOWN_FLAG;
}
}
/*******************************************************************************
* Function Name : CMD_RD_WR_Deal_Pre
* Description : Preparation before read and write sector processing
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void CMD_RD_WR_Deal_Pre( void )
{
/* Save the sector number to be operated currently */
CDROM_Cur_Sec_Lba = (uint32_t)mBOC.mCBW.mCBW_CB_Buf[ 2 ] << 24;
CDROM_Cur_Sec_Lba = CDROM_Cur_Sec_Lba + ( (uint32_t)mBOC.mCBW.mCBW_CB_Buf[ 3 ] << 16 );
CDROM_Cur_Sec_Lba = CDROM_Cur_Sec_Lba + ( (uint32_t)mBOC.mCBW.mCBW_CB_Buf[ 4 ] << 8 );
CDROM_Cur_Sec_Lba = CDROM_Cur_Sec_Lba + ( (uint32_t)mBOC.mCBW.mCBW_CB_Buf[ 5 ] );
/* Save the current length of data to be manipulated */
CDROM_Transfer_DataLen = ( (uint32_t)mBOC.mCBW.mCBW_CB_Buf[ 7 ] << 8 );
CDROM_Transfer_DataLen = CDROM_Transfer_DataLen + ( (uint32_t)mBOC.mCBW.mCBW_CB_Buf[ 8 ] );
CDROM_Transfer_DataLen = CDROM_Transfer_DataLen * DEF_CDROM_SECTOR_SIZE;
/* Clear related variables */
CDROM_Sec_Pack_Count = 0x00;
CDROM_CMD_Deal_Status( 0x00, 0x00, 0x00 );
}
/*******************************************************************************
* Function Name : CDROM_SCSI_CMD_Deal
* Description : dealing SCSI command
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void CDROM_SCSI_CMD_Deal( void )
{
uint8_t i;
if( ( mBOC.mCBW.mCBW_Sig[ 0 ] == 'U' ) && ( mBOC.mCBW.mCBW_Sig[ 1 ] == 'S' )
&&( mBOC.mCBW.mCBW_Sig[ 2 ] == 'B' ) && ( mBOC.mCBW.mCBW_Sig[ 3 ] == 'C' ) )
{
CDROM_CBW_Tag_Save[ 0 ] = mBOC.mCBW.mCBW_Tag[ 0 ];
CDROM_CBW_Tag_Save[ 1 ] = mBOC.mCBW.mCBW_Tag[ 1 ];
CDROM_CBW_Tag_Save[ 2 ] = mBOC.mCBW.mCBW_Tag[ 2 ];
CDROM_CBW_Tag_Save[ 3 ] = mBOC.mCBW.mCBW_Tag[ 3 ];
CDROM_Transfer_DataLen = ( uint32_t )mBOC.mCBW.mCBW_DataLen[ 3 ] << 24;
CDROM_Transfer_DataLen += ( ( uint32_t )mBOC.mCBW.mCBW_DataLen[ 2 ] << 16 );
CDROM_Transfer_DataLen += ( ( uint32_t )mBOC.mCBW.mCBW_DataLen[ 1 ] << 8 );
CDROM_Transfer_DataLen += ( ( uint32_t )mBOC.mCBW.mCBW_DataLen[ 0 ] );
if( CDROM_Transfer_DataLen )
{
if( mBOC.mCBW.mCBW_Flag & 0x80 )
{
CDROM_Transfer_Status |= DEF_CDROM_BLUCK_UP_FLAG;
}
else
{
CDROM_Transfer_Status |= DEF_CDROM_BLUCK_DOWN_FLAG;
}
}
CDROM_Transfer_Status |= DEF_CDROM_CSW_UP_FLAG;
/* SCSI command packet processing */
switch( mBOC.mCBW.mCBW_CB_Buf[ 0 ] )
{
case CMD_U_INQUIRY:
/* CMD: 0x12 */
if( CDROM_Transfer_DataLen > 0x24 )
{
CDROM_Transfer_DataLen = 0x24;
}
/* Add upload FLASH chip ID number */
CDROM_Inquity_Tab[ 32 ] = (uint8_t)( Flash_ID >> 24 );
CDROM_Inquity_Tab[ 33 ] = (uint8_t)( Flash_ID >> 16 );
CDROM_Inquity_Tab[ 34 ] = (uint8_t)( Flash_ID >> 8 );
CDROM_Inquity_Tab[ 35 ] = (uint8_t)( Flash_ID );
/* CD-ROM Mode */
CDROM_Inquity_Tab[ 0 ] = 0x05;
pEndp2_Buf = (uint8_t *)CDROM_Inquity_Tab;
CDROM_CMD_Deal_Status( 0x00, 0x00, 0x00 );
break;
case CMD_U_READ_FORMAT_CAPACITY:
/* CMD: 0x23 */
if( ( CDROM_Status & DEF_CDROM_EN_FLAG ) )
{
if( CDROM_Transfer_DataLen > 0x0C )
{
CDROM_Transfer_DataLen = 0x0C;
}
for( i = 0x00; i < CDROM_Transfer_DataLen; i++ )
{
mBOC.buf[ i ] = CDROM_Rd_Format_Capacity[ i ];
}
mBOC.buf[ 4 ] = ( ( CDROM_Capability >> 24 ) & 0xFF );
mBOC.buf[ 5 ] = ( ( CDROM_Capability >> 16 ) & 0xFF );
mBOC.buf[ 6 ] = ( ( CDROM_Capability >> 8 ) & 0xFF );
mBOC.buf[ 7 ] = ( ( CDROM_Capability ) & 0xFF );
pEndp2_Buf = mBOC.buf;
CDROM_CMD_Deal_Status( 0x00, 0x00, 0x00 );
}
else
{
CDROM_CMD_Deal_Status( 0x02, 0x3A, 0x01 );
CDROM_CMD_Deal_Fail( );
}
break;
case CMD_U_READ_CAPACITY:
/* CMD: 0x25 */
if( ( CDROM_Status & DEF_CDROM_EN_FLAG ) )
{
if( CDROM_Transfer_DataLen > 0x08 )
{
CDROM_Transfer_DataLen = 0x08;
}
for( i = 0x00; i < CDROM_Transfer_DataLen; i++ )
{
mBOC.buf[ i ] = CDROM_Rd_Capacity[ i ];
}
mBOC.buf[ 0 ] = ( ( CDROM_Capability - 1 ) >> 24 ) & 0xFF;
mBOC.buf[ 1 ] = ( ( CDROM_Capability - 1 ) >> 16 ) & 0xFF;
mBOC.buf[ 2 ] = ( ( CDROM_Capability - 1 ) >> 8 ) & 0xFF;
mBOC.buf[ 3 ] = ( ( CDROM_Capability - 1 ) ) & 0xFF;
pEndp2_Buf = mBOC.buf;
CDROM_CMD_Deal_Status( 0x00, 0x00, 0x00 );
}
else
{
CDROM_CMD_Deal_Status( 0x02, 0x3A, 0x01 );
CDROM_CMD_Deal_Fail( );
}
break;
case CMD_U_READ10:
/* CMD: 0x28 */
if( ( CDROM_Status & DEF_CDROM_EN_FLAG ) )
{
CMD_RD_WR_Deal_Pre( );
}
else
{
CDROM_CMD_Deal_Status( 0x02, 0x3A, 0x01 );
CDROM_CMD_Deal_Fail( );
}
break;
case CMD_U_WR_VERIFY10:
/* CMD: 0x2E */
case CMD_U_WRITE10:
/* CMD: 0x2A */
if( CDROM_Status & DEF_CDROM_EN_FLAG )
{
CMD_RD_WR_Deal_Pre( );
}
else
{
CDROM_CMD_Deal_Status( 0x02, 0x3A, 0x01 );
CDROM_CMD_Deal_Fail( );
}
break;
case CMD_U_MODE_SENSE:
/* CMD: 0x1A */
if( ( CDROM_Status & DEF_CDROM_EN_FLAG ) )
{
if( CDROM_Transfer_DataLen > 0x0C )
{
CDROM_Transfer_DataLen = 0x0C;
}
for( i = 0x00; i < CDROM_Transfer_DataLen; i++ )
{
mBOC.buf[ i ] = CDROM_Mode_Sense_1A[ i ];
}
mBOC.buf[ 4 ] = ( CDROM_Capability >> 24 ) & 0xFF;
mBOC.buf[ 5 ] = ( CDROM_Capability >> 16 ) & 0xFF;
mBOC.buf[ 6 ] = ( CDROM_Capability >> 8 ) & 0xFF;
mBOC.buf[ 7 ] = ( CDROM_Capability ) & 0xFF;
pEndp2_Buf = mBOC.buf;
}
else
{
CDROM_CMD_Deal_Status( 0x02, 0x3A, 0x01 );
CDROM_CMD_Deal_Fail( );
}
break;
case CMD_U_MODE_SENSE2:
/* CMD: 0x5A */
if( mBOC.mCBW.mCBW_CB_Buf[ 2 ] == 0x3F )
{
if( CDROM_Transfer_DataLen > 0x10 )
{
CDROM_Transfer_DataLen = 0x10;
}
for( i = 0x00; i < CDROM_Transfer_DataLen; i++ )
{
mBOC.buf[ i ] = CDROM_Mode_Senese_5A[ i ];
}
mBOC.buf[ 8 ] = ( CDROM_Capability >> 24 ) & 0xFF;
mBOC.buf[ 9 ] = ( CDROM_Capability >> 16 ) & 0xFF;
mBOC.buf[ 10 ] = ( CDROM_Capability >> 8 ) & 0xFF;
mBOC.buf[ 11 ] = ( CDROM_Capability ) & 0xFF;
pEndp2_Buf = mBOC.buf;
}
else if (mBOC.mCBW.mCBW_CB_Buf[ 2 ] == 0x2A)
{
if( CDROM_Transfer_DataLen > sizeof( CDROM_CMD5A_2A_Ret ) )
{
CDROM_Transfer_DataLen = sizeof( CDROM_CMD5A_2A_Ret );
}
for( i = 0x00; i < CDROM_Transfer_DataLen; i++ )
{
mBOC.buf[ i ] = CDROM_CMD5A_2A_Ret[ i ];
}
pEndp2_Buf = mBOC.buf;
}
else
{
CDROM_CMD_Deal_Status( 0x05, 0x20, 0x01 );
CDROM_CMD_Deal_Fail( );
}
break;
case CMD_U_REQUEST_SENSE:
/* CMD: 0x03 */
mBOC.ReqSense.ErrorCode = 0x70;
mBOC.ReqSense.Reserved1 = 0x00;
mBOC.ReqSense.SenseKey = CDROM_Sense_Key;
mBOC.ReqSense.Information[ 0 ] = 0x00;
mBOC.ReqSense.Information[ 1 ] = 0x00;
mBOC.ReqSense.Information[ 2 ] = 0x00;
mBOC.ReqSense.Information[ 3 ] = 0x00;
mBOC.ReqSense.SenseLength = 0x0A;
mBOC.ReqSense.Reserved2[ 0 ] = 0x00;
mBOC.ReqSense.Reserved2[ 1 ] = 0x00;
mBOC.ReqSense.Reserved2[ 2 ] = 0x00;
mBOC.ReqSense.Reserved2[ 3 ] = 0x00;
mBOC.ReqSense.SenseCode = CDROM_Sense_ASC;
mBOC.ReqSense.SenseCodeQua = 0x00;
mBOC.ReqSense.Reserved3[ 0 ] = 0x00;
mBOC.ReqSense.Reserved3[ 1 ] = 0x00;
mBOC.ReqSense.Reserved3[ 2 ] = 0x00;
mBOC.ReqSense.Reserved3[ 3 ] = 0x00;
pEndp2_Buf = mBOC.buf;
CDROM_CSW_Status = 0x00;
break;
case CMD_U_TEST_READY:
if( CDROM_Status & DEF_CDROM_EN_FLAG )
{
CDROM_CMD_Deal_Status( 0x00, 0x00, 0x00 );
}
else
{
CDROM_CMD_Deal_Status( 0x02, 0x3A, 0x01 );
CDROM_Transfer_Status |= DEF_CDROM_BLUCK_UP_FLAG;
CDROM_CMD_Deal_Fail( );
}
break;
case CMD_U_PREVT_REMOVE:
/* CMD: 0x1E */
CDROM_CMD_Deal_Status( 0x00, 0x00, 0x00 );
break;
case CMD_U_VERIFY10:
/* CMD: 0x1F */
CDROM_CMD_Deal_Status( 0x00, 0x00, 0x00 );
break;
case CMD_U_START_STOP:
/* CMD: 0x1B */
CDROM_CMD_Deal_Status( 0x00, 0x00, 0x00 );
break;
case 0x46:
if( CDROM_Transfer_DataLen > sizeof( CDROM_CMD46_Ret ) )
{
CDROM_Transfer_DataLen = sizeof( CDROM_CMD46_Ret );
}
pEndp2_Buf = (uint8_t *)CDROM_CMD46_Ret;
CDROM_CMD_Deal_Status( 0x00, 0x00, 0x00 ); /* Disk command executed successfully */
break;
case 0x4A:
if( mBOC.mCBW.mCBW_CB_Buf[ 4 ] == 0x00 )
{
if( CDROM_Transfer_DataLen > sizeof( CDROM_CMD4A_00_Ret ) )
{
CDROM_Transfer_DataLen = sizeof( CDROM_CMD4A_00_Ret );
}
pEndp2_Buf = (uint8_t *)CDROM_CMD4A_00_Ret;
CDROM_CMD_Deal_Status( 0x00, 0x00, 0x00 ); /* Disk command executed successfully */
}
else if( mBOC.mCBW.mCBW_CB_Buf[ 4 ] == 0x10 )
{
if( CDROM_Transfer_DataLen > sizeof( CDROM_CMD4A_10_Ret ) )
{
CDROM_Transfer_DataLen = sizeof( CDROM_CMD4A_10_Ret );
}
pEndp2_Buf = (uint8_t *)CDROM_CMD4A_10_Ret;
CDROM_CMD_Deal_Status( 0x00, 0x00, 0x00 ); /* Disk command executed successfully */
}
else
{
CDROM_CMD_Deal_Ret_ErrorData( ); /* return invalid data */
CDROM_CMD_Deal_Status( 0x05, 0x20, 0x01 ); /* report parameter error */
CDROM_CMD_Deal_Fail( ); /* Disk command execution failed */
}
break;
case 0x43:
if( mBOC.mCBW.mCBW_CB_Buf[ 9 ] == 0x40 )
{
if( CDROM_Transfer_DataLen > sizeof( CDROM_CMD43_40_Ret ) )
{
CDROM_Transfer_DataLen = sizeof( CDROM_CMD43_40_Ret );
}
CDROM_CMD43_40_Ret[9] = (uint8_t)( ( CDROM_Capability - 1) >>16 );
CDROM_CMD43_40_Ret[10] = (uint8_t)( ( CDROM_Capability - 1 ) >>8 );
CDROM_CMD43_40_Ret[11] = (uint8_t)( CDROM_Capability - 1);
pEndp2_Buf = (uint8_t *)CDROM_CMD43_40_Ret;
CDROM_CMD_Deal_Status( 0x00, 0x00, 0x00 ); /* Disk command executed successfully */
}
else if( mBOC.mCBW.mCBW_CB_Buf[ 9 ] == 0x00 )
{
if( CDROM_Transfer_DataLen > sizeof( CDROM_CMD43_00_Ret ) )
{
CDROM_Transfer_DataLen = sizeof( CDROM_CMD43_00_Ret );
}
CDROM_CMD43_00_Ret[17] = (uint8_t)( ( CDROM_Capability - 1) >>16 );
CDROM_CMD43_00_Ret[18] = (uint8_t)( ( CDROM_Capability - 1) >>8 );
CDROM_CMD43_00_Ret[19] = (uint8_t)( CDROM_Capability - 1);
pEndp2_Buf = (uint8_t *)CDROM_CMD43_00_Ret;
CDROM_CMD_Deal_Status( 0x00, 0x00, 0x00 ); /* Disk command executed successfully */
}
else if( mBOC.mCBW.mCBW_CB_Buf[ 9 ] == 0x80 )
{
if( CDROM_Transfer_DataLen > sizeof( CDROM_CMD43_80_Ret ) )
{
CDROM_Transfer_DataLen = sizeof( CDROM_CMD43_80_Ret );
}
pEndp2_Buf = (uint8_t *)CDROM_CMD43_80_Ret;
CDROM_CMD_Deal_Status( 0x00, 0x00, 0x00 ); /* Disk command executed successfully */
}
else
{
CDROM_CMD_Deal_Ret_ErrorData( ); /* return invalid data */
CDROM_CMD_Deal_Status( 0x05, 0x20, 0x01 ); /* report parameter error */
CDROM_CMD_Deal_Fail( ); /* Disk command execution failed */
}
break;
case 0xBB:
CDROM_CMD_Deal_Status( 0x00, 0x00, 0x00 ); /* Disk command executed successfully */
break;
case 0x51:
if( CDROM_Transfer_DataLen > sizeof( CDROM_CMD51_Ret ) )
{
CDROM_Transfer_DataLen = sizeof( CDROM_CMD51_Ret );
}
pEndp2_Buf = (uint8_t *)CDROM_CMD51_Ret;
CDROM_CMD_Deal_Status( 0x00, 0x00, 0x00 ); /* Disk command executed successfully */
break;
case 0x52:
if( CDROM_Transfer_DataLen > sizeof( CDROM_CMD52_Ret ) )
{
CDROM_Transfer_DataLen = sizeof( CDROM_CMD52_Ret );
}
pEndp2_Buf = (uint8_t *)CDROM_CMD52_Ret;
CDROM_CMD_Deal_Status( 0x00, 0x00, 0x00 ); /* Disk command executed successfully */
break;
case 0xAC:
case 0x85:
CDROM_CMD_Deal_Ret_ErrorData( );
CDROM_CMD_Deal_Status( 0x05, 0x20, 0x01 ); /* report parameter error */
break;
default:
CDROM_CMD_Deal_Status( 0x05, 0x20, 0x01 );
CDROM_Transfer_Status |= DEF_CDROM_BLUCK_UP_FLAG;
CDROM_CMD_Deal_Fail( );
break;
}
}
else
{ /* Bad package flag for CBW package */
CDROM_CMD_Deal_Status( 0x05, 0x20, 0x02 );
CDROM_Transfer_Status |= DEF_CDROM_BLUCK_UP_FLAG;
CDROM_Transfer_Status |= DEF_CDROM_BLUCK_DOWN_FLAG;
CDROM_CMD_Deal_Fail( );
}
}
/*******************************************************************************
* Function Name : CDROM_In_EP_Deal
* Description : Upload endpoint handling
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void CDROM_In_EP_Deal( void )
{
if( CDROM_Transfer_Status & DEF_CDROM_BLUCK_UP_FLAG )
{
if( mBOC.mCBW.mCBW_CB_Buf[ 0 ] == CMD_U_READ10 )
{
CDROM_Up_OnePack( );
}
else
{
CDROM_Bulk_UpData( );
}
}
else if( CDROM_Transfer_Status & DEF_CDROM_CSW_UP_FLAG )
{
CDROM_Up_CSW( );
}
}
/*******************************************************************************
* Function Name : CDROM_Out_EP_Deal
* Description : Download endpoint processing
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void CDROM_Out_EP_Deal( uint8_t *pbuf, uint16_t packlen )
{
uint32_t i;
/* Endpoint 2 download data processing */
if( CDROM_Transfer_Status & DEF_CDROM_BLUCK_DOWN_FLAG )
{
CDROM_Down_OnePack( pbuf, packlen );
}
else
{
if( packlen == 0x1F )
{
for( i = 0; i < packlen; i++ )
{
mBOC.buf[ i ] = *pbuf++;
}
CDROM_SCSI_CMD_Deal( );
if( ( CDROM_Transfer_Status & DEF_CDROM_BLUCK_DOWN_FLAG ) == 0x00 )
{
if( CDROM_Transfer_Status & DEF_CDROM_BLUCK_UP_FLAG )
{
if( mBOC.mCBW.mCBW_CB_Buf[ 0 ] == CMD_U_READ10 )
{
CDROM_Up_OnePack( );
}
else
{
CDROM_Bulk_UpData( );
}
}
else if( CDROM_CSW_Status == 0x00 )
{
/* upload CSW */
CDROM_Up_CSW( );
}
}
}
}
}
/*******************************************************************************
* Function Name : CDROM_Bulk_UpData
* Description : EP2 upload data
* Input : Transfer_DataLen--- length of data transferred
* *pBuf---data address pointer
* Output : None
* Return : None
*******************************************************************************/
void CDROM_Bulk_UpData( void )
{
uint32_t len;
if( CDROM_Transfer_DataLen > CDROM_Pack_Size )
{
len = CDROM_Pack_Size;
CDROM_Transfer_DataLen -= CDROM_Pack_Size;
}
else
{
len = CDROM_Transfer_DataLen;
CDROM_Transfer_DataLen = 0x00;
CDROM_Transfer_Status &= ~DEF_CDROM_BLUCK_UP_FLAG;
}
/* Load the data into the upload buffer and start the upload */
USB_SIL_Write( EP2_IN, pEndp2_Buf, len );
SetEPTxStatus( ENDP2, EP_TX_VALID );
}
/*******************************************************************************
* Function Name : CDROM_Up_CSW
* Description : Bulk endpoint endpoint 2 upload CSW package
* Input : CBW_Tag_Save---command block label
* CSW_Status---Current command execution result status
* Output : None
* Return : None
*******************************************************************************/
void CDROM_Up_CSW( void )
{
CDROM_Transfer_Status = 0x00;
mBOC.mCSW.mCSW_Sig[ 0 ] = 'U';
mBOC.mCSW.mCSW_Sig[ 1 ] = 'S';
mBOC.mCSW.mCSW_Sig[ 2 ] = 'B';
mBOC.mCSW.mCSW_Sig[ 3 ] = 'S';
mBOC.mCSW.mCSW_Tag[ 0 ] = CDROM_CBW_Tag_Save[ 0 ];
mBOC.mCSW.mCSW_Tag[ 1 ] = CDROM_CBW_Tag_Save[ 1 ];
mBOC.mCSW.mCSW_Tag[ 2 ] = CDROM_CBW_Tag_Save[ 2 ];
mBOC.mCSW.mCSW_Tag[ 3 ] = CDROM_CBW_Tag_Save[ 3 ];
mBOC.mCSW.mCSW_Residue[ 0 ] = 0x00;
mBOC.mCSW.mCSW_Residue[ 1 ] = 0x00;
mBOC.mCSW.mCSW_Residue[ 2 ] = 0x00;
mBOC.mCSW.mCSW_Residue[ 3 ] = 0x00;
mBOC.mCSW.mCSW_Status = CDROM_CSW_Status;
/* Load the data into the upload buffer and start the upload */
USB_SIL_Write( EP2_IN, (uint8_t *)mBOC.buf, 0x0D );
SetEPTxStatus( ENDP2, EP_TX_VALID );
}
/*******************************************************************************
* Function Name : CDROM_Up_OnePack
* Description : CD-ROM upload a pack
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void CDROM_Up_OnePack( void )
{
uint8_t *pbuf = NULL;
if( CDROM_Sec_Pack_Count == 0x00 )
{
FLASH_RD_Block_Start( CDROM_Cur_Sec_Lba * DEF_CDROM_SECTOR_SIZE );
}
FLASH_RD_Block( CDROM_Pack_Buffer, CDROM_Pack_Size );
pbuf = CDROM_Pack_Buffer;
/* USB upload this package data */
USB_SIL_Write( EP2_IN, pbuf, CDROM_Pack_Size );
SetEPTxStatus( ENDP2, EP_TX_VALID );
/* Determine whether the current sector data is read and uploaded */
CDROM_Sec_Pack_Count++;
CDROM_Transfer_DataLen -= CDROM_Pack_Size;
if( CDROM_Sec_Pack_Count == ( DEF_CDROM_SECTOR_SIZE / CDROM_Pack_Size ) )
{
PIN_FLASH_CS_HIGH( );
CDROM_Sec_Pack_Count = 0x00;
CDROM_Cur_Sec_Lba++;
}
/* Determine whether the current sector data is read and uploaded */
if( CDROM_Transfer_DataLen == 0x00 )
{
CDROM_Transfer_Status &= ~DEF_CDROM_BLUCK_UP_FLAG;
}
}
/*******************************************************************************
* Function Name : CDROM_Down_OnePack
* Description : Do nothing, cause CD-ROM Mode is read-only.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void CDROM_Down_OnePack( uint8_t *pbuf, uint16_t packlen )
{
// CD-ROM Mode is read-only
return;
}
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/SW_CDROM.h
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/********************************** (C) COPYRIGHT *******************************
* File Name : SW_CDROM.h
* Author : WCH
* Version : V1.0.0
* Date : 2022/08/08
* Description : header file for SW_CDROM.c
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifdef __cplusplus
extern "C" {
#endif
#include "stdio.h"
#include "stdlib.h"
#include <stdint.h>
/******************************************************************************/
/* BulkOnly Mass Storage Class requst */
#define CMD_CDROM_RESET 0xFF
#define CMD_CDROM_GET_MAX_LUN 0xFE
/******************************************************************************/
/* USB Mass Storage Class SCSI Command */
#define CMD_U_TEST_READY 0x00
#define CMD_U_REZERO_UNIT 0x01
#define CMD_U_REQUEST_SENSE 0x03
#define CMD_U_FORMAT_UNIT 0x04
#define CMD_U_INQUIRY 0x12
#define CMD_U_MODE_SELECT 0x15
#define CMD_U_RELEASE 0x17
#define CMD_U_MODE_SENSE 0x1A
#define CMD_U_START_STOP 0x1B
#define CMD_U_SEND_DIAG 0x1D
#define CMD_U_PREVT_REMOVE 0x1E
#define CMD_U_READ_FORMAT_CAPACITY 0x23
#define CMD_U_READ_CAPACITY 0x25
#define CMD_U_READ10 0x28
#define CMD_U_WRITE10 0x2A
#define CMD_U_SEEK10 0x2B
#define CMD_U_WR_VERIFY10 0x2E
#define CMD_U_VERIFY10 0x2F
#define CMD_U_SYNC_CACHE 0x35
#define CMD_U_READ_TOC 0x43
#define CMD_U_MODE_SENSE2 0x5A
#define CMD_U_READ12 0xA8
#define CMD_U_WRITE12 0xAA
/******************************************************************************/
#define MY_CDROM_SIZE 0x00000040
/******************************************************************************/
#define DEF_DEBUG_PRINTF 1
#define DEF_CFG_DISK_SEC_SIZE 512 /* Disk sector size */
#define DEF_FLASH_SECTOR_SIZE 4096 /* flash sector size */
#define DEF_CDROM_SECTOR_SIZE DEF_CFG_DISK_SEC_SIZE /* CDROM sector size */
#define DEF_CDROM_PACK_512 512
#define DEF_CDROM_PACK_64 64
/******************************************************************************/
/* Current cd-rom status related macro definition */
#define DEF_CDROM_EN_FLAG 0x01
/******************************************************************************/
/* Current cd-rom transfer status related macro definitions */
#define DEF_CDROM_BLUCK_UP_FLAG 0x01
#define DEF_CDROM_BLUCK_DOWN_FLAG 0x02
#define DEF_CDROM_CSW_UP_FLAG 0x04
/******************************************************************************/
/* BulkOnly */
typedef union _BULK_ONLY_CMD
{
uint8_t buf[ 31 ];
struct
{
uint8_t mCBW_Sig[ 4 ];
uint8_t mCBW_Tag[ 4 ];
uint8_t mCBW_DataLen[ 4 ];
uint8_t mCBW_Flag;
uint8_t mCBW_LUN;
uint8_t mCBW_CB_Len;
uint8_t mCBW_CB_Buf[ 16 ];
} mCBW;
struct
{
uint8_t mCSW_Sig[ 4 ];
uint8_t mCSW_Tag[ 4 ];
uint8_t mCSW_Residue[ 4 ];
uint8_t mCSW_Status;
} mCSW;
struct
{
uint8_t ErrorCode;
uint8_t Reserved1;
uint8_t SenseKey;
uint8_t Information[ 4 ];
uint8_t SenseLength;
uint8_t Reserved2[ 4 ];
uint8_t SenseCode;
uint8_t SenseCodeQua;
uint8_t Reserved3[ 4 ];
}ReqSense;
} BULK_ONLY_CMD;
/******************************************************************************/
/* Variable Definition */
extern volatile uint8_t CDROM_CBW_Tag_Save[ 4 ];
extern volatile uint8_t CDROM_Sense_Key;
extern volatile uint8_t CDROM_Sense_ASC;
extern volatile uint8_t CDROM_CSW_Status;
extern volatile uint32_t CDROM_Transfer_DataLen;
extern volatile uint32_t CDROM_Cur_Sec_Lba;
extern volatile uint16_t CDROM_Sec_Pack_Count;
extern volatile uint16_t CDROM_Pack_Size;
extern BULK_ONLY_CMD mBOC;
extern volatile uint8_t CDROM_Status;
extern volatile uint8_t CDROM_Transfer_Status;
extern volatile uint32_t CDROM_Capability;
extern uint8_t CDROM_Inquity_Tab[ ];
extern uint8_t CDROM_Rd_Format_Capacity[ ];
extern uint8_t CDROM_Rd_Capacity[ ];
extern uint8_t CDROM_Mode_Sense_1A[ ];
extern uint8_t CDROM_Mode_Senese_5A[ ];
/******************************************************************************/
/* external functions */
extern void CDROM_CMD_Deal_Status( uint8_t key, uint8_t asc, uint8_t status );
extern void CDROM_CMD_Deal_Fail( void );
extern void CDROM_SCSI_CMD_Deal( void );
extern void CDROM_Bulk_UpData( void );
extern void CDROM_Up_CSW( void );
extern void CDROM_Up_OnePack( void );
extern void CDROM_Out_EP_Deal( uint8_t *pbuf, uint16_t packlen );
extern void CDROM_In_EP_Deal( void );
extern void CDROM_Down_OnePack( uint8_t *pbuf, uint16_t packlen );
#ifdef __cplusplus
}
#endif
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/USBLIB/CONFIG/hw_config.c
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/********************************** (C) COPYRIGHT *******************************
* File Name : hw_config.c
* Author : WCH
* Version : V1.0.0
* Date : 2021/08/08
* Description : USB configuration file.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "usb_lib.h"
#include "usb_prop.h"
#include "usb_desc.h"
#include "usb_istr.h"
#include "hw_config.h"
#include "usb_pwr.h"
#include "string.h"
#include "stdarg.h"
#include "stdio.h"
void USBWakeUp_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void USB_LP_CAN1_RX0_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
/*******************************************************************************
* @fn USBWakeUp_IRQHandler
*
* @brief This function handles USB wake up exception.
*
* @return None
*/
void USBWakeUp_IRQHandler(void)
{
EXTI_ClearITPendingBit(EXTI_Line18);
}
/*******************************************************************************
* @fn USB_LP_CAN1_RX0_IRQHandler
*
* @brief This function handles USB exception.
*
* @return None
*/
void USB_LP_CAN1_RX0_IRQHandler(void)
{
USB_Istr();
}
/*******************************************************************************
* @fn Set_USBConfig
*
* @brief Set_USBConfig .
*
* @return None
*/
void Set_USBConfig( )
{
if( SystemCoreClock == 144000000 )
{
RCC_USBCLKConfig( RCC_USBCLKSource_PLLCLK_Div3 );
}
else if( SystemCoreClock == 96000000 )
{
RCC_USBCLKConfig( RCC_USBCLKSource_PLLCLK_Div2 );
}
else if( SystemCoreClock == 48000000 )
{
RCC_USBCLKConfig( RCC_USBCLKSource_PLLCLK_Div1 );
}
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USB, ENABLE);
}
/*******************************************************************************
* @fn Enter_LowPowerMode
*
* @brief Enter low power mode.
*
* @return None
*/
void Enter_LowPowerMode(void)
{
printf("usb enter low power mode\r\n");
bDeviceState=SUSPENDED;
}
/*******************************************************************************
* @fn Leave_LowPowerMode
*
* @brief Leave low power mode.
*
* @return None
*/
void Leave_LowPowerMode(void)
{
DEVICE_INFO *pInfo=&Device_Info;
printf("usb leave low power mode\r\n");
if (pInfo->Current_Configuration!=0)bDeviceState=CONFIGURED;
else bDeviceState = ATTACHED;
}
/*******************************************************************************
* @fn USB_Interrupts_Config
*
* @brief Configrate USB interrupt.
*
* @return None
*/
void USB_Interrupts_Config(void)
{
NVIC_InitTypeDef NVIC_InitStructure;
EXTI_InitTypeDef EXTI_InitStructure;
EXTI_ClearITPendingBit(EXTI_Line18);
EXTI_InitStructure.EXTI_Line = EXTI_Line18;
EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising_Falling;
EXTI_InitStructure.EXTI_LineCmd = ENABLE;
EXTI_Init(&EXTI_InitStructure);
NVIC_InitStructure.NVIC_IRQChannel = USB_LP_CAN1_RX0_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
NVIC_InitStructure.NVIC_IRQChannel = USBWakeUp_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_Init(&NVIC_InitStructure);
}
/*******************************************************************************
* @fn USB_Port_Set
*
* @brief Set USB IO port.
*
* @param NewState: DISABLE or ENABLE.
* Pin_In_IPU: Enables or Disables intenal pull-up resistance.
*
* @return None
*/
void USB_Port_Set(FunctionalState NewState, FunctionalState Pin_In_IPU)
{
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
if(NewState) {
_SetCNTR(_GetCNTR()&(~(1<<1)));
GPIOA->CFGHR&=0XFFF00FFF;
GPIOA->OUTDR&=~(3<<11); //PA11/12=0
GPIOA->CFGHR|=0X00044000; //float
}
else
{
_SetCNTR(_GetCNTR()|(1<<1));
GPIOA->CFGHR&=0XFFF00FFF;
GPIOA->OUTDR&=~(3<<11); //PA11/12=0
GPIOA->CFGHR|=0X00033000; // LOW
}
if(Pin_In_IPU) (EXTEN->EXTEN_CTR) |= EXTEN_USBD_PU_EN;
else (EXTEN->EXTEN_CTR) &= ~EXTEN_USBD_PU_EN;
}
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/USBLIB/CONFIG/hw_config.h
+38
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/********************************** (C) COPYRIGHT *******************************
* File Name : hw_config.h
* Author : WCH
* Version : V1.0.0
* Date : 2021/08/08
* Description : Configuration file for USB.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __HW_CONFIG_H
#define __HW_CONFIG_H
#include "usb_type.h"
#ifdef DEBUG
#define printf_usb(X...) printf(X)
#else
#define printf_usb(X...)
#endif
void Set_USBConfig(void);
void Enter_LowPowerMode(void);
void Leave_LowPowerMode(void);
void USB_Interrupts_Config(void);
void USB_Port_Set(FunctionalState NewState, FunctionalState Pin_In_IPU);
#endif /* __HW_CONFIG_H */
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/USBLIB/CONFIG/usb_conf.h
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/********************************** (C) COPYRIGHT *******************************
* File Name : usb_conf.h
* Author : WCH
* Version : V1.0.0
* Date : 2021/08/08
* Description : This file contains all the functions prototypes for the
* USB configration firmware library.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __USB_CONF_H
#define __USB_CONF_H
#define EP_NUM (4)
/* Buffer Description Table */
/* buffer table base address */
/* buffer table base address */
#define BTABLE_ADDRESS (0x00)
/* EP0 */
/* rx/tx buffer base address */
#define ENDP0_RXADDR (0x40)
#define ENDP0_TXADDR (0x80)
/* EP1 */
/* tx buffer base address */
#define ENDP2_TXADDR (0xC0)
#define ENDP3_RXADDR (ENDP2_TXADDR + 0x40)
/* ISTR events */
/* IMR_MSK */
/* mask defining which events has to be handled */
/* by the device application software */
#define IMR_MSK (CNTR_CTRM | CNTR_WKUPM | CNTR_SUSPM | CNTR_ERRM | CNTR_SOFM \
| CNTR_ESOFM | CNTR_RESETM )
/* #define CTR_CALLBACK */
/* #define DOVR_CALLBACK */
/* #define ERR_CALLBACK */
/* #define WKUP_CALLBACK */
/* #define SUSP_CALLBACK */
/* #define RESET_CALLBAC K*/
/* #define SOF_CALLBACK */
/* #define ESOF_CALLBACK */
/* CTR service routines */
/* associated to defined endpoints */
#define EP1_IN_Callback NOP_Process
//#define EP2_IN_Callback NOP_Process
#define EP3_IN_Callback NOP_Process
#define EP4_IN_Callback NOP_Process
#define EP5_IN_Callback NOP_Process
#define EP6_IN_Callback NOP_Process
#define EP7_IN_Callback NOP_Process
#define EP1_OUT_Callback NOP_Process
#define EP2_OUT_Callback NOP_Process
//#define EP3_OUT_Callback NOP_Process
#define EP4_OUT_Callback NOP_Process
#define EP5_OUT_Callback NOP_Process
#define EP6_OUT_Callback NOP_Process
#define EP7_OUT_Callback NOP_Process
#endif /* __USB_CONF_H */
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/USBLIB/CONFIG/usb_desc.c
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/********************************** (C) COPYRIGHT *******************************
* File Name : usb_desc.c
* Author : WCH
* Version : V1.0.0
* Date : 2022/11/25
* Description : USB Descriptors.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "usb_lib.h"
#include "usb_desc.h"
/* USB Device Descriptors */
const uint8_t USBD_DeviceDescriptor[] =
{
0x12, // bLength
0x01, // bDescriptorType (Device)
0x00, 0x02, // bcdUSB 2.00
0x00, // bDeviceClass (Use class information in the Interface Descriptors)
0x00, // bDeviceSubClass
0x00, // bDeviceProtocol
0x40, // bMaxPacketSize0 64
0x86, 0x1A, // idVendor 0x1A86
0x11, 0xFE, // idProduct 0xFE11
DEF_PROG_VERSION, 0x00, // bcdDevice 0.00
0x01, // iManufacturer (String Index)
0x02, // iProduct (String Index)
0x00, // iSerialNumber (String Index)
0x01, // bNumConfigurations 1
};
/* USB Configration Descriptors */
const uint8_t USBD_ConfigDescriptor[] =
{
/* Configuration Descriptor */
0x09, // bLength
0x02, // bDescriptorType (Configuration)
0x20, 0x00, // wTotalLength 32
0x01, // bNumInterfaces 1
0x01, // bConfigurationValue
0x00, // iConfiguration (String Index)
0x80, // bmAttributes
0x32, // bMaxPower 100mA
/*****************************************************************/
/* Interface Descriptor(CDROM) */
0x09, // bLength
0x04, // bDescriptorType (Interface)
0x00, // bInterfaceNumber 0
0x00, // bAlternateSetting
0x02, // bNumEndpoints 2
0x08, // bInterfaceClass
0x06, // bInterfaceSubClass
0x50, // bInterfaceProtocol
0x00, // iInterface (String Index)
/* Endpoint Descriptor */
0x07, // bLength
0x05, // bDescriptorType (Endpoint)
0x82, // bEndpointAddress (IN/D2H)
0x02, // bmAttributes (Bulk)
0x40, 0x00, // wMaxPacketSize 64
0x00, // bInterval 0 (unit depends on device speed)
/* Endpoint Descriptor */
0x07, // bLength
0x05, // bDescriptorType (Endpoint)
0x03, // bEndpointAddress (OUT/H2D)
0x02, // bmAttributes (Bulk)
0x40, 0x00, // wMaxPacketSize 64
0x00, // bInterval 0 (unit depends on device speed)
};
/* USB String Descriptors */
const uint8_t USBD_StringLangID[USBD_SIZE_STRING_LANGID] = {
USBD_SIZE_STRING_LANGID,
USB_STRING_DESCRIPTOR_TYPE,
0x09,
0x04
};
/* USB Device String Vendor */
const uint8_t USBD_StringVendor[USBD_SIZE_STRING_VENDOR] = {
USBD_SIZE_STRING_VENDOR,
USB_STRING_DESCRIPTOR_TYPE,
'w',0,'c',0,'h',0,'.',0,'c',0,'n',0
};
/* USB Device String Product */
const uint8_t USBD_StringProduct[USBD_SIZE_STRING_PRODUCT] = {
USBD_SIZE_STRING_PRODUCT,
USB_STRING_DESCRIPTOR_TYPE,
'C',0,'H',0,'2',0,'0',0,'x',0,'C',0,'D',0,'-',0,'R',0,'O',0,'M',0,
};
/* USB Device String Serial */
const uint8_t USBD_StringSerial[USBD_SIZE_STRING_SERIAL] = {
USBD_SIZE_STRING_SERIAL,
USB_STRING_DESCRIPTOR_TYPE,
'W', 0, 'C', 0, 'H', 0, '3', 0, '2', 0
};
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/USBLIB/CONFIG/usb_desc.h
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/********************************** (C) COPYRIGHT *******************************
* File Name : usb_desc.h
* Author : WCH
* Version : V1.0.0
* Date : 2021/08/08
* Description : This file contains all the functions prototypes for the
* USB description firmware library.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __USB_DESC_H
#define __USB_DESC_H
#ifdef __cplusplus
extern "C" {
#endif
#include "ch32v20x.h"
#define DEF_PROG_VERSION 0x01
#define USB_DEVICE_DESCRIPTOR_TYPE 0x01
#define USB_CONFIGURATION_DESCRIPTOR_TYPE 0x02
#define USB_STRING_DESCRIPTOR_TYPE 0x03
#define USB_INTERFACE_DESCRIPTOR_TYPE 0x04
#define USB_ENDPOINT_DESCRIPTOR_TYPE 0x05
#define DEF_USBD_UEP0_SIZE 64
#define DEF_USBD_MAX_PACK_SIZE 64
#define USBD_SIZE_DEVICE_DESC 18
#define USBD_SIZE_CONFIG_DESC 32
#define USBD_SIZE_STRING_LANGID 4
#define USBD_SIZE_STRING_VENDOR 14
#define USBD_SIZE_STRING_PRODUCT 24
#define USBD_SIZE_STRING_SERIAL 26
extern const uint8_t USBD_DeviceDescriptor[USBD_SIZE_DEVICE_DESC];
extern const uint8_t USBD_ConfigDescriptor[USBD_SIZE_CONFIG_DESC];
extern const uint8_t USBD_StringLangID [USBD_SIZE_STRING_LANGID];
extern const uint8_t USBD_StringVendor [USBD_SIZE_STRING_VENDOR];
extern const uint8_t USBD_StringProduct[USBD_SIZE_STRING_PRODUCT];
extern const uint8_t USBD_StringSerial [USBD_SIZE_STRING_SERIAL];
#ifdef __cplusplus
}
#endif
#endif /* __USB_DESC_H */
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/USBLIB/CONFIG/usb_endp.c
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/********************************** (C) COPYRIGHT *******************************
* File Name : usb_endp.c
* Author : WCH
* Version : V1.0.0
* Date : 2021/08/08
* Description : Endpoint routines
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include <SW_CDROM.h>
#include "usb_lib.h"
#include "usb_desc.h"
#include "usb_mem.h"
#include "hw_config.h"
#include "usb_istr.h"
#include "usb_pwr.h"
#include "usb_prop.h"
uint16_t USB_Rx_Cnt = 0;
__attribute__ ((aligned(4))) uint8_t CDROM_EP3_Pack_Buffer[DEF_CDROM_PACK_64];
/*********************************************************************
* @fn EP2_IN_Callback
*
* @brief Endpoint 2 IN.
*
* @return none
*/
void EP2_IN_Callback (void)
{
CDROM_In_EP_Deal( );
}
/*********************************************************************
* @fn EP3_OUT_Callback
*
* @brief Endpoint 3 OUT.
*
* @return none
*/
void EP3_OUT_Callback (void)
{
USB_Rx_Cnt = USB_SIL_Read(ENDP3, CDROM_EP3_Pack_Buffer);
CDROM_Out_EP_Deal( CDROM_EP3_Pack_Buffer, USB_Rx_Cnt );
SetEPRxValid(ENDP3);
}
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/USBLIB/CONFIG/usb_istr.c
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/********************************** (C) COPYRIGHT *******************************
* File Name : usb_istr.c
* Author : WCH
* Version : V1.0.1
* Date : 2022/12/28
* Description : ISTR events interrupt service routines
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "usb_lib.h"
#include "usb_prop.h"
#include "usb_pwr.h"
#include "usb_istr.h"
uint16_t Ep0RxBlks;
/* Private variables */
__IO uint16_t wIstr;
__IO uint8_t bIntPackSOF = 0;
__IO uint32_t esof_counter =0;
__IO uint32_t wCNTR=0;
/* function pointers to non-control endpoints service routines */
void (*pEpInt_IN[7])(void) ={
EP1_IN_Callback,
EP2_IN_Callback,
EP3_IN_Callback,
EP4_IN_Callback,
EP5_IN_Callback,
EP6_IN_Callback,
EP7_IN_Callback,
};
void (*pEpInt_OUT[7])(void) ={
EP1_OUT_Callback,
EP2_OUT_Callback,
EP3_OUT_Callback,
EP4_OUT_Callback,
EP5_OUT_Callback,
EP6_OUT_Callback,
EP7_OUT_Callback,
};
/*******************************************************************************
* @fn USB_Istr
*
* @brief ISTR events interrupt service routine
*
* @return None.
*/
void USB_Istr(void)
{
uint32_t i=0;
__IO uint32_t EP[8];
if ((*_pEPRxCount(0) & 0xFC00 )!= Ep0RxBlks)
{
*_pEPRxCount(0) |= (Ep0RxBlks & 0xFC00);
}
wIstr = _GetISTR();
#if (IMR_MSK & ISTR_SOF)
if (wIstr & ISTR_SOF & wInterrupt_Mask)
{
_SetISTR((uint16_t)CLR_SOF);
bIntPackSOF++;
#ifdef SOF_CALLBACK
SOF_Callback();
#endif
}
#endif
#if (IMR_MSK & ISTR_CTR)
if (wIstr & ISTR_CTR & wInterrupt_Mask)
{
CTR_LP();
#ifdef CTR_CALLBACK
CTR_Callback();
#endif
}
#endif
#if (IMR_MSK & ISTR_RESET)
if (wIstr & ISTR_RESET & wInterrupt_Mask)
{
_SetISTR((uint16_t)CLR_RESET);
Device_Property.Reset();
#ifdef RESET_CALLBACK
RESET_Callback();
#endif
}
#endif
#if (IMR_MSK & ISTR_DOVR)
if (wIstr & ISTR_DOVR & wInterrupt_Mask)
{
_SetISTR((uint16_t)CLR_DOVR);
#ifdef DOVR_CALLBACK
DOVR_Callback();
#endif
}
#endif
#if (IMR_MSK & ISTR_ERR)
if (wIstr & ISTR_ERR & wInterrupt_Mask)
{
_SetISTR((uint16_t)CLR_ERR);
#ifdef ERR_CALLBACK
ERR_Callback();
#endif
}
#endif
#if (IMR_MSK & ISTR_WKUP)
if (wIstr & ISTR_WKUP & wInterrupt_Mask)
{
_SetISTR((uint16_t)CLR_WKUP);
Resume(RESUME_EXTERNAL);
#ifdef WKUP_CALLBACK
WKUP_Callback();
#endif
}
#endif
#if (IMR_MSK & ISTR_SUSP)
if (wIstr & ISTR_SUSP & wInterrupt_Mask)
{
if (fSuspendEnabled)
{
Suspend();
}
else
{
Resume(RESUME_LATER);
}
_SetISTR((uint16_t)CLR_SUSP);
#ifdef SUSP_CALLBACK
SUSP_Callback();
#endif
}
#endif
#if (IMR_MSK & ISTR_ESOF)
if (wIstr & ISTR_ESOF & wInterrupt_Mask)
{
_SetISTR((uint16_t)CLR_ESOF);
if ((_GetFNR()&FNR_RXDP)!=0)
{
esof_counter ++;
if ((esof_counter >3)&&((_GetCNTR()&CNTR_FSUSP)==0))
{
wCNTR = _GetCNTR();
for (i=0;i<8;i++) EP[i] = _GetENDPOINT(i);
wCNTR|=CNTR_FRES;
_SetCNTR(wCNTR);
wCNTR&=~CNTR_FRES;
_SetCNTR(wCNTR);
while((_GetISTR()&ISTR_RESET) == 0);
_SetISTR((uint16_t)CLR_RESET);
for (i=0;i<8;i++)
_SetENDPOINT(i, EP[i]);
esof_counter = 0;
}
}
else
{
esof_counter = 0;
}
Resume(RESUME_ESOF);
#ifdef ESOF_CALLBACK
ESOF_Callback();
#endif
}
#endif
} /* USB_Istr */
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/USBLIB/CONFIG/usb_istr.h
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/********************************** (C) COPYRIGHT *******************************
* File Name : usb_istr.h
* Author : WCH
* Version : V1.0.0
* Date : 2021/08/08
* Description : This file includes the peripherals header files in the
* user application.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __USB_ISTR_H
#define __USB_ISTR_H
#include "usb_conf.h"
void USB_Istr(void);
void EP1_IN_Callback(void);
void EP2_IN_Callback(void);
void EP3_IN_Callback(void);
void EP4_IN_Callback(void);
void EP5_IN_Callback(void);
void EP6_IN_Callback(void);
void EP7_IN_Callback(void);
void EP1_OUT_Callback(void);
void EP2_OUT_Callback(void);
void EP3_OUT_Callback(void);
void EP4_OUT_Callback(void);
void EP5_OUT_Callback(void);
void EP6_OUT_Callback(void);
void EP7_OUT_Callback(void);
#ifdef CTR_CALLBACK
void CTR_Callback(void);
#endif
#ifdef DOVR_CALLBACK
void DOVR_Callback(void);
#endif
#ifdef ERR_CALLBACK
void ERR_Callback(void);
#endif
#ifdef WKUP_CALLBACK
void WKUP_Callback(void);
#endif
#ifdef SUSP_CALLBACK
void SUSP_Callback(void);
#endif
#ifdef RESET_CALLBACK
void RESET_Callback(void);
#endif
#ifdef SOF_CALLBACK
void SOF_Callback(void);
#endif
#ifdef ESOF_CALLBACK
void ESOF_Callback(void);
#endif
#endif /*__USB_ISTR_H*/
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/USBLIB/CONFIG/usb_prop.c
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/********************************** (C) COPYRIGHT *******************************
* File Name : usb_prop.c
* Author : WCH
* Version : V1.0.0
* Date : 2021/08/08
* Description : USB Processing
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "usb_lib.h"
#include "usb_conf.h"
#include "usb_prop.h"
#include "usb_desc.h"
#include "usb_pwr.h"
#include "hw_config.h"
uint8_t Request = 0;
volatile uint8_t CDROM_Max_Lun = 0;
DEVICE Device_Table =
{
EP_NUM,
1
};
DEVICE_PROP Device_Property =
{
USBD_init,
USBD_Reset,
USBD_Status_In,
USBD_Status_Out,
USBD_Data_Setup,
USBD_NoData_Setup,
USBD_Get_Interface_Setting,
USBD_GetDeviceDescriptor,
USBD_GetConfigDescriptor,
USBD_GetStringDescriptor,
0,
DEF_USBD_UEP0_SIZE
};
USER_STANDARD_REQUESTS User_Standard_Requests =
{
USBD_GetConfiguration,
USBD_SetConfiguration,
USBD_GetInterface,
USBD_SetInterface,
USBD_GetStatus,
USBD_ClearFeature,
USBD_SetEndPointFeature,
USBD_SetDeviceFeature,
USBD_SetDeviceAddress
};
ONE_DESCRIPTOR Device_Descriptor =
{
(uint8_t*)USBD_DeviceDescriptor,
USBD_SIZE_DEVICE_DESC
};
ONE_DESCRIPTOR Config_Descriptor =
{
(uint8_t*)USBD_ConfigDescriptor,
USBD_SIZE_CONFIG_DESC
};
ONE_DESCRIPTOR String_Descriptor[4] =
{
{(uint8_t*)USBD_StringLangID, USBD_SIZE_STRING_LANGID},
{(uint8_t*)USBD_StringVendor, USBD_SIZE_STRING_VENDOR},
{(uint8_t*)USBD_StringProduct,USBD_SIZE_STRING_PRODUCT},
{(uint8_t*)USBD_StringSerial, USBD_SIZE_STRING_SERIAL}
};
/*********************************************************************
* @fn USBD_SetConfiguration.
*
* @brief Update the device state to configured.
*
* @return None.
*/
void USBD_SetConfiguration(void)
{
DEVICE_INFO *pInfo = &Device_Info;
if (pInfo->Current_Configuration != 0)
{
bDeviceState = CONFIGURED;
}
}
/*******************************************************************************
* @fn USBD_SetDeviceAddress.
*
* @brief Update the device state to addressed.
*
* @return None.
*/
void USBD_SetDeviceAddress (void)
{
bDeviceState = ADDRESSED;
}
/*********************************************************************
* @fn USBD_SetDeviceFeature.
*
* @brief SetDeviceFeature Routine.
*
* @return none
*/
void USBD_SetDeviceFeature (void)
{
}
/*********************************************************************
* @fn USBD_ClearFeature.
*
* @brief ClearFeature Routine.
*
* @return none
*/
void USBD_ClearFeature(void)
{
}
/*********************************************************************
* @fn USBD_Status_In.
*
* @brief USBD Status In Routine.
*
* @return None.
*/
void USBD_Status_In(void)
{
}
/*******************************************************************************
* @fn USBD_Status_Out
*
* @brief USBD Status OUT Routine.
*
* @return None.
*/
void USBD_Status_Out(void)
{
}
/*******************************************************************************
* @fn USB_init.
*
* @brief init routine.
*
* @return None.
*/
void USBD_init(void)
{
uint8_t i;
pInformation->Current_Configuration = 0;
PowerOn();
for (i=0;i<8;i++) _SetENDPOINT(i,_GetENDPOINT(i) & 0x7F7F & EPREG_MASK);//all clear
_SetISTR((uint16_t)0x00FF);//all clear
USB_SIL_Init();
bDeviceState = UNCONNECTED;
USB_Port_Set(DISABLE, DISABLE);
Delay_Ms(20);
USB_Port_Set(ENABLE, ENABLE);
}
/*******************************************************************************
* @fn USBD_Reset
*
* @brief Virtual_Com_Port Mouse reset routine
*
* @return None.
*/
void USBD_Reset(void)
{
pInformation->Current_Configuration = 0;
pInformation->Current_Feature = USBD_ConfigDescriptor[7];
pInformation->Current_Interface = 0;
SetBTABLE(BTABLE_ADDRESS);
SetEPType(ENDP0, EP_CONTROL);
SetEPTxStatus(ENDP0, EP_TX_STALL);
SetEPRxAddr(ENDP0, ENDP0_RXADDR);
SetEPTxAddr(ENDP0, ENDP0_TXADDR);
Clear_Status_Out(ENDP0);
SetEPRxCount(ENDP0, Device_Property.MaxPacketSize);
SetEPRxValid(ENDP0);
_ClearDTOG_RX(ENDP0);
_ClearDTOG_TX(ENDP0);
SetEPType(ENDP2, EP_BULK);
SetEPTxAddr(ENDP2, ENDP2_TXADDR);
SetEPTxStatus(ENDP2, EP_TX_NAK);
SetEPRxStatus(ENDP2,EP_RX_DIS);
_ClearDTOG_TX(ENDP2);
_ClearDTOG_RX(ENDP2);
SetEPType(ENDP3, EP_BULK);
SetEPTxStatus(ENDP3, EP_TX_DIS);
SetEPRxAddr(ENDP3, ENDP3_RXADDR);
SetEPRxCount(ENDP3, DEF_USBD_MAX_PACK_SIZE);
SetEPRxStatus(ENDP3, EP_RX_VALID );
_ClearDTOG_TX(ENDP3);
_ClearDTOG_RX(ENDP3);
SetDeviceAddress(0);
bDeviceState = ATTACHED;
}
/*******************************************************************************
* @fn USBD_GetDeviceDescriptor.
*
* @brief Gets the device descriptor.
*
* @param Length.
*
* @return The address of the device descriptor.
*/
uint8_t *USBD_GetDeviceDescriptor(uint16_t Length)
{
return Standard_GetDescriptorData(Length, &Device_Descriptor);
}
/*******************************************************************************
* @fn USBD_GetConfigDescriptor.
*
* @brief get the configuration descriptor.
*
* @param Length.
*
* @return The address of the configuration descriptor.
*/
uint8_t *USBD_GetConfigDescriptor(uint16_t Length)
{
return Standard_GetDescriptorData(Length, &Config_Descriptor);
}
/*******************************************************************************
* @fn USBD_GetStringDescriptor
*
* @brief Gets the string descriptors according to the needed index
*
* @param Length.
*
* @return The address of the string descriptors.
*/
uint8_t *USBD_GetStringDescriptor(uint16_t Length)
{
uint8_t wValue0 = pInformation->USBwValue0;
if (wValue0 > 4)
{
return NULL;
}
else
{
return Standard_GetDescriptorData(Length, &String_Descriptor[wValue0]);
}
}
/*********************************************************************
* @fn USBD_Get_Interface_Setting.
*
* @brief test the interface and the alternate setting according to the
* supported one.
*
* @param Interface: interface number.
* AlternateSetting: Alternate Setting number.
*
* @return USB_UNSUPPORT or USB_SUCCESS.
*/
RESULT USBD_Get_Interface_Setting(uint8_t Interface, uint8_t AlternateSetting)
{
if (AlternateSetting > 0)
{
return USB_UNSUPPORT;
}
else if (Interface > 1)
{
return USB_UNSUPPORT;
}
return USB_SUCCESS;
}
/*******************************************************************************
* @fn USBD_Data_Setup
*
* @brief handle the data class specific requests
*
* @param Request Nb.
*
* @return USB_UNSUPPORT or USB_SUCCESS.
*/
RESULT USBD_Data_Setup(uint8_t RequestNo)
{
uint32_t Request_No = pInformation->USBbRequest;
if (Type_Recipient == (STANDARD_REQUEST | INTERFACE_RECIPIENT))
{
return USB_UNSUPPORT;
}
else if (Type_Recipient == (CLASS_REQUEST | INTERFACE_RECIPIENT) )
{
if (Request_No == 0xFE)
{
pInformation->Ctrl_Info.Usb_wLength = 1;
pInformation->Ctrl_Info.CopyData = &USBD_CDROM_Get_Max_Lun;
return USB_SUCCESS;
}
else
{
return USB_UNSUPPORT;
}
}
return USB_UNSUPPORT;
}
/*******************************************************************************
* @fn USBD_NoData_Setup.
*
* @brief handle the no data class specific requests.
*
* @param Request Nb.
*
* @return USB_UNSUPPORT or USB_SUCCESS.
*/
RESULT USBD_NoData_Setup(uint8_t RequestNo)
{
return USB_UNSUPPORT;
}
uint8_t *USBD_CDROM_Get_Max_Lun(uint16_t Length)
{
uint8_t wIndex0 = pInformation->USBwIndexs.bw.bb0;
if (wIndex0 > 1)
{
return NULL;
}
else
{
return (uint8_t*)&CDROM_Max_Lun;
}
}
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/USBLIB/CONFIG/usb_prop.h
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/********************************** (C) COPYRIGHT *******************************
* File Name : usb_prop.h
* Author : WCH
* Version : V1.0.0
* Date : 2021/08/08
* Description : All processing related to Virtual COM Port Demo (Endpoint 0)
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __usb_prop_H
#define __usb_prop_H
#ifdef __cplusplus
extern "C" {
#endif
#include "ch32v20x.h"
#define USBD_GetConfiguration NOP_Process
// #define USBD_SetConfiguration NOP_Process
#define USBD_GetInterface NOP_Process
#define USBD_SetInterface NOP_Process
#define USBD_GetStatus NOP_Process
// #define USBD_ClearFeature NOP_Process
#define USBD_SetEndPointFeature NOP_Process
// #define USBD_SetDeviceFeature NOP_Process
// #define USBD_SetDeviceAddress NOP_Process
void USBD_init(void);
void USBD_Reset(void);
void USBD_SetConfiguration(void);
void USBD_SetDeviceAddress (void);
void USBD_SetDeviceFeature (void);
void USBD_ClearFeature (void);
void USBD_Status_In (void);
void USBD_Status_Out (void);
RESULT USBD_Data_Setup(uint8_t);
RESULT USBD_NoData_Setup(uint8_t);
RESULT USBD_Get_Interface_Setting(uint8_t Interface, uint8_t AlternateSetting);
uint8_t *USBD_GetDeviceDescriptor(uint16_t );
uint8_t *USBD_GetConfigDescriptor(uint16_t);
uint8_t *USBD_GetStringDescriptor(uint16_t);
uint8_t *USBD_CDROM_Get_Max_Lun(uint16_t);
#ifdef __cplusplus
}
#endif
#endif /* __usb_prop_H */
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/USBLIB/CONFIG/usb_pwr.c
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/********************************** (C) COPYRIGHT *******************************
* File Name : usb_pwr.c
* Author : WCH
* Version : V1.0.0
* Date : 2021/08/08
* Description : Connection/disconnection & power management
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "usb_lib.h"
#include "usb_conf.h"
#include "usb_pwr.h"
#include "hw_config.h"
__IO uint32_t bDeviceState = UNCONNECTED;
__IO bool fSuspendEnabled = TRUE;
__IO uint32_t EP[8];
struct
{
__IO RESUME_STATE eState;
__IO uint8_t bESOFcnt;
}
ResumeS;
__IO uint32_t remotewakeupon=0;
/*******************************************************************************
* @fn PowerOn
*
* @brief Enable power on.
*
* @return USB_SUCCESS.
*/
RESULT PowerOn(void)
{
uint16_t wRegVal;
wRegVal = CNTR_FRES;
_SetCNTR(wRegVal);
wInterrupt_Mask = 0;
_SetCNTR(wInterrupt_Mask);
_SetISTR(0);
wInterrupt_Mask = CNTR_RESETM | CNTR_SUSPM | CNTR_WKUPM;
_SetCNTR(wInterrupt_Mask);
return USB_SUCCESS;
}
/*******************************************************************************
* @fn PowerOff
*
* @brief handles switch-off conditions
*
* @return USB_SUCCESS.
*/
RESULT PowerOff()
{
_SetCNTR(CNTR_FRES);
_SetISTR(0);
_SetCNTR(CNTR_FRES + CNTR_PDWN);
return USB_SUCCESS;
}
/*******************************************************************************
* @fn Suspend
*
* @brief sets suspend mode operating conditions
*
* @return USB_SUCCESS.
*/
void Suspend(void)
{
uint32_t i =0;
uint16_t wCNTR;
wCNTR = _GetCNTR();
for (i=0;i<8;i++) EP[i] = _GetENDPOINT(i);
wCNTR|=CNTR_RESETM;
_SetCNTR(wCNTR);
wCNTR|=CNTR_FRES;
_SetCNTR(wCNTR);
wCNTR&=~CNTR_FRES;
_SetCNTR(wCNTR);
while((_GetISTR()&ISTR_RESET) == 0);
_SetISTR((uint16_t)CLR_RESET);
for (i=0;i<8;i++)
_SetENDPOINT(i, EP[i]);
wCNTR |= CNTR_FSUSP;
_SetCNTR(wCNTR);
wCNTR = _GetCNTR();
wCNTR |= CNTR_LPMODE;
_SetCNTR(wCNTR);
Enter_LowPowerMode();
}
/*******************************************************************************
* @fn Resume_Init
*
* @brief Handles wake-up restoring normal operations
*
* @return USB_SUCCESS.
*/
void Resume_Init(void)
{
uint16_t wCNTR;
wCNTR = _GetCNTR();
wCNTR &= (~CNTR_LPMODE);
_SetCNTR(wCNTR);
Leave_LowPowerMode();
_SetCNTR(IMR_MSK);
}
/*******************************************************************************
* @fn Resume
*
* @brief This is the state machine handling resume operations and
* timing sequence. The control is based on the Resume structure
* variables and on the ESOF interrupt calling this subroutine
* without changing machine state.
*
* @param a state machine value (RESUME_STATE)
* RESUME_ESOF doesn't change ResumeS.eState allowing
* decrementing of the ESOF counter in different states.
*
* @return None.
*/
void Resume(RESUME_STATE eResumeSetVal)
{
uint16_t wCNTR;
if (eResumeSetVal != RESUME_ESOF)
{
ResumeS.eState = eResumeSetVal;
}
switch (ResumeS.eState)
{
case RESUME_EXTERNAL:
if (remotewakeupon ==0)
{
Resume_Init();
ResumeS.eState = RESUME_OFF;
}
else
{
ResumeS.eState = RESUME_ON;
}
break;
case RESUME_INTERNAL:
Resume_Init();
ResumeS.eState = RESUME_START;
remotewakeupon = 1;
break;
case RESUME_LATER:
ResumeS.bESOFcnt = 2;
ResumeS.eState = RESUME_WAIT;
break;
case RESUME_WAIT:
ResumeS.bESOFcnt--;
if (ResumeS.bESOFcnt == 0)
ResumeS.eState = RESUME_START;
break;
case RESUME_START:
wCNTR = _GetCNTR();
wCNTR |= CNTR_RESUME;
_SetCNTR(wCNTR);
ResumeS.eState = RESUME_ON;
ResumeS.bESOFcnt = 10;
break;
case RESUME_ON:
ResumeS.bESOFcnt--;
if (ResumeS.bESOFcnt == 0)
{
wCNTR = _GetCNTR();
wCNTR &= (~CNTR_RESUME);
_SetCNTR(wCNTR);
ResumeS.eState = RESUME_OFF;
remotewakeupon = 0;
}
break;
case RESUME_OFF:
case RESUME_ESOF:
default:
ResumeS.eState = RESUME_OFF;
break;
}
}
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/USBLIB/CONFIG/usb_pwr.h
+62
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/********************************** (C) COPYRIGHT *******************************
* File Name : usb_pwr.h
* Author : WCH
* Version : V1.0.0
* Date : 2021/08/08
* Description : Connection/disconnection & power management header
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __USB_PWR_H
#define __USB_PWR_H
#ifdef __cplusplus
extern "C" {
#endif
#include "ch32v20x.h"
typedef enum _RESUME_STATE
{
RESUME_EXTERNAL,
RESUME_INTERNAL,
RESUME_LATER,
RESUME_WAIT,
RESUME_START,
RESUME_ON,
RESUME_OFF,
RESUME_ESOF
} RESUME_STATE;
typedef enum _DEVICE_STATE
{
UNCONNECTED,
ATTACHED,
POWERED,
SUSPENDED,
ADDRESSED,
CONFIGURED
} DEVICE_STATE;
void Suspend(void);
void Resume_Init(void);
void Resume(RESUME_STATE eResumeSetVal);
RESULT PowerOn(void);
RESULT PowerOff(void);
extern __IO uint32_t bDeviceState; /* USB device status */
extern __IO bool fSuspendEnabled; /* true when suspend is possible */
#ifdef __cplusplus
}
#endif
#endif /*__USB_PWR_H*/
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/USBLIB/USB-Driver/inc/usb_core.h
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/********************************** (C) COPYRIGHT *******************************
* File Name : usb_core.h
* Author : WCH
* Version : V1.0.0
* Date : 2021/08/08
* Description : This file contains all the functions prototypes for the
* USB cor firmware library.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __USB_CORE_H
#define __USB_CORE_H
#ifdef __cplusplus
extern "C" {
#endif
#include "ch32v20x.h"
typedef enum _CONTROL_STATE
{
WAIT_SETUP, /* 0 */
SETTING_UP, /* 1 */
IN_DATA, /* 2 */
OUT_DATA, /* 3 */
LAST_IN_DATA, /* 4 */
LAST_OUT_DATA, /* 5 */
WAIT_STATUS_IN, /* 7 */
WAIT_STATUS_OUT, /* 8 */
STALLED, /* 9 */
PAUSE /* 10 */
} CONTROL_STATE; /* The state machine states of a control pipe */
typedef struct OneDescriptor
{
uint8_t *Descriptor;
uint16_t Descriptor_Size;
}
ONE_DESCRIPTOR, *PONE_DESCRIPTOR;
typedef enum _RESULT
{
USB_SUCCESS = 0, /* Process successfully */
USB_ERROR,
USB_UNSUPPORT,
USB_NOT_READY /* The process has not been finished, endpoint will be
NAK to further request */
} RESULT;
/* Definitions for endpoint level */
typedef struct _ENDPOINT_INFO
{
uint16_t Usb_wLength;
uint16_t Usb_wOffset;
uint16_t PacketSize;
uint8_t *(*CopyData)(uint16_t Length);
}ENDPOINT_INFO;
/* Definitions for device level */
typedef struct _DEVICE
{
uint8_t Total_Endpoint; /* Number of endpoints that are used */
uint8_t Total_Configuration;/* Number of configuration available */
}
DEVICE;
typedef union
{
uint16_t w;
struct BW
{
uint8_t bb1;
uint8_t bb0;
}
bw;
} uint16_t_uint8_t;
typedef struct _DEVICE_INFO
{
uint8_t USBbmRequestType; /* bmRequestType */
uint8_t USBbRequest; /* bRequest */
uint16_t_uint8_t USBwValues; /* wValue */
uint16_t_uint8_t USBwIndexs; /* wIndex */
uint16_t_uint8_t USBwLengths; /* wLength */
uint8_t ControlState; /* of type CONTROL_STATE */
uint8_t Current_Feature;
uint8_t Current_Configuration; /* Selected configuration */
uint8_t Current_Interface; /* Selected interface of current configuration */
uint8_t Current_AlternateSetting;/* Selected Alternate Setting of current
interface*/
ENDPOINT_INFO Ctrl_Info;
}DEVICE_INFO;
typedef struct _DEVICE_PROP
{
void (*Init)(void); /* Initialize the device */
void (*Reset)(void); /* Reset routine of this device */
void (*Process_Status_IN)(void);
void (*Process_Status_OUT)(void);
RESULT (*Class_Data_Setup)(uint8_t RequestNo);
RESULT (*Class_NoData_Setup)(uint8_t RequestNo);
RESULT (*Class_Get_Interface_Setting)(uint8_t Interface, uint8_t AlternateSetting);
uint8_t* (*GetDeviceDescriptor)(uint16_t Length);
uint8_t* (*GetConfigDescriptor)(uint16_t Length);
uint8_t* (*GetStringDescriptor)(uint16_t Length);
void* RxEP_buffer;
uint8_t MaxPacketSize;
}DEVICE_PROP;
typedef struct _USER_STANDARD_REQUESTS
{
void (*User_GetConfiguration)(void); /* Get Configuration */
void (*User_SetConfiguration)(void); /* Set Configuration */
void (*User_GetInterface)(void); /* Get Interface */
void (*User_SetInterface)(void); /* Set Interface */
void (*User_GetStatus)(void); /* Get Status */
void (*User_ClearFeature)(void); /* Clear Feature */
void (*User_SetEndPointFeature)(void); /* Set Endpoint Feature */
void (*User_SetDeviceFeature)(void); /* Set Device Feature */
void (*User_SetDeviceAddress)(void); /* Set Device Address */
}
USER_STANDARD_REQUESTS;
#define Type_Recipient (pInformation->USBbmRequestType & (REQUEST_TYPE | RECIPIENT))
#define Usb_rLength Usb_wLength
#define Usb_rOffset Usb_wOffset
#define USBwValue USBwValues.w
#define USBwValue0 USBwValues.bw.bb0
#define USBwValue1 USBwValues.bw.bb1
#define USBwIndex USBwIndexs.w
#define USBwIndex0 USBwIndexs.bw.bb0
#define USBwIndex1 USBwIndexs.bw.bb1
#define USBwLength USBwLengths.w
#define USBwLength0 USBwLengths.bw.bb0
#define USBwLength1 USBwLengths.bw.bb1
uint8_t Setup0_Process(void);
uint8_t Post0_Process(void);
uint8_t Out0_Process(void);
uint8_t In0_Process(void);
RESULT Standard_SetEndPointFeature(void);
RESULT Standard_SetDeviceFeature(void);
uint8_t *Standard_GetConfiguration(uint16_t Length);
RESULT Standard_SetConfiguration(void);
uint8_t *Standard_GetInterface(uint16_t Length);
RESULT Standard_SetInterface(void);
uint8_t *Standard_GetDescriptorData(uint16_t Length, PONE_DESCRIPTOR pDesc);
uint8_t *Standard_GetStatus(uint16_t Length);
RESULT Standard_ClearFeature(void);
void SetDeviceAddress(uint8_t);
void NOP_Process(void);
extern DEVICE_PROP Device_Property;
extern USER_STANDARD_REQUESTS User_Standard_Requests;
extern DEVICE Device_Table;
extern DEVICE_INFO Device_Info;
/* cells saving status during interrupt servicing */
extern __IO uint16_t SaveRState;
extern __IO uint16_t SaveTState;
#ifdef __cplusplus
}
#endif
#endif /* __USB_CORE_H */
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/USBLIB/USB-Driver/inc/usb_def.h
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/********************************** (C) COPYRIGHT *******************************
* File Name : usb_def.h
* Author : WCH
* Version : V1.0.0
* Date : 2021/08/08
* Description : This file contains all the functions prototypes for the
* USB definition firmware library.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __USB_DEF_H
#define __USB_DEF_H
#ifdef __cplusplus
extern "C" {
#endif
#include "ch32v20x.h"
typedef enum _RECIPIENT_TYPE
{
DEVICE_RECIPIENT,
INTERFACE_RECIPIENT,
ENDPOINT_RECIPIENT,
OTHER_RECIPIENT
} RECIPIENT_TYPE;
typedef enum _STANDARD_REQUESTS
{
GET_STATUS = 0,
CLEAR_FEATURE,
RESERVED1,
SET_FEATURE,
RESERVED2,
SET_ADDRESS,
GET_DESCRIPTOR,
SET_DESCRIPTOR,
GET_CONFIGURATION,
SET_CONFIGURATION,
GET_INTERFACE,
SET_INTERFACE,
TOTAL_sREQUEST,
SYNCH_FRAME = 12
} STANDARD_REQUESTS;
/* Definition of "USBwValue" */
typedef enum _DESCRIPTOR_TYPE
{
DEVICE_DESCRIPTOR = 1,
CONFIG_DESCRIPTOR,
STRING_DESCRIPTOR,
INTERFACE_DESCRIPTOR,
ENDPOINT_DESCRIPTOR
} DESCRIPTOR_TYPE;
/* Feature selector of a SET_FEATURE or CLEAR_FEATURE */
typedef enum _FEATURE_SELECTOR
{
ENDPOINT_STALL,
DEVICE_REMOTE_WAKEUP
} FEATURE_SELECTOR;
/* Definition of "USBbmRequestType" */
#define REQUEST_TYPE 0x60
#define STANDARD_REQUEST 0x00
#define CLASS_REQUEST 0x20
#define VENDOR_REQUEST 0x40
#define RECIPIENT 0x1F
#ifdef __cplusplus
}
#endif
#endif /* __USB_DEF_H */
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/USBLIB/USB-Driver/inc/usb_init.h
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/********************************** (C) COPYRIGHT *******************************
* File Name : usb_init.h
* Author : WCH
* Version : V1.0.0
* Date : 2021/08/08
* Description : This file contains all the functions prototypes for the
* USB Initialization firmware library.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __USB_INIT_H
#define __USB_INIT_H
#ifdef __cplusplus
extern "C" {
#endif
#include "ch32v20x.h"
void USB_Init(void);
extern uint8_t EPindex;
extern DEVICE_INFO* pInformation;
extern DEVICE_PROP* pProperty;
extern USER_STANDARD_REQUESTS *pUser_Standard_Requests;
extern uint16_t SaveState ;
extern uint16_t wInterrupt_Mask;
#ifdef __cplusplus
}
#endif
#endif /* __USB_INIT_H */
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/USBLIB/USB-Driver/inc/usb_int.h
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/********************************** (C) COPYRIGHT *******************************
* File Name : usb_int.h
* Author : WCH
* Version : V1.0.0
* Date : 2021/08/08
* Description : This file contains all the functions prototypes for the
* USB Endpoint firmware library.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __USB_INT_H
#define __USB_INT_H
void CTR_LP(void);
void CTR_HP(void);
#endif /* __USB_INT_H */
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/USBLIB/USB-Driver/inc/usb_lib.h
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/********************************** (C) COPYRIGHT *******************************
* File Name : usb_lib.h
* Author : WCH
* Version : V1.0.0
* Date : 2021/08/08
* Description : Library configuration file for USB.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __USB_LIB_H
#define __USB_LIB_H
#include "hw_config.h"
#include "usb_type.h"
#include "usb_regs.h"
#include "usb_def.h"
#include "usb_core.h"
#include "usb_init.h"
#include "usb_sil.h"
#include "usb_mem.h"
#include "usb_int.h"
//#include "ch32f20x_usb.h"
#endif /* __USB_LIB_H */
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/USBLIB/USB-Driver/inc/usb_mem.h
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/********************************** (C) COPYRIGHT *******************************
* File Name : usb_mem.h
* Author : WCH
* Version : V1.0.0
* Date : 2021/08/08
* Description : This file contains all the functions prototypes for the
* USB Initialization firmware library.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __USB_MEM_H
#define __USB_MEM_H
#ifdef __cplusplus
extern "C" {
#endif
#include "ch32v20x.h"
void UserToPMABufferCopy(uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
void PMAToUserBufferCopy(uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
#ifdef __cplusplus
}
#endif
#endif /*__USB_MEM_H*/
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/USBLIB/USB-Driver/inc/usb_regs.h
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/********************************** (C) COPYRIGHT *******************************
* File Name : usb_regs.h
* Author : WCH
* Version : V1.0.1
* Date : 2022/12/28
* Description : This file contains all the functions prototypes for the
* USB cell registers firmware library.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __USB_REGS_H
#define __USB_REGS_H
#ifdef __cplusplus
extern "C" {
#endif
#include "ch32v20x.h"
typedef enum _EP_DBUF_DIR
{
EP_DBUF_ERR,
EP_DBUF_OUT,
EP_DBUF_IN
}EP_DBUF_DIR;
/* endpoint buffer number */
enum EP_BUF_NUM
{
EP_NOBUF,
EP_BUF0,
EP_BUF1
};
extern uint16_t Ep0RxBlks;
#define RegBase (0x40005C00L)
#define PMAAddr (0x40006000L)
/******************************************************************************/
/* General registers */
/******************************************************************************/
/* Control register */
#define CNTLR ((__IO unsigned *)(RegBase + 0x40))
/* Interrupt status register */
#define ISTR ((__IO unsigned *)(RegBase + 0x44))
/* Frame number register */
#define FNR ((__IO unsigned *)(RegBase + 0x48))
/* Device address register */
#define DADDR ((__IO unsigned *)(RegBase + 0x4C))
/* Buffer Table address register */
#define BTABLE ((__IO unsigned *)(RegBase + 0x50))
/******************************************************************************/
/* Endpoint registers */
/******************************************************************************/
#define EP0REG ((__IO unsigned *)(RegBase)) /* endpoint 0 register address */
/* Endpoint Addresses (w/direction) */
#define EP0_OUT ((uint8_t)0x00)
#define EP0_IN ((uint8_t)0x80)
#define EP1_OUT ((uint8_t)0x01)
#define EP1_IN ((uint8_t)0x81)
#define EP2_OUT ((uint8_t)0x02)
#define EP2_IN ((uint8_t)0x82)
#define EP3_OUT ((uint8_t)0x03)
#define EP3_IN ((uint8_t)0x83)
#define EP4_OUT ((uint8_t)0x04)
#define EP4_IN ((uint8_t)0x84)
#define EP5_OUT ((uint8_t)0x05)
#define EP5_IN ((uint8_t)0x85)
#define EP6_OUT ((uint8_t)0x06)
#define EP6_IN ((uint8_t)0x86)
#define EP7_OUT ((uint8_t)0x07)
#define EP7_IN ((uint8_t)0x87)
/* endpoints enumeration */
#define ENDP0 ((uint8_t)0)
#define ENDP1 ((uint8_t)1)
#define ENDP2 ((uint8_t)2)
#define ENDP3 ((uint8_t)3)
#define ENDP4 ((uint8_t)4)
#define ENDP5 ((uint8_t)5)
#define ENDP6 ((uint8_t)6)
#define ENDP7 ((uint8_t)7)
/******************************************************************************/
/* ISTR interrupt events */
/******************************************************************************/
#define ISTR_CTR (0x8000) /* Correct TRansfer (clear-only bit) */
#define ISTR_DOVR (0x4000) /* DMA OVeR/underrun (clear-only bit) */
#define ISTR_ERR (0x2000) /* ERRor (clear-only bit) */
#define ISTR_WKUP (0x1000) /* WaKe UP (clear-only bit) */
#define ISTR_SUSP (0x0800) /* SUSPend (clear-only bit) */
#define ISTR_RESET (0x0400) /* RESET (clear-only bit) */
#define ISTR_SOF (0x0200) /* Start Of Frame (clear-only bit) */
#define ISTR_ESOF (0x0100) /* Expected Start Of Frame (clear-only bit) */
#define ISTR_DIR (0x0010) /* DIRection of transaction (read-only bit) */
#define ISTR_EP_ID (0x000F) /* EndPoint IDentifier (read-only bit) */
#define CLR_CTR (~ISTR_CTR) /* clear Correct TRansfer bit */
#define CLR_DOVR (~ISTR_DOVR) /* clear DMA OVeR/underrun bit*/
#define CLR_ERR (~ISTR_ERR) /* clear ERRor bit */
#define CLR_WKUP (~ISTR_WKUP) /* clear WaKe UP bit */
#define CLR_SUSP (~ISTR_SUSP) /* clear SUSPend bit */
#define CLR_RESET (~ISTR_RESET) /* clear RESET bit */
#define CLR_SOF (~ISTR_SOF) /* clear Start Of Frame bit */
#define CLR_ESOF (~ISTR_ESOF) /* clear Expected Start Of Frame bit */
/******************************************************************************/
/* CNTR control register bits definitions */
/******************************************************************************/
#define CNTR_CTRM (0x8000) /* Correct TRansfer Mask */
#define CNTR_DOVRM (0x4000) /* DMA OVeR/underrun Mask */
#define CNTR_ERRM (0x2000) /* ERRor Mask */
#define CNTR_WKUPM (0x1000) /* WaKe UP Mask */
#define CNTR_SUSPM (0x0800) /* SUSPend Mask */
#define CNTR_RESETM (0x0400) /* RESET Mask */
#define CNTR_SOFM (0x0200) /* Start Of Frame Mask */
#define CNTR_ESOFM (0x0100) /* Expected Start Of Frame Mask */
#define CNTR_RESUME (0x0010) /* RESUME request */
#define CNTR_FSUSP (0x0008) /* Force SUSPend */
#define CNTR_LPMODE (0x0004) /* Low-power MODE */
#define CNTR_PDWN (0x0002) /* Power DoWN */
#define CNTR_FRES (0x0001) /* Force USB RESet */
/******************************************************************************/
/* FNR Frame Number Register bit definitions */
/******************************************************************************/
#define FNR_RXDP (0x8000) /* status of D+ data line */
#define FNR_RXDM (0x4000) /* status of D- data line */
#define FNR_LCK (0x2000) /* LoCKed */
#define FNR_LSOF (0x1800) /* Lost SOF */
#define FNR_FN (0x07FF) /* Frame Number */
/******************************************************************************/
/* DADDR Device ADDRess bit definitions */
/******************************************************************************/
#define DADDR_EF (0x80)
#define DADDR_ADD (0x7F)
/******************************************************************************/
/* Endpoint register */
/******************************************************************************/
/* bit positions */
#define EP_CTR_RX (0x8000) /* EndPoint Correct TRansfer RX */
#define EP_DTOG_RX (0x4000) /* EndPoint Data TOGGLE RX */
#define EPRX_STAT (0x3000) /* EndPoint RX STATus bit field */
#define EP_SETUP (0x0800) /* EndPoint SETUP */
#define EP_T_FIELD (0x0600) /* EndPoint TYPE */
#define EP_KIND (0x0100) /* EndPoint KIND */
#define EP_CTR_TX (0x0080) /* EndPoint Correct TRansfer TX */
#define EP_DTOG_TX (0x0040) /* EndPoint Data TOGGLE TX */
#define EPTX_STAT (0x0030) /* EndPoint TX STATus bit field */
#define EPADDR_FIELD (0x000F) /* EndPoint ADDRess FIELD */
/* EndPoint REGister MASK (no toggle fields) */
#define EPREG_MASK (EP_CTR_RX|EP_SETUP|EP_T_FIELD|EP_KIND|EP_CTR_TX|EPADDR_FIELD)
/* EP_TYPE[1:0] EndPoint TYPE */
#define EP_TYPE_MASK (0x0600) /* EndPoint TYPE Mask */
#define EP_BULK (0x0000) /* EndPoint BULK */
#define EP_CONTROL (0x0200) /* EndPoint CONTROL */
#define EP_ISOCHRONOUS (0x0400) /* EndPoint ISOCHRONOUS */
#define EP_INTERRUPT (0x0600) /* EndPoint INTERRUPT */
#define EP_T_MASK (~EP_T_FIELD & EPREG_MASK)
/* EP_KIND EndPoint KIND */
#define EPKIND_MASK (~EP_KIND & EPREG_MASK)
/* STAT_TX[1:0] STATus for TX transfer */
#define EP_TX_DIS (0x0000) /* EndPoint TX DISabled */
#define EP_TX_STALL (0x0010) /* EndPoint TX STALLed */
#define EP_TX_NAK (0x0020) /* EndPoint TX NAKed */
#define EP_TX_VALID (0x0030) /* EndPoint TX VALID */
#define EPTX_DTOG1 (0x0010) /* EndPoint TX Data TOGgle bit1 */
#define EPTX_DTOG2 (0x0020) /* EndPoint TX Data TOGgle bit2 */
#define EPTX_DTOGMASK (EPTX_STAT|EPREG_MASK)
/* STAT_RX[1:0] STATus for RX transfer */
#define EP_RX_DIS (0x0000) /* EndPoint RX DISabled */
#define EP_RX_STALL (0x1000) /* EndPoint RX STALLed */
#define EP_RX_NAK (0x2000) /* EndPoint RX NAKed */
#define EP_RX_VALID (0x3000) /* EndPoint RX VALID */
#define EPRX_DTOG1 (0x1000) /* EndPoint RX Data TOGgle bit1 */
#define EPRX_DTOG2 (0x2000) /* EndPoint RX Data TOGgle bit1 */
#define EPRX_DTOGMASK (EPRX_STAT|EPREG_MASK)
/* SetCNTR */
#define _SetCNTR(wRegValue) (*CNTLR = (uint16_t)wRegValue)
/* SetISTR */
#define _SetISTR(wRegValue) (*ISTR = (uint16_t)wRegValue)
/* SetDADDR */
#define _SetDADDR(wRegValue) (*DADDR = (uint16_t)wRegValue)
/* SetBTABLE */
#define _SetBTABLE(wRegValue)(*BTABLE = (uint16_t)(wRegValue & 0xFFF8))
/* GetCNTR */
#define _GetCNTR() ((uint16_t) *CNTLR)
/* GetISTR */
#define _GetISTR() ((uint16_t) *ISTR)
/* GetFNR */
#define _GetFNR() ((uint16_t) *FNR)
/* GetDADDR */
#define _GetDADDR() ((uint16_t) *DADDR)
/* GetBTABLE */
#define _GetBTABLE() ((uint16_t) *BTABLE)
/* SetENDPOINT */
#define _SetENDPOINT(bEpNum,wRegValue) (*(EP0REG + bEpNum)= \
(uint16_t)wRegValue)
/* GetENDPOINT */
#define _GetENDPOINT(bEpNum) ((uint16_t)(*(EP0REG + bEpNum)))
#define _SetEPType(bEpNum,wType) (_SetENDPOINT(bEpNum,\
((_GetENDPOINT(bEpNum) & EP_T_MASK) | wType )))
#define _GetEPType(bEpNum) (_GetENDPOINT(bEpNum) & EP_T_FIELD)
/*******************************************************************************
* Macro Name : SetEPTxStatus
* Description : sets the status for tx transfer (bits STAT_TX[1:0]).
* Input : bEpNum: Endpoint Number.
* wState: new state
* Return : None.
*******************************************************************************/
#define _SetEPTxStatus(bEpNum,wState) {\
register uint16_t _wRegVal; \
_wRegVal = _GetENDPOINT(bEpNum) & EPTX_DTOGMASK;\
/* toggle first bit ? */ \
if((EPTX_DTOG1 & wState)!= 0) \
_wRegVal ^= EPTX_DTOG1; \
/* toggle second bit ? */ \
if((EPTX_DTOG2 & wState)!= 0) \
_wRegVal ^= EPTX_DTOG2; \
_SetENDPOINT(bEpNum, (_wRegVal | EP_CTR_RX|EP_CTR_TX)); \
while( ( _GetENDPOINT(bEpNum) & EPTX_STAT ) != wState ) \
{ \
_SetENDPOINT(bEpNum, (_wRegVal | EP_CTR_RX|EP_CTR_TX)); \
}; \
} /* _SetEPTxStatus */
/*******************************************************************************
* Macro Name : SetEPRxStatus
* Description : sets the status for rx transfer (bits STAT_TX[1:0])
* Input : bEpNum: Endpoint Number.
* wState: new state.
* Return : None.
*******************************************************************************/
#define _SetEPRxStatus(bEpNum,wState) {\
register uint16_t _wRegVal; \
\
_wRegVal = _GetENDPOINT(bEpNum) & EPRX_DTOGMASK;\
/* toggle first bit ? */ \
if((EPRX_DTOG1 & wState)!= 0) \
_wRegVal ^= EPRX_DTOG1; \
/* toggle second bit ? */ \
if((EPRX_DTOG2 & wState)!= 0) \
_wRegVal ^= EPRX_DTOG2; \
_SetENDPOINT(bEpNum, (_wRegVal | EP_CTR_RX|EP_CTR_TX)); \
while( ( _GetENDPOINT(bEpNum) & EPRX_STAT ) != wState ) \
{ \
_SetENDPOINT(bEpNum, (_wRegVal | EP_CTR_RX|EP_CTR_TX)); \
} \
} /* _SetEPRxStatus */
/*******************************************************************************
* Macro Name : SetEPRxTxStatus
* Description : sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
* Input : bEpNum: Endpoint Number.
* wStaterx: new state.
* wStatetx: new state.
* Output : None.
* Return : None.
*******************************************************************************/
#define _SetEPRxTxStatus(bEpNum,wStaterx,wStatetx) {\
register uint32_t _wRegVal_T, _wRegVal_R; \
\
_wRegVal_T = _GetENDPOINT(bEpNum) & EPTX_DTOGMASK; \
_wRegVal_R = _GetENDPOINT(bEpNum) & EPRX_DTOGMASK; \
/* toggle first bit ? */ \
if((EPRX_DTOG1 & wStaterx)!= 0) \
_wRegVal_R ^= EPRX_DTOG1; \
/* toggle second bit ? */ \
if((EPRX_DTOG2 & wStaterx)!= 0) \
_wRegVal_R ^= EPRX_DTOG2; \
/* toggle first bit ? */ \
if((EPTX_DTOG1 & wStatetx)!= 0) \
_wRegVal_T ^= EPTX_DTOG1; \
/* toggle second bit ? */ \
if((EPTX_DTOG2 & wStatetx)!= 0) \
_wRegVal_T ^= EPTX_DTOG2; \
_SetENDPOINT(bEpNum, _wRegVal_T |_wRegVal_R | EP_CTR_RX | EP_CTR_TX); \
while( ( _GetENDPOINT(bEpNum) & EPTX_STAT ) != wStatetx ) \
{ \
_SetENDPOINT(bEpNum, _wRegVal_T | EP_CTR_RX | EP_CTR_TX); \
} \
while( ( _GetENDPOINT(bEpNum) & EPRX_STAT ) != wStaterx ) \
{ \
_SetENDPOINT(bEpNum, _wRegVal_R | EP_CTR_RX | EP_CTR_TX); \
} \
} /* _SetEPRxTxStatus */
/*******************************************************************************
* Macro Name : GetEPTxStatus / GetEPRxStatus
* Description : gets the status for tx/rx transfer (bits STAT_TX[1:0]
* /STAT_RX[1:0])
* Input : bEpNum: Endpoint Number.
* Return : status .
*******************************************************************************/
#define _GetEPTxStatus(bEpNum) ((uint16_t)_GetENDPOINT(bEpNum) & EPTX_STAT)
#define _GetEPRxStatus(bEpNum) ((uint16_t)_GetENDPOINT(bEpNum) & EPRX_STAT)
/*******************************************************************************
* Macro Name : SetEPTxValid / SetEPRxValid
* Description : sets directly the VALID tx/rx-status into the enpoint register
* Input : bEpNum: Endpoint Number.
* Return : None.
*******************************************************************************/
#define _SetEPTxValid(bEpNum) (_SetEPTxStatus(bEpNum, EP_TX_VALID))
#define _SetEPRxValid(bEpNum) (_SetEPRxStatus(bEpNum, EP_RX_VALID))
/*******************************************************************************
* Macro Name : GetTxStallStatus / GetRxStallStatus.
* Description : checks stall condition in an endpoint.
* Input : bEpNum: Endpoint Number.
* Return : TRUE = endpoint in stall condition.
*******************************************************************************/
#define _GetTxStallStatus(bEpNum) (_GetEPTxStatus(bEpNum) \
== EP_TX_STALL)
#define _GetRxStallStatus(bEpNum) (_GetEPRxStatus(bEpNum) \
== EP_RX_STALL)
/*******************************************************************************
* Macro Name : SetEP_KIND / ClearEP_KIND.
* Description : set & clear EP_KIND bit.
* Input : bEpNum: Endpoint Number.
* Return : None.
*******************************************************************************/
#define _SetEP_KIND(bEpNum) (_SetENDPOINT(bEpNum, \
(EP_CTR_RX|EP_CTR_TX|((_GetENDPOINT(bEpNum) | EP_KIND) & EPREG_MASK))))
#define _ClearEP_KIND(bEpNum) (_SetENDPOINT(bEpNum, \
(EP_CTR_RX|EP_CTR_TX|(_GetENDPOINT(bEpNum) & EPKIND_MASK))))
/*******************************************************************************
* Macro Name : Set_Status_Out / Clear_Status_Out.
* Description : Sets/clears directly STATUS_OUT bit in the endpoint register.
* Input : bEpNum: Endpoint Number.
* Return : None.
*******************************************************************************/
#define _Set_Status_Out(bEpNum) _SetEP_KIND(bEpNum)
#define _Clear_Status_Out(bEpNum) _ClearEP_KIND(bEpNum)
/*******************************************************************************
* Macro Name : SetEPDoubleBuff / ClearEPDoubleBuff.
* Description : Sets/clears directly EP_KIND bit in the endpoint register.
* Input : bEpNum: Endpoint Number.
* Return : None.
*******************************************************************************/
#define _SetEPDoubleBuff(bEpNum) _SetEP_KIND(bEpNum)
#define _ClearEPDoubleBuff(bEpNum) _ClearEP_KIND(bEpNum)
/*******************************************************************************
* Macro Name : ClearEP_CTR_RX / ClearEP_CTR_TX.
* Description : Clears bit CTR_RX / CTR_TX in the endpoint register.
* Input : bEpNum: Endpoint Number.
* Return : None.
*******************************************************************************/
#define _ClearEP_CTR_RX(bEpNum) (_SetENDPOINT(bEpNum,\
_GetENDPOINT(bEpNum) & 0x7FFF & EPREG_MASK))
#define _ClearEP_CTR_TX(bEpNum) (_SetENDPOINT(bEpNum,\
_GetENDPOINT(bEpNum) & 0xFF7F & EPREG_MASK))
/*******************************************************************************
* Macro Name : ToggleDTOG_RX / ToggleDTOG_TX .
* Description : Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
* Input : bEpNum: Endpoint Number.
* Return : None.
*******************************************************************************/
#define _ToggleDTOG_RX(bEpNum) (_SetENDPOINT(bEpNum, \
EP_CTR_RX|EP_CTR_TX|EP_DTOG_RX | (_GetENDPOINT(bEpNum) & EPREG_MASK)))
#define _ToggleDTOG_TX(bEpNum) (_SetENDPOINT(bEpNum, \
EP_CTR_RX|EP_CTR_TX|EP_DTOG_TX | (_GetENDPOINT(bEpNum) & EPREG_MASK)))
/*******************************************************************************
* Macro Name : ClearDTOG_RX / ClearDTOG_TX.
* Description : Clears DTOG_RX / DTOG_TX bit in the endpoint register.
* Input : bEpNum: Endpoint Number.
* Return : None.
*******************************************************************************/
#define _ClearDTOG_RX(bEpNum) if((_GetENDPOINT(bEpNum) & EP_DTOG_RX) != 0)\
_ToggleDTOG_RX(bEpNum)
#define _ClearDTOG_TX(bEpNum) if((_GetENDPOINT(bEpNum) & EP_DTOG_TX) != 0)\
_ToggleDTOG_TX(bEpNum)
/*******************************************************************************
* Macro Name : SetEPAddress.
* Description : Sets address in an endpoint register.
* Input : bEpNum: Endpoint Number.
* bAddr: Address.
* Return : None.
*******************************************************************************/
#define _SetEPAddress(bEpNum,bAddr) _SetENDPOINT(bEpNum,\
EP_CTR_RX|EP_CTR_TX|(_GetENDPOINT(bEpNum) & EPREG_MASK) | bAddr)
/*******************************************************************************
* Macro Name : GetEPAddress.
* Description : Gets address in an endpoint register.
* Input : bEpNum: Endpoint Number.
* Return : None.
*******************************************************************************/
#define _GetEPAddress(bEpNum) ((uint8_t)(_GetENDPOINT(bEpNum) & EPADDR_FIELD))
#define _pEPTxAddr(bEpNum) ((uint32_t *)((_GetBTABLE()+bEpNum*8 )*2 + PMAAddr))
#define _pEPTxCount(bEpNum) ((uint32_t *)((_GetBTABLE()+bEpNum*8+2)*2 + PMAAddr))
#define _pEPRxAddr(bEpNum) ((uint32_t *)((_GetBTABLE()+bEpNum*8+4)*2 + PMAAddr))
#define _pEPRxCount(bEpNum) ((uint32_t *)((_GetBTABLE()+bEpNum*8+6)*2 + PMAAddr))
/*******************************************************************************
* Macro Name : SetEPTxAddr / SetEPRxAddr.
* Description : sets address of the tx/rx buffer.
* Input : bEpNum: Endpoint Number.
* wAddr: address to be set (must be word aligned).
* Return : None.
*******************************************************************************/
#define _SetEPTxAddr(bEpNum,wAddr) (*_pEPTxAddr(bEpNum) = ((wAddr >> 1) << 1))
#define _SetEPRxAddr(bEpNum,wAddr) (*_pEPRxAddr(bEpNum) = ((wAddr >> 1) << 1))
/*******************************************************************************
* Macro Name : GetEPTxAddr / GetEPRxAddr.
* Description : Gets address of the tx/rx buffer.
* Input : bEpNum: Endpoint Number.
* Return : address of the buffer.
*******************************************************************************/
#define _GetEPTxAddr(bEpNum) ((uint16_t)*_pEPTxAddr(bEpNum))
#define _GetEPRxAddr(bEpNum) ((uint16_t)*_pEPRxAddr(bEpNum))
/*******************************************************************************
* Macro Name : SetEPCountRxReg.
* Description : Sets counter of rx buffer with no. of blocks.
* Input : pdwReg: pointer to counter.
* wCount: Counter.
* Return : None.
*******************************************************************************/
#define _BlocksOf32(dwReg,wCount,wNBlocks) {\
wNBlocks = wCount >> 5;\
if((wCount & 0x1f) == 0)\
wNBlocks--;\
*pdwReg = (uint32_t)((wNBlocks << 10) | 0x8000);\
}/* _BlocksOf32 */
#define _BlocksOf2(dwReg,wCount,wNBlocks) {\
wNBlocks = wCount >> 1;\
if((wCount & 0x1) != 0)\
wNBlocks++;\
*pdwReg = (uint32_t)(wNBlocks << 10);\
}/* _BlocksOf2 */
#define _SetEPCountRxReg(dwReg,wCount) {\
uint16_t wNBlocks;\
if(wCount > 62){_BlocksOf32(dwReg,wCount,wNBlocks);}\
else {_BlocksOf2(dwReg,wCount,wNBlocks);}\
}/* _SetEPCountRxReg */
#define _GetNumBlock(wCount,wValue) {\
uint16_t wNBlocks;\
if(wCount > 62){\
wNBlocks = wCount >> 5;\
if((wCount & 0x1f) == 0) wNBlocks--;\
wValue = (uint32_t)((wNBlocks << 10) | 0x8000);\
}\
else {wNBlocks = wCount >> 1;\
if((wCount & 0x1) != 0) wNBlocks++;\
wValue = (uint32_t)(wNBlocks << 10);\
}\
}
#define _SetEPRxDblBuf0Count(bEpNum,wCount) {\
uint32_t *pdwReg = _pEPTxCount(bEpNum); \
_SetEPCountRxReg(pdwReg, wCount);\
}
/*******************************************************************************
* Macro Name : SetEPTxCount / SetEPRxCount.
* Description : sets counter for the tx/rx buffer.
* Input : bEpNum: endpoint number.
* wCount: Counter value.
* Return : None.
*******************************************************************************/
#define _SetEPTxCount(bEpNum,wCount) (*_pEPTxCount(bEpNum) = wCount)
#define _SetEPRxCount(bEpNum,wCount) {\
uint32_t *pdwReg = _pEPRxCount(bEpNum); \
_SetEPCountRxReg(pdwReg, wCount);\
if (bEpNum == ENDP0) \
_GetNumBlock(Device_Property.MaxPacketSize,Ep0RxBlks);\
}
/*******************************************************************************
* Macro Name : GetEPTxCount / GetEPRxCount.
* Description : gets counter of the tx buffer.
* Input : bEpNum: endpoint number.
* Return : Counter value.
*******************************************************************************/
#define _GetEPTxCount(bEpNum)((uint16_t)(*_pEPTxCount(bEpNum)) & 0x3ff)
#define _GetEPRxCount(bEpNum)((uint16_t)(*_pEPRxCount(bEpNum)) & 0x3ff)
/*******************************************************************************
* Macro Name : SetEPDblBuf0Addr / SetEPDblBuf1Addr.
* Description : Sets buffer 0/1 address in a double buffer endpoint.
* Input : bEpNum: endpoint number.
* : wBuf0Addr: buffer 0 address.
* Output : None.
* Return : None.
*******************************************************************************/
#define _SetEPDblBuf0Addr(bEpNum,wBuf0Addr) {_SetEPTxAddr(bEpNum, wBuf0Addr);}
#define _SetEPDblBuf1Addr(bEpNum,wBuf1Addr) {_SetEPRxAddr(bEpNum, wBuf1Addr);}
/*******************************************************************************
* Macro Name : SetEPDblBuffAddr.
* Description : Sets addresses in a double buffer endpoint.
* Input : bEpNum: endpoint number.
* : wBuf0Addr: buffer 0 address.
* : wBuf1Addr = buffer 1 address.
* Return : None.
*******************************************************************************/
#define _SetEPDblBuffAddr(bEpNum,wBuf0Addr,wBuf1Addr) { \
_SetEPDblBuf0Addr(bEpNum, wBuf0Addr);\
_SetEPDblBuf1Addr(bEpNum, wBuf1Addr);\
} /* _SetEPDblBuffAddr */
/*******************************************************************************
* Macro Name : GetEPDblBuf0Addr / GetEPDblBuf1Addr.
* Description : Gets buffer 0/1 address of a double buffer endpoint.
* Input : bEpNum: endpoint number.
* Return : None.
*******************************************************************************/
#define _GetEPDblBuf0Addr(bEpNum) (_GetEPTxAddr(bEpNum))
#define _GetEPDblBuf1Addr(bEpNum) (_GetEPRxAddr(bEpNum))
/*******************************************************************************
* Macro Name : SetEPDblBuffCount / SetEPDblBuf0Count / SetEPDblBuf1Count.
* Description : Gets buffer 0/1 address of a double buffer endpoint.
* Input : bEpNum: endpoint number.
* : bDir: endpoint dir EP_DBUF_OUT = OUT
* EP_DBUF_IN = IN
* : wCount: Counter value
* Return : None.
*******************************************************************************/
#define _SetEPDblBuf0Count(bEpNum, bDir, wCount) { \
if(bDir == EP_DBUF_OUT)\
/* OUT endpoint */ \
{_SetEPRxDblBuf0Count(bEpNum,wCount);} \
else if(bDir == EP_DBUF_IN)\
/* IN endpoint */ \
*_pEPTxCount(bEpNum) = (uint32_t)wCount; \
} /* SetEPDblBuf0Count*/
#define _SetEPDblBuf1Count(bEpNum, bDir, wCount) { \
if(bDir == EP_DBUF_OUT)\
/* OUT endpoint */ \
{_SetEPRxCount(bEpNum,wCount);}\
else if(bDir == EP_DBUF_IN)\
/* IN endpoint */\
*_pEPRxCount(bEpNum) = (uint32_t)wCount; \
} /* SetEPDblBuf1Count */
#define _SetEPDblBuffCount(bEpNum, bDir, wCount) {\
_SetEPDblBuf0Count(bEpNum, bDir, wCount); \
_SetEPDblBuf1Count(bEpNum, bDir, wCount); \
} /* _SetEPDblBuffCount */
/*******************************************************************************
* Macro Name : GetEPDblBuf0Count / GetEPDblBuf1Count.
* Description : Gets buffer 0/1 rx/tx counter for double buffering.
* Input : bEpNum: endpoint number.
* Return : None.
*******************************************************************************/
#define _GetEPDblBuf0Count(bEpNum) (_GetEPTxCount(bEpNum))
#define _GetEPDblBuf1Count(bEpNum) (_GetEPRxCount(bEpNum))
extern __IO uint16_t wIstr; /* ISTR register last read value */
void SetCNTR(uint16_t /*wRegValue*/);
void SetISTR(uint16_t /*wRegValue*/);
void SetDADDR(uint16_t /*wRegValue*/);
void SetBTABLE(uint16_t /*wRegValue*/);
void SetBTABLE(uint16_t /*wRegValue*/);
uint16_t GetCNTR(void);
uint16_t GetISTR(void);
uint16_t GetFNR(void);
uint16_t GetDADDR(void);
uint16_t GetBTABLE(void);
void SetENDPOINT(uint8_t /*bEpNum*/, uint16_t /*wRegValue*/);
uint16_t GetENDPOINT(uint8_t /*bEpNum*/);
void SetEPType(uint8_t /*bEpNum*/, uint16_t /*wType*/);
uint16_t GetEPType(uint8_t /*bEpNum*/);
void SetEPTxStatus(uint8_t /*bEpNum*/, uint16_t /*wState*/);
void SetEPRxStatus(uint8_t /*bEpNum*/, uint16_t /*wState*/);
void SetDouBleBuffEPStall(uint8_t /*bEpNum*/, uint8_t bDir);
uint16_t GetEPTxStatus(uint8_t /*bEpNum*/);
uint16_t GetEPRxStatus(uint8_t /*bEpNum*/);
void SetEPTxValid(uint8_t /*bEpNum*/);
void SetEPRxValid(uint8_t /*bEpNum*/);
uint16_t GetTxStallStatus(uint8_t /*bEpNum*/);
uint16_t GetRxStallStatus(uint8_t /*bEpNum*/);
void SetEP_KIND(uint8_t /*bEpNum*/);
void ClearEP_KIND(uint8_t /*bEpNum*/);
void Set_Status_Out(uint8_t /*bEpNum*/);
void Clear_Status_Out(uint8_t /*bEpNum*/);
void SetEPDoubleBuff(uint8_t /*bEpNum*/);
void ClearEPDoubleBuff(uint8_t /*bEpNum*/);
void ClearEP_CTR_RX(uint8_t /*bEpNum*/);
void ClearEP_CTR_TX(uint8_t /*bEpNum*/);
void ToggleDTOG_RX(uint8_t /*bEpNum*/);
void ToggleDTOG_TX(uint8_t /*bEpNum*/);
void ClearDTOG_RX(uint8_t /*bEpNum*/);
void ClearDTOG_TX(uint8_t /*bEpNum*/);
void SetEPAddress(uint8_t /*bEpNum*/, uint8_t /*bAddr*/);
uint8_t GetEPAddress(uint8_t /*bEpNum*/);
void SetEPTxAddr(uint8_t /*bEpNum*/, uint16_t /*wAddr*/);
void SetEPRxAddr(uint8_t /*bEpNum*/, uint16_t /*wAddr*/);
uint16_t GetEPTxAddr(uint8_t /*bEpNum*/);
uint16_t GetEPRxAddr(uint8_t /*bEpNum*/);
void SetEPCountRxReg(uint32_t * /*pdwReg*/, uint16_t /*wCount*/);
void SetEPTxCount(uint8_t /*bEpNum*/, uint16_t /*wCount*/);
void SetEPRxCount(uint8_t /*bEpNum*/, uint16_t /*wCount*/);
uint16_t GetEPTxCount(uint8_t /*bEpNum*/);
uint16_t GetEPRxCount(uint8_t /*bEpNum*/);
void SetEPDblBuf0Addr(uint8_t /*bEpNum*/, uint16_t /*wBuf0Addr*/);
void SetEPDblBuf1Addr(uint8_t /*bEpNum*/, uint16_t /*wBuf1Addr*/);
void SetEPDblBuffAddr(uint8_t /*bEpNum*/, uint16_t /*wBuf0Addr*/, uint16_t /*wBuf1Addr*/);
uint16_t GetEPDblBuf0Addr(uint8_t /*bEpNum*/);
uint16_t GetEPDblBuf1Addr(uint8_t /*bEpNum*/);
void SetEPDblBuffCount(uint8_t /*bEpNum*/, uint8_t /*bDir*/, uint16_t /*wCount*/);
void SetEPDblBuf0Count(uint8_t /*bEpNum*/, uint8_t /*bDir*/, uint16_t /*wCount*/);
void SetEPDblBuf1Count(uint8_t /*bEpNum*/, uint8_t /*bDir*/, uint16_t /*wCount*/);
uint16_t GetEPDblBuf0Count(uint8_t /*bEpNum*/);
uint16_t GetEPDblBuf1Count(uint8_t /*bEpNum*/);
EP_DBUF_DIR GetEPDblBufDir(uint8_t /*bEpNum*/);
void FreeUserBuffer(uint8_t bEpNum/*bEpNum*/, uint8_t bDir);
uint16_t ToWord(uint8_t, uint8_t);
uint16_t ByteSwap(uint16_t);
#ifdef __cplusplus
}
#endif
#endif /* __USB_REGS_H */
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/USBLIB/USB-Driver/inc/usb_sil.h
+36
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@@ -0,0 +1,36 @@
/********************************** (C) COPYRIGHT *******************************
* File Name : usb_sil.h
* Author : WCH
* Version : V1.0.0
* Date : 2021/08/08
* Description : This file contains all the functions prototypes for the
* USB Simplified Interface Layer firmware library.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __USB_SIL_H
#define __USB_SIL_H
#ifdef __cplusplus
extern "C" {
#endif
#include "ch32v20x.h"
uint32_t USB_SIL_Init(void);
uint32_t USB_SIL_Write(uint8_t bEpAddr, uint8_t* pBufferPointer, uint32_t wBufferSize);
uint32_t USB_SIL_Read(uint8_t bEpAddr, uint8_t* pBufferPointer);
#ifdef __cplusplus
}
#endif
#endif /* __USB_SIL_H */
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/USBLIB/USB-Driver/inc/usb_type.h
+33
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@@ -0,0 +1,33 @@
/********************************** (C) COPYRIGHT *******************************
* File Name : usb_type.h
* Author : WCH
* Version : V1.0.0
* Date : 2021/08/08
* Description : This file contains all the functions prototypes for the
* USB types firmware library.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __USB_TYPE_H
#define __USB_TYPE_H
#include "debug.h"
#include "usb_conf.h"
#ifndef NULL
#define NULL ((void *)0)
#endif
typedef enum
{
FALSE = 0, TRUE = !FALSE
}
bool;
#endif /* __USB_TYPE_H */
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/USBLIB/USB-Driver/src/usb_core.c
+967
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/********************************** (C) COPYRIGHT *******************************
* File Name : usb_core.c
* Author : WCH
* Version : V1.0.0
* Date : 2021/08/08
* Description : Standard protocol processing (USB v2.0)
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include <SW_CDROM.h>
#include "usb_lib.h"
/* Global define */
#define ValBit(VAR,Place) (VAR & (1 << Place))
#define SetBit(VAR,Place) (VAR |= (1 << Place))
#define ClrBit(VAR,Place) (VAR &= ((1 << Place) ^ 255))
#define Send0LengthData() { _SetEPTxCount(ENDP0, 0); \
vSetEPTxStatus(EP_TX_VALID); \
}
#define vSetEPRxStatus(st) (SaveRState = st)
#define vSetEPTxStatus(st) (SaveTState = st)
#define USB_StatusIn() Send0LengthData()
#define USB_StatusOut() vSetEPRxStatus(EP_RX_VALID)
#define StatusInfo0 StatusInfo.bw.bb1
#define StatusInfo1 StatusInfo.bw.bb0
uint16_t_uint8_t StatusInfo;
bool Data_Mul_MaxPacketSize = FALSE;
static void DataStageOut(void);
static void DataStageIn(void);
static void NoData_Setup0(void);
static void Data_Setup0(void);
/*********************************************************************
* @fn Standard_GetConfiguration
*
* @brief Return the current configuration variable address.
*
* @param Length - How many bytes are needed.
*
* @return Return 1 - if the request is invalid when "Length" is 0.
* Return "Buffer" if the "Length" is not 0.
*/
uint8_t *Standard_GetConfiguration(uint16_t Length)
{
if (Length == 0)
{
pInformation->Ctrl_Info.Usb_wLength = sizeof(pInformation->Current_Configuration);
return 0;
}
pUser_Standard_Requests->User_GetConfiguration();
return (uint8_t *)&pInformation->Current_Configuration;
}
/*********************************************************************
* @fn Standard_SetConfiguration
*
* @brief This routine is called to set the configuration value
* Then each class should configure device itself.
*
* @param None.
*
* @return Return USB_SUCCESS - if the request is performed.
* Return USB_UNSUPPORT - if the request is invalid.
*/
RESULT Standard_SetConfiguration(void)
{
if ((pInformation->USBwValue0 <=
Device_Table.Total_Configuration) && (pInformation->USBwValue1 == 0)
&& (pInformation->USBwIndex == 0))
{
pInformation->Current_Configuration = pInformation->USBwValue0;
pUser_Standard_Requests->User_SetConfiguration();
return USB_SUCCESS;
}
else
{
return USB_UNSUPPORT;
}
}
/*********************************************************************
* @fn Standard_GetInterface
*
* @brief Return the Alternate Setting of the current interface.
*
* @param Length - How many bytes are needed.
*
* @return Return 0 - if the request is invalid when "Length" is 0.
* Return "Buffer" if the "Length" is not 0.
*/
uint8_t *Standard_GetInterface(uint16_t Length)
{
if (Length == 0)
{
pInformation->Ctrl_Info.Usb_wLength = sizeof(pInformation->Current_AlternateSetting);
return 0;
}
pUser_Standard_Requests->User_GetInterface();
return (uint8_t *)&pInformation->Current_AlternateSetting;
}
/*********************************************************************
* @fn Standard_SetInterface
*
* @brief This routine is called to set the interface.
* Then each class should configure the interface them self.
*
* @param None
*
* @return Return USB_SUCCESS - if the request is performed.
* Return USB_UNSUPPORT - if the request is invalid.
*/
RESULT Standard_SetInterface(void)
{
RESULT Re;
Re = (*pProperty->Class_Get_Interface_Setting)(pInformation->USBwIndex0, pInformation->USBwValue0);
if (pInformation->Current_Configuration != 0)
{
if ((Re != USB_SUCCESS) || (pInformation->USBwIndex1 != 0)
|| (pInformation->USBwValue1 != 0))
{
return USB_UNSUPPORT;
}
else if (Re == USB_SUCCESS)
{
pUser_Standard_Requests->User_SetInterface();
pInformation->Current_Interface = pInformation->USBwIndex0;
pInformation->Current_AlternateSetting = pInformation->USBwValue0;
return USB_SUCCESS;
}
}
return USB_UNSUPPORT;
}
/*********************************************************************
* @fn Standard_GetStatus
*
* @brief Copy the device request data to "StatusInfo buffer".
*
* @param Length - How many bytes are needed.
*
* @return Return 0 - if the request is at end of data block,
* or is invalid when "Length" is 0.
*/
uint8_t *Standard_GetStatus(uint16_t Length)
{
if (Length == 0)
{
pInformation->Ctrl_Info.Usb_wLength = 2;
return 0;
}
StatusInfo.w = 0;
if (Type_Recipient == (STANDARD_REQUEST | DEVICE_RECIPIENT))
{
uint8_t Feature = pInformation->Current_Feature;
if (ValBit(Feature, 5))
{
SetBit(StatusInfo0, 1);
}
else
{
ClrBit(StatusInfo0, 1);
}
if (ValBit(Feature, 6))
{
SetBit(StatusInfo0, 0);
}
else
{
ClrBit(StatusInfo0, 0);
}
}
else if (Type_Recipient == (STANDARD_REQUEST | INTERFACE_RECIPIENT))
{
return (uint8_t *)&StatusInfo;
}
else if (Type_Recipient == (STANDARD_REQUEST | ENDPOINT_RECIPIENT))
{
uint8_t Related_Endpoint;
uint8_t wIndex0 = pInformation->USBwIndex0;
Related_Endpoint = (wIndex0 & 0x0f);
if (ValBit(wIndex0, 7))
{
if (_GetTxStallStatus(Related_Endpoint))
{
SetBit(StatusInfo0, 0);
}
}
else
{
if (_GetRxStallStatus(Related_Endpoint))
{
SetBit(StatusInfo0, 0);
}
}
}
else
{
return NULL;
}
pUser_Standard_Requests->User_GetStatus();
return (uint8_t *)&StatusInfo;
}
/*********************************************************************
* @fn Standard_ClearFeature
*
* @brief Clear or disable a specific feature.
*
* @return Return USB_SUCCESS - if the request is performed.
* Return USB_UNSUPPORT - if the request is invalid.
*/
RESULT Standard_ClearFeature(void)
{
uint32_t Type_Rec = Type_Recipient;
uint32_t Status;
if (Type_Rec == (STANDARD_REQUEST | DEVICE_RECIPIENT))
{
ClrBit(pInformation->Current_Feature, 5);
return USB_SUCCESS;
}
else if (Type_Rec == (STANDARD_REQUEST | ENDPOINT_RECIPIENT))
{
DEVICE* pDev;
uint32_t Related_Endpoint;
uint32_t wIndex0;
uint32_t rEP;
if ((pInformation->USBwValue != ENDPOINT_STALL)
|| (pInformation->USBwIndex1 != 0))
{
return USB_UNSUPPORT;
}
pDev = &Device_Table;
wIndex0 = pInformation->USBwIndex0;
rEP = wIndex0 & ~0x80;
Related_Endpoint = ENDP0 + rEP;
if (ValBit(pInformation->USBwIndex0, 7))
{
Status = _GetEPTxStatus(Related_Endpoint);
}
else
{
Status = _GetEPRxStatus(Related_Endpoint);
}
if ((rEP >= pDev->Total_Endpoint) || (Status == 0)
|| (pInformation->Current_Configuration == 0))
{
return USB_UNSUPPORT;
}
if (wIndex0 & 0x80)
{
if (_GetTxStallStatus(Related_Endpoint ))
{
ClearDTOG_TX(Related_Endpoint);
SetEPTxStatus(Related_Endpoint, EP_TX_VALID);
if (Related_Endpoint == ENDP2)
{
if( CDROM_Transfer_Status & DEF_CDROM_CSW_UP_FLAG )
{
CDROM_Up_CSW( );
}
}
}
}
else
{
if (_GetRxStallStatus(Related_Endpoint))
{
if (Related_Endpoint == ENDP0)
{
SetEPRxCount(Related_Endpoint, Device_Property.MaxPacketSize);
_SetEPRxStatus(Related_Endpoint, EP_RX_VALID);
}
else
{
ClearDTOG_RX(Related_Endpoint);
_SetEPRxStatus(Related_Endpoint, EP_RX_VALID);
if (Related_Endpoint == ENDP3)
{
if( CDROM_Transfer_Status & DEF_CDROM_CSW_UP_FLAG )
{
CDROM_Up_CSW( );
}
}
}
}
}
pUser_Standard_Requests->User_ClearFeature();
return USB_SUCCESS;
}
return USB_UNSUPPORT;
}
/*********************************************************************
* @fn Standard_SetEndPointFeature
*
* @brief Set or enable a specific feature of EndPoint
*
* @return Return USB_SUCCESS - if the request is performed.
* Return USB_UNSUPPORT - if the request is invalid.
*/
RESULT Standard_SetEndPointFeature(void)
{
uint32_t wIndex0;
uint32_t Related_Endpoint;
uint32_t rEP;
uint32_t Status;
wIndex0 = pInformation->USBwIndex0;
rEP = wIndex0 & ~0x80;
Related_Endpoint = ENDP0 + rEP;
if (ValBit(pInformation->USBwIndex0, 7))
{
Status = _GetEPTxStatus(Related_Endpoint);
}
else
{
Status = _GetEPRxStatus(Related_Endpoint);
}
if (Related_Endpoint >= Device_Table.Total_Endpoint
|| pInformation->USBwValue != 0 || Status == 0
|| pInformation->Current_Configuration == 0)
{
return USB_UNSUPPORT;
}
else
{
if (wIndex0 & 0x80)
{
_SetEPTxStatus(Related_Endpoint, EP_TX_STALL);
}
else
{
_SetEPRxStatus(Related_Endpoint, EP_RX_STALL);
}
}
pUser_Standard_Requests->User_SetEndPointFeature();
return USB_SUCCESS;
}
/*********************************************************************
* @fn Standard_SetDeviceFeature
*
* @brief Set or enable a specific feature of Device.
*
* @return Return USB_SUCCESS - if the request is performed.
* Return USB_UNSUPPORT - if the request is invalid.
*/
RESULT Standard_SetDeviceFeature(void)
{
SetBit(pInformation->Current_Feature, 5);
pUser_Standard_Requests->User_SetDeviceFeature();
return USB_SUCCESS;
}
/*********************************************************************
* @fn Standard_GetDescriptorData
*
* @brief This routine is used for the descriptors resident in Flash
* or RAM pDesc can be in either Flash or RAM
* The purpose of this routine is to have a versatile way to
* response descriptors request. It allows user to generate
* certain descriptors with software or read descriptors from
* external storage part by part.
*
* @param Length - Length of the data in this transfer.
* pDesc - A pointer points to descriptor struct.
* The structure gives the initial address of the descriptor and
* its original size.
*
* @return Address of a part of the descriptor pointed by the Usb_
* wOffset The buffer pointed by this address contains at least
* Length bytes.
*/
uint8_t *Standard_GetDescriptorData(uint16_t Length, ONE_DESCRIPTOR *pDesc)
{
uint32_t wOffset;
wOffset = pInformation->Ctrl_Info.Usb_wOffset;
if (Length == 0)
{
pInformation->Ctrl_Info.Usb_wLength = pDesc->Descriptor_Size - wOffset;
return 0;
}
return pDesc->Descriptor + wOffset;
}
/*********************************************************************
* @fn DataStageOut
*
* @brief Data stage of a Control Write Transfer.
*
* @return none
*/
void DataStageOut(void)
{
ENDPOINT_INFO *pEPinfo = &pInformation->Ctrl_Info;
uint32_t save_rLength;
save_rLength = pEPinfo->Usb_rLength;
if (pEPinfo->CopyData && save_rLength)
{
uint8_t *Buffer;
uint32_t Length;
Length = pEPinfo->PacketSize;
if (Length > save_rLength)
{
Length = save_rLength;
}
Buffer = (*pEPinfo->CopyData)(Length);
pEPinfo->Usb_rLength -= Length;
pEPinfo->Usb_rOffset += Length;
PMAToUserBufferCopy(Buffer, GetEPRxAddr(ENDP0), Length);
}
if (pEPinfo->Usb_rLength != 0)
{
vSetEPRxStatus(EP_RX_VALID);
SetEPTxCount(ENDP0, 0);
vSetEPTxStatus(EP_TX_VALID);
}
if (pEPinfo->Usb_rLength >= pEPinfo->PacketSize)
{
pInformation->ControlState = OUT_DATA;
}
else
{
if (pEPinfo->Usb_rLength > 0)
{
pInformation->ControlState = LAST_OUT_DATA;
}
else if (pEPinfo->Usb_rLength == 0)
{
pInformation->ControlState = WAIT_STATUS_IN;
USB_StatusIn();
}
}
}
/*********************************************************************
* @fn DataStageIn
*
* @brief Data stage of a Control Read Transfer.
*
* @return none
*/
void DataStageIn(void)
{
ENDPOINT_INFO *pEPinfo = &pInformation->Ctrl_Info;
uint32_t save_wLength = pEPinfo->Usb_wLength;
uint32_t ControlState = pInformation->ControlState;
uint8_t *DataBuffer;
uint32_t Length;
if ((save_wLength == 0) && (ControlState == LAST_IN_DATA))
{
if(Data_Mul_MaxPacketSize == TRUE)
{
Send0LengthData();
ControlState = LAST_IN_DATA;
Data_Mul_MaxPacketSize = FALSE;
}
else
{
ControlState = WAIT_STATUS_OUT;
vSetEPTxStatus(EP_TX_STALL);
}
goto Expect_Status_Out;
}
Length = pEPinfo->PacketSize;
ControlState = (save_wLength <= Length) ? LAST_IN_DATA : IN_DATA;
if (Length > save_wLength)
{
Length = save_wLength;
}
DataBuffer = (*pEPinfo->CopyData)(Length);
UserToPMABufferCopy(DataBuffer, GetEPTxAddr(ENDP0), Length);
SetEPTxCount(ENDP0, Length);
pEPinfo->Usb_wLength -= Length;
pEPinfo->Usb_wOffset += Length;
vSetEPTxStatus(EP_TX_VALID);
USB_StatusOut();
Expect_Status_Out:
pInformation->ControlState = ControlState;
}
/*********************************************************************
* @fn NoData_Setup0
*
* @brief Proceed the processing of setup request without data stage.
*
* @return none
*/
void NoData_Setup0(void)
{
RESULT Result = USB_UNSUPPORT;
uint32_t RequestNo = pInformation->USBbRequest;
uint32_t ControlState;
if (Type_Recipient == (STANDARD_REQUEST | DEVICE_RECIPIENT))
{
if (RequestNo == SET_CONFIGURATION)
{
Result = Standard_SetConfiguration();
}
else if (RequestNo == SET_ADDRESS)
{
if ((pInformation->USBwValue0 > 127) || (pInformation->USBwValue1 != 0)
|| (pInformation->USBwIndex != 0)
|| (pInformation->Current_Configuration != 0))
{
ControlState = STALLED;
goto exit_NoData_Setup0;
}
else
{
Result = USB_SUCCESS;
}
}
else if (RequestNo == SET_FEATURE)
{
if ((pInformation->USBwValue0 == DEVICE_REMOTE_WAKEUP) \
&& (pInformation->USBwIndex == 0))
{
Result = Standard_SetDeviceFeature();
}
else
{
Result = USB_UNSUPPORT;
}
}
else if (RequestNo == CLEAR_FEATURE)
{
if (pInformation->USBwValue0 == DEVICE_REMOTE_WAKEUP
&& pInformation->USBwIndex == 0
&& ValBit(pInformation->Current_Feature, 5))
{
Result = Standard_ClearFeature();
}
else
{
Result = USB_UNSUPPORT;
}
}
}
else if (Type_Recipient == (STANDARD_REQUEST | INTERFACE_RECIPIENT))
{
if (RequestNo == SET_INTERFACE)
{
Result = Standard_SetInterface();
}
}
else if (Type_Recipient == (STANDARD_REQUEST | ENDPOINT_RECIPIENT))
{
if (RequestNo == CLEAR_FEATURE)
{
Result = Standard_ClearFeature();
}
else if (RequestNo == SET_FEATURE)
{
Result = Standard_SetEndPointFeature();
}
}
else
{
Result = USB_UNSUPPORT;
}
if (Result != USB_SUCCESS)
{
Result = (*pProperty->Class_NoData_Setup)(RequestNo);
if (Result == USB_NOT_READY)
{
ControlState = PAUSE;
goto exit_NoData_Setup0;
}
}
if (Result != USB_SUCCESS)
{
ControlState = STALLED;
goto exit_NoData_Setup0;
}
ControlState = WAIT_STATUS_IN;
USB_StatusIn();
exit_NoData_Setup0:
pInformation->ControlState = ControlState;
return;
}
/*********************************************************************
* @fn Data_Setup0
*
* @brief Proceed the processing of setup request with data stage.
*
* @return none
*/
void Data_Setup0(void)
{
uint8_t *(*CopyRoutine)(uint16_t);
RESULT Result;
uint32_t Request_No = pInformation->USBbRequest;
uint32_t Related_Endpoint, Reserved;
uint32_t wOffset, Status;
CopyRoutine = NULL;
wOffset = 0;
if (Request_No == GET_DESCRIPTOR)
{
if (Type_Recipient == (STANDARD_REQUEST | DEVICE_RECIPIENT))
{
uint8_t wValue1 = pInformation->USBwValue1;
if (wValue1 == DEVICE_DESCRIPTOR)
{
CopyRoutine = pProperty->GetDeviceDescriptor;
}
else if (wValue1 == CONFIG_DESCRIPTOR)
{
CopyRoutine = pProperty->GetConfigDescriptor;
}
else if (wValue1 == STRING_DESCRIPTOR)
{
CopyRoutine = pProperty->GetStringDescriptor;
}
}
}
else if ((Request_No == GET_STATUS) && (pInformation->USBwValue == 0)
&& (pInformation->USBwLength == 0x0002)
&& (pInformation->USBwIndex1 == 0))
{
if ((Type_Recipient == (STANDARD_REQUEST | DEVICE_RECIPIENT))
&& (pInformation->USBwIndex == 0))
{
CopyRoutine = Standard_GetStatus;
}
else if (Type_Recipient == (STANDARD_REQUEST | INTERFACE_RECIPIENT))
{
if (((*pProperty->Class_Get_Interface_Setting)(pInformation->USBwIndex0, 0) == USB_SUCCESS)
&& (pInformation->Current_Configuration != 0))
{
CopyRoutine = Standard_GetStatus;
}
}
else if (Type_Recipient == (STANDARD_REQUEST | ENDPOINT_RECIPIENT))
{
Related_Endpoint = (pInformation->USBwIndex0 & 0x0f);
Reserved = pInformation->USBwIndex0 & 0x70;
if (ValBit(pInformation->USBwIndex0, 7))
{
Status = _GetEPTxStatus(Related_Endpoint);
}
else
{
Status = _GetEPRxStatus(Related_Endpoint);
}
if ((Related_Endpoint < Device_Table.Total_Endpoint) && (Reserved == 0)
&& (Status != 0))
{
CopyRoutine = Standard_GetStatus;
}
}
}
else if (Request_No == GET_CONFIGURATION)
{
if (Type_Recipient == (STANDARD_REQUEST | DEVICE_RECIPIENT))
{
CopyRoutine = Standard_GetConfiguration;
}
}
else if (Request_No == GET_INTERFACE)
{
if ((Type_Recipient == (STANDARD_REQUEST | INTERFACE_RECIPIENT))
&& (pInformation->Current_Configuration != 0) && (pInformation->USBwValue == 0)
&& (pInformation->USBwIndex1 == 0) && (pInformation->USBwLength == 0x0001)
&& ((*pProperty->Class_Get_Interface_Setting)(pInformation->USBwIndex0, 0) == USB_SUCCESS))
{
CopyRoutine = Standard_GetInterface;
}
}
if (CopyRoutine)
{
pInformation->Ctrl_Info.Usb_wOffset = wOffset;
pInformation->Ctrl_Info.CopyData = CopyRoutine;
(*CopyRoutine)(0);
Result = USB_SUCCESS;
}
else
{
Result = (*pProperty->Class_Data_Setup)(pInformation->USBbRequest);
if (Result == USB_NOT_READY)
{
pInformation->ControlState = PAUSE;
return;
}
}
if (pInformation->Ctrl_Info.Usb_wLength == 0xFFFF)
{
pInformation->ControlState = PAUSE;
return;
}
if ((Result == USB_UNSUPPORT) || (pInformation->Ctrl_Info.Usb_wLength == 0))
{
pInformation->ControlState = STALLED;
return;
}
if (ValBit(pInformation->USBbmRequestType, 7))
{
__IO uint32_t wLength = pInformation->USBwLength;
if (pInformation->Ctrl_Info.Usb_wLength > wLength)
{
pInformation->Ctrl_Info.Usb_wLength = wLength;
}
else if (pInformation->Ctrl_Info.Usb_wLength < pInformation->USBwLength)
{
if (pInformation->Ctrl_Info.Usb_wLength < pProperty->MaxPacketSize)
{
Data_Mul_MaxPacketSize = FALSE;
}
else if ((pInformation->Ctrl_Info.Usb_wLength % pProperty->MaxPacketSize) == 0)
{
Data_Mul_MaxPacketSize = TRUE;
}
}
pInformation->Ctrl_Info.PacketSize = pProperty->MaxPacketSize;
DataStageIn();
}
else
{
pInformation->ControlState = OUT_DATA;
vSetEPRxStatus(EP_RX_VALID);
}
return;
}
/*********************************************************************
* @fn Setup0_Process
*
* @brief Get the device request data and dispatch to individual process.
*
* @return Post0_Process.
*/
uint8_t Setup0_Process(void)
{
union
{
uint8_t* b;
uint16_t* w;
} pBuf;
uint16_t offset = 1;
pBuf.b = PMAAddr + (uint8_t *)(_GetEPRxAddr(ENDP0) * 2); /* *2 for 32 bits addr */
if (pInformation->ControlState != PAUSE)
{
pInformation->USBbmRequestType = *pBuf.b++; /* bmRequestType */
pInformation->USBbRequest = *pBuf.b++; /* bRequest */
pBuf.w += offset; /* word not accessed because of 32 bits addressing */
pInformation->USBwValue = ByteSwap(*pBuf.w++); /* wValue */
pBuf.w += offset; /* word not accessed because of 32 bits addressing */
pInformation->USBwIndex = ByteSwap(*pBuf.w++); /* wIndex */
pBuf.w += offset; /* word not accessed because of 32 bits addressing */
pInformation->USBwLength = *pBuf.w; /* wLength */
}
pInformation->ControlState = SETTING_UP;
if (pInformation->USBwLength == 0)
{
NoData_Setup0();
}
else
{
Data_Setup0();
}
return Post0_Process();
}
/*********************************************************************
* @fn In0_Process
*
* @brief Process the IN token on all default endpoint.
*
* @return none
*/
uint8_t In0_Process(void)
{
uint32_t ControlState = pInformation->ControlState;
if ((ControlState == IN_DATA) || (ControlState == LAST_IN_DATA))
{
DataStageIn();
ControlState = pInformation->ControlState;
}
else if (ControlState == WAIT_STATUS_IN)
{
if ((pInformation->USBbRequest == SET_ADDRESS) &&
(Type_Recipient == (STANDARD_REQUEST | DEVICE_RECIPIENT)))
{
SetDeviceAddress(pInformation->USBwValue0);
pUser_Standard_Requests->User_SetDeviceAddress();
}
(*pProperty->Process_Status_IN)();
ControlState = STALLED;
}
else
{
ControlState = STALLED;
}
pInformation->ControlState = ControlState;
return Post0_Process();
}
/*********************************************************************
* @fn Out0_Process
*
* @brief Process the OUT token on all default endpoint.
*
* @return none
*/
uint8_t Out0_Process(void)
{
uint32_t ControlState = pInformation->ControlState;
if ((ControlState == IN_DATA) || (ControlState == LAST_IN_DATA))
{
ControlState = STALLED;
}
else if ((ControlState == OUT_DATA) || (ControlState == LAST_OUT_DATA))
{
DataStageOut();
ControlState = pInformation->ControlState;
}
else if (ControlState == WAIT_STATUS_OUT)
{
(*pProperty->Process_Status_OUT)();
ControlState = STALLED;
}
else
{
ControlState = STALLED;
}
pInformation->ControlState = ControlState;
return Post0_Process();
}
/*********************************************************************
* @fn Post0_Process
*
* @brief Stall the Endpoint 0 in case of error.
*
* @return 0 - if the control State is in PAUSE
* 1 - if not.
*/
uint8_t Post0_Process(void)
{
SetEPRxCount(ENDP0, Device_Property.MaxPacketSize);
if (pInformation->ControlState == STALLED)
{
vSetEPRxStatus(EP_RX_STALL);
vSetEPTxStatus(EP_TX_STALL);
}
return (pInformation->ControlState == PAUSE);
}
/*********************************************************************
* @fn SetDeviceAddress
*
* @brief Set the device and all the used Endpoints addresses.
*
* @param Val - device address.
*
* @return none
*/
void SetDeviceAddress(uint8_t Val)
{
uint32_t i;
uint32_t nEP = Device_Table.Total_Endpoint;
for (i = 0; i < nEP; i++)
{
_SetEPAddress((uint8_t)i, (uint8_t)i);
}
_SetDADDR(Val | DADDR_EF);
}
/*********************************************************************
* @fn NOP_Process
*
* @brief No operation function.
*
* @return none
*/
void NOP_Process(void)
{
}
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/USBLIB/USB-Driver/src/usb_init.c
+42
View File
@@ -0,0 +1,42 @@
/********************************** (C) COPYRIGHT *******************************
* File Name : usb_init.c
* Author : WCH
* Version : V1.0.0
* Date : 2021/08/08
* Description : Initialization routines & global variables
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "usb_lib.h"
uint8_t EPindex;
DEVICE_INFO *pInformation;
DEVICE_PROP *pProperty;
uint16_t SaveState ;
uint16_t wInterrupt_Mask;
DEVICE_INFO Device_Info;
USER_STANDARD_REQUESTS *pUser_Standard_Requests;
/*******************************************************************************
* @fn USB_Init
*
* @brief USB system initialization
*
* @return None.
*
*/
void USB_Init(void)
{
pInformation = &Device_Info;
pInformation->ControlState = 2;
pProperty = &Device_Property;
pUser_Standard_Requests = &User_Standard_Requests;
pProperty->Init();
}
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/USBLIB/USB-Driver/src/usb_int.c
+133
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@@ -0,0 +1,133 @@
/********************************** (C) COPYRIGHT *******************************
* File Name : usb_int.c
* Author : WCH
* Version : V1.0.0
* Date : 2021/08/08
* Description : Endpoint CTR (Low and High) interrupt's service routines
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "usb_lib.h"
/* Private variables */
__IO uint16_t SaveRState;
__IO uint16_t SaveTState;
/* Extern variables */
extern void (*pEpInt_IN[7])(void); /* Handles IN interrupts */
extern void (*pEpInt_OUT[7])(void); /* Handles OUT interrupts */
/*******************************************************************************
* @fn CTR_LP.
*
* @brief Low priority Endpoint Correct Transfer interrupt's service
* routine.
*
* @return None.
*/
void CTR_LP(void)
{
__IO uint16_t wEPVal = 0;
while (((wIstr = _GetISTR()) & ISTR_CTR) != 0)
{
EPindex = (uint8_t)(wIstr & ISTR_EP_ID);
if (EPindex == 0)
{
SaveRState = _GetENDPOINT(ENDP0);
SaveTState = SaveRState & EPTX_STAT;
SaveRState &= EPRX_STAT;
_SetEPRxTxStatus(ENDP0,EP_RX_NAK,EP_TX_NAK);
if ((wIstr & ISTR_DIR) == 0)
{
_ClearEP_CTR_TX(ENDP0);
In0_Process();
_SetEPRxTxStatus(ENDP0,SaveRState,SaveTState);
return;
}
else
{
wEPVal = _GetENDPOINT(ENDP0);
if ((wEPVal &EP_SETUP) != 0)
{
_ClearEP_CTR_RX(ENDP0);
Setup0_Process();
_SetEPRxTxStatus(ENDP0,SaveRState,SaveTState);
return;
}
else if ((wEPVal & EP_CTR_RX) != 0)
{
_ClearEP_CTR_RX(ENDP0);
Out0_Process();
_SetEPRxTxStatus(ENDP0,SaveRState,SaveTState);
return;
}
}
}
else
{
wEPVal = _GetENDPOINT(EPindex);
if ((wEPVal & EP_CTR_RX) != 0)
{
_ClearEP_CTR_RX(EPindex);
(*pEpInt_OUT[EPindex-1])();
}
if ((wEPVal & EP_CTR_TX) != 0)
{
_ClearEP_CTR_TX(EPindex);
(*pEpInt_IN[EPindex-1])();
}
}
}
}
/*******************************************************************************
* @fn CTR_HP.
*
* @brief High Priority Endpoint Correct Transfer interrupt's service
* routine.
*
* @return None.
*/
void CTR_HP(void)
{
uint32_t wEPVal = 0;
while (((wIstr = _GetISTR()) & ISTR_CTR) != 0)
{
_SetISTR((uint16_t)CLR_CTR);
EPindex = (uint8_t)(wIstr & ISTR_EP_ID);
wEPVal = _GetENDPOINT(EPindex);
if ((wEPVal & EP_CTR_RX) != 0)
{
_ClearEP_CTR_RX(EPindex);
(*pEpInt_OUT[EPindex-1])();
}
else if ((wEPVal & EP_CTR_TX) != 0)
{
_ClearEP_CTR_TX(EPindex);
(*pEpInt_IN[EPindex-1])();
}
}
}
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/USBLIB/USB-Driver/src/usb_mem.c
+74
View File
@@ -0,0 +1,74 @@
/********************************** (C) COPYRIGHT *******************************
* File Name : usb_mem.c
* Author : WCH
* Version : V1.0.0
* Date : 2021/08/08
* Description : Utility functions for memory transfers to/from PMA
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "usb_lib.h"
/*******************************************************************************
* @fn UserToPMABufferCopy
*
* @brief Copy a buffer from user memory area to packet memory area (PMA)
*
* @param pbUsrBuf: pointer to user memory area.
* wPMABufAddr: address into PMA.
* wNBytes: no. of bytes to be copied.
*
* @param None .
*/
void UserToPMABufferCopy(uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
uint32_t n = (wNBytes + 1) >> 1;
uint32_t i, temp1, temp2;
uint16_t *pdwVal;
pdwVal = (uint16_t *)(wPMABufAddr * 2 + PMAAddr);
for (i = n; i != 0; i--)
{
temp1 = (uint16_t) * pbUsrBuf;
pbUsrBuf++;
temp2 = temp1 | (uint16_t) * pbUsrBuf << 8;
*pdwVal++ = temp2;
pdwVal++;
pbUsrBuf++;
}
}
/*******************************************************************************
* @fn PMAToUserBufferCopy
*
* @brief Copy a buffer from user memory area to packet memory area (PMA)
*
* @param pbUsrBuf: pointer to user memory area.
* wPMABufAddr: address into PMA.
* wNBytes: no. of bytes to be copied.
*
* @param None.
*/
void PMAToUserBufferCopy(uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
uint32_t n = (wNBytes + 1) >> 1;
uint32_t i;
uint32_t *pdwVal;
pdwVal = (uint32_t *)(wPMABufAddr * 2 + PMAAddr);
for (i = n; i != 0; i--)
{
*(uint16_t*)pbUsrBuf++ = *pdwVal++;
pbUsrBuf++;
}
}
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/USBLIB/USB-Driver/src/usb_regs.c
+852
View File
@@ -0,0 +1,852 @@
/********************************** (C) COPYRIGHT *******************************
* File Name : usb_regs.c
* Author : WCH
* Version : V1.0.0
* Date : 2021/08/08
* Description : Interface functions to USB cell registers
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "usb_lib.h"
/*******************************************************************************
* @fn SetCNTR.
*
* @brief Set the CNTR register value.
*
* @param wRegValue: new register value.
*
* @return None.
*/
void SetCNTR(uint16_t wRegValue)
{
_SetCNTR(wRegValue);
}
/*******************************************************************************
* @fn GetCNTR.
*
* @brief returns the CNTR register value.
*
* @param None.
*
* @return CNTR register Value.
*/
uint16_t GetCNTR(void)
{
return(_GetCNTR());
}
/*******************************************************************************
* @fn SetISTR.
*
* @brief Set the ISTR register value.
*
* @param wRegValue: new register value.
*
* @return None.
*/
void SetISTR(uint16_t wRegValue)
{
_SetISTR(wRegValue);
}
/*******************************************************************************
* @fn GetISTR
*
* @brief Returns the ISTR register value.
*
* @param None.
*
* @return ISTR register Value
*/
uint16_t GetISTR(void)
{
return(_GetISTR());
}
/*******************************************************************************
* @fn GetFNR
*
* @brief Returns the FNR register value.
*
* @param None.
*
* @return FNR register Value
*/
uint16_t GetFNR(void)
{
return(_GetFNR());
}
/*******************************************************************************
* @fn SetDADDR
*
* @brief Set the DADDR register value.
*
* @param wRegValue: new register value.
*
* @return None.
*/
void SetDADDR(uint16_t wRegValue)
{
_SetDADDR(wRegValue);
}
/*******************************************************************************
* @fn GetDADDR
*
* @brief Returns the DADDR register value.
*
* @return DADDR register Value
*
*/
uint16_t GetDADDR(void)
{
return(_GetDADDR());
}
/*******************************************************************************
* @fn SetBTABLE
*
* @brief Set the BTABLE.
*
* @param wRegValue: New register value.
*
* @return None.
*/
void SetBTABLE(uint16_t wRegValue)
{
_SetBTABLE(wRegValue);
}
/*******************************************************************************
* @fn GetBTABLE.
*
* @param Returns the BTABLE register value.
*
* @return BTABLE address.
*/
uint16_t GetBTABLE(void)
{
return(_GetBTABLE());
}
/*******************************************************************************
* @fn SetENDPOINT
*
* @brief Set the Endpoint register value.
*
* @param bEpNum: Endpoint Number.
* wRegValue.
*
* @return None.
*/
void SetENDPOINT(uint8_t bEpNum, uint16_t wRegValue)
{
_SetENDPOINT(bEpNum, wRegValue);
}
/*******************************************************************************
* @fn GetENDPOINT
*
* @brief Return the Endpoint register value.
*
* @param bEpNum: Endpoint Number.
*
* @return Endpoint register value.
*/
uint16_t GetENDPOINT(uint8_t bEpNum)
{
return(_GetENDPOINT(bEpNum));
}
/*******************************************************************************
* @fn SetEPType
*
* @brief sets the type in the endpoint register.
*
* @param bEpNum: Endpoint Number.
* wType: type definition.
*
* @return None.
*/
void SetEPType(uint8_t bEpNum, uint16_t wType)
{
_SetEPType(bEpNum, wType);
}
/*******************************************************************************
* @fn GetEPType
*
* @brief Returns the endpoint type.
*
* @param bEpNum: Endpoint Number.
*
* @return Endpoint Type
*/
uint16_t GetEPType(uint8_t bEpNum)
{
return(_GetEPType(bEpNum));
}
/*******************************************************************************
* @fn SetEPTxStatus
*
* @brief Set the status of Tx endpoint.
*
* @param bEpNum: Endpoint Number.
* wState: new state.
*
* @return None.
*/
void SetEPTxStatus(uint8_t bEpNum, uint16_t wState)
{
_SetEPTxStatus(bEpNum, wState);
}
/*******************************************************************************
* @fn SetEPRxStatus
*
* @brief Set the status of Rx endpoint.
*
* @param bEpNum: Endpoint Number.
* wState: new state.
*
* @return None.
*/
void SetEPRxStatus(uint8_t bEpNum, uint16_t wState)
{
_SetEPRxStatus(bEpNum, wState);
}
/*******************************************************************************
* @fn SetDouBleBuffEPStall
*
* @brief sets the status for Double Buffer Endpoint to STALL
*
* @param bEpNum: Endpoint Number.
* bDir: Endpoint direction.
*
* @return None.
*/
void SetDouBleBuffEPStall(uint8_t bEpNum, uint8_t bDir)
{
uint16_t Endpoint_DTOG_Status;
Endpoint_DTOG_Status = GetENDPOINT(bEpNum);
if (bDir == EP_DBUF_OUT)
{
_SetENDPOINT(bEpNum, Endpoint_DTOG_Status & ~EPRX_DTOG1);
}
else if (bDir == EP_DBUF_IN)
{
_SetENDPOINT(bEpNum, Endpoint_DTOG_Status & ~EPTX_DTOG1);
}
}
/*******************************************************************************
* @fn GetEPTxStatus
*
* @brief Returns the endpoint Tx status.
*
* @param bEpNum: Endpoint Number.
*
* @return Endpoint TX Status
*/
uint16_t GetEPTxStatus(uint8_t bEpNum)
{
return(_GetEPTxStatus(bEpNum));
}
/*******************************************************************************
* @fn GetEPRxStatus
*
* @brief Returns the endpoint Rx status.
*
* @param bEpNum: Endpoint Number.
*
* @return Endpoint RX Status
*/
uint16_t GetEPRxStatus(uint8_t bEpNum)
{
return(_GetEPRxStatus(bEpNum));
}
/*******************************************************************************
* @fn SetEPTxValid
*
* @brief Valid the endpoint Tx Status.
*
* @param bEpNum: Endpoint Number.
*
* @return None.
*/
void SetEPTxValid(uint8_t bEpNum)
{
_SetEPTxStatus(bEpNum, EP_TX_VALID);
}
/*******************************************************************************
* @fn SetEPRxValid
*
* @brief Valid the endpoint Rx Status.
*
* @param bEpNum: Endpoint Number.
*
* @return None.
*/
void SetEPRxValid(uint8_t bEpNum)
{
_SetEPRxStatus(bEpNum, EP_RX_VALID);
}
/*******************************************************************************
* @fn SetEP_KIND
*
* @brief Clear the EP_KIND bit.
*
* @param bEpNum: Endpoint Number.
*
* @return None.
*/
void SetEP_KIND(uint8_t bEpNum)
{
_SetEP_KIND(bEpNum);
}
/*******************************************************************************
* @fn ClearEP_KIND
*
* @brief set the EP_KIND bit.
*
* @param bEpNum: Endpoint Number.
*
* @return None.
*/
void ClearEP_KIND(uint8_t bEpNum)
{
_ClearEP_KIND(bEpNum);
}
/*******************************************************************************
* @fn Clear_Status_Out
*
* @brief Clear the Status Out of the related Endpoint
*
* @param bEpNum: Endpoint Number.
*
* @return None.
*/
void Clear_Status_Out(uint8_t bEpNum)
{
_ClearEP_KIND(bEpNum);
}
/*******************************************************************************
* @fn Set_Status_Out
*
* @brief Set the Status Out of the related Endpoint
*
* @param bEpNum: Endpoint Number.
*
* @return None.
*/
void Set_Status_Out(uint8_t bEpNum)
{
_SetEP_KIND(bEpNum);
}
/*******************************************************************************
* @fn SetEPDoubleBuff
*
* @brief Enable the double buffer feature for the endpoint.
*
* @param bEpNum: Endpoint Number.
*
* @return None.
*/
void SetEPDoubleBuff(uint8_t bEpNum)
{
_SetEP_KIND(bEpNum);
}
/*******************************************************************************
* @fn ClearEPDoubleBuff
*
* @brief Disable the double buffer feature for the endpoint.
*
* @param bEpNum: Endpoint Number.
*
* @return None.
*/
void ClearEPDoubleBuff(uint8_t bEpNum)
{
_ClearEP_KIND(bEpNum);
}
/*******************************************************************************
* @fn GetTxStallStatus
*
* @brief Returns the Stall status of the Tx endpoint.
*
* @param bEpNum: Endpoint Number.
*
* @return Tx Stall status.
*/
uint16_t GetTxStallStatus(uint8_t bEpNum)
{
return(_GetTxStallStatus(bEpNum));
}
/*******************************************************************************
* @fn GetRxStallStatus
*
* @brief Returns the Stall status of the Rx endpoint.
*
* @param bEpNum: Endpoint Number.
*
* @return Rx Stall status.
*/
uint16_t GetRxStallStatus(uint8_t bEpNum)
{
return(_GetRxStallStatus(bEpNum));
}
/*******************************************************************************
* @fn ClearEP_CTR_RX
*
* @brief Clear the CTR_RX bit.
*
* @param bEpNum: Endpoint Number.
*
* @return None.
*/
void ClearEP_CTR_RX(uint8_t bEpNum)
{
_ClearEP_CTR_RX(bEpNum);
}
/*******************************************************************************
* @fn ClearEP_CTR_TX
*
* @brief Clear the CTR_TX bit.
*
* @param bEpNum: Endpoint Number.
*
* @return None.
*/
void ClearEP_CTR_TX(uint8_t bEpNum)
{
_ClearEP_CTR_TX(bEpNum);
}
/*******************************************************************************
* @fn ToggleDTOG_RX
*
* @brief Toggle the DTOG_RX bit.
*
* @param bEpNum: Endpoint Number.
*
* @return None.
*/
void ToggleDTOG_RX(uint8_t bEpNum)
{
_ToggleDTOG_RX(bEpNum);
}
/*******************************************************************************
* @fn ToggleDTOG_TX
*
* @brief Toggle the DTOG_TX bit.
*
* @param bEpNum: Endpoint Number.
*
* @return None.
*/
void ToggleDTOG_TX(uint8_t bEpNum)
{
_ToggleDTOG_TX(bEpNum);
}
/*******************************************************************************
* @fn ClearDTOG_RX.
*
* @brief Clear the DTOG_RX bit.
*
* @param bEpNum: Endpoint Number.
*
* @return None.
*/
void ClearDTOG_RX(uint8_t bEpNum)
{
_ClearDTOG_RX(bEpNum);
}
/*******************************************************************************
* @fn ClearDTOG_TX.
*
* @brief Clear the DTOG_TX bit.
*
* @param bEpNum: Endpoint Number.
*
* @return None.
*/
void ClearDTOG_TX(uint8_t bEpNum)
{
_ClearDTOG_TX(bEpNum);
}
/*******************************************************************************
* @fn SetEPAddress
*
* @brief Set the endpoint address.
*
* @param bEpNum: Endpoint Number.
* bAddr: New endpoint address.
*
* @return None.
*/
void SetEPAddress(uint8_t bEpNum, uint8_t bAddr)
{
_SetEPAddress(bEpNum, bAddr);
}
/*******************************************************************************
* @fn GetEPAddress
*
* @brief Get the endpoint address.
*
* @param bEpNum: Endpoint Number.
*
* @return Endpoint address.
*/
uint8_t GetEPAddress(uint8_t bEpNum)
{
return(_GetEPAddress(bEpNum));
}
/*******************************************************************************
* @fn SetEPTxAddr
*
* @brief Set the endpoint Tx buffer address.
*
* @param bEpNum: Endpoint Number.
* wAddr: new address.
*
* @return None.
*/
void SetEPTxAddr(uint8_t bEpNum, uint16_t wAddr)
{
_SetEPTxAddr(bEpNum, wAddr);
}
/*******************************************************************************
* @fn SetEPRxAddr
*
* @brief Set the endpoint Rx buffer address.
*
* @param bEpNum: Endpoint Number.
* wAddr: new address.
*
* @return None.
*/
void SetEPRxAddr(uint8_t bEpNum, uint16_t wAddr)
{
_SetEPRxAddr(bEpNum, wAddr);
}
/*******************************************************************************
* @fn GetEPTxAddr
*
* @brief Returns the endpoint Tx buffer address.
*
* @param bEpNum: Endpoint Number.
*
* @return Rx buffer address.
*/
uint16_t GetEPTxAddr(uint8_t bEpNum)
{
return(_GetEPTxAddr(bEpNum));
}
/*******************************************************************************
* @fn GetEPRxAddr.
*
* @brief Returns the endpoint Rx buffer address.
*
* @param bEpNum: Endpoint Number.
*
* @returnRx buffer address.
*/
uint16_t GetEPRxAddr(uint8_t bEpNum)
{
return(_GetEPRxAddr(bEpNum));
}
/*******************************************************************************
* @fn SetEPTxCount.
*
* @brief Set the Tx count.
*
* @param bEpNum: Endpoint Number.
* wCount: new count value.
*
* @return None.
*/
void SetEPTxCount(uint8_t bEpNum, uint16_t wCount)
{
_SetEPTxCount(bEpNum, wCount);
}
/*******************************************************************************
* @fn SetEPCountRxReg.
*
* @brief Set the Count Rx Register value.
*
* @param *pdwReg: point to the register.
* wCount: the new register value.
*
* @return None.
*/
void SetEPCountRxReg(uint32_t *pdwReg, uint16_t wCount)
{
_SetEPCountRxReg(dwReg, wCount);
}
/*******************************************************************************
* @fn SetEPRxCount
*
* @brief Set the Rx count.
*
* @param bEpNum: Endpoint Number.
* wCount: the new count value.
*
* @return None.
*/
void SetEPRxCount(uint8_t bEpNum, uint16_t wCount)
{
_SetEPRxCount(bEpNum, wCount);
}
/*******************************************************************************
* @fn GetEPTxCount
*
* @brief Get the Tx count.
*
* @param bEpNum: Endpoint Number.
*
* @return Tx count value.
*/
uint16_t GetEPTxCount(uint8_t bEpNum)
{
return(_GetEPTxCount(bEpNum));
}
/*******************************************************************************
* @fn GetEPRxCount
*
* @brief Get the Rx count.
*
* @param bEpNum: Endpoint Number.
*
* @return Rx count value.
*/
uint16_t GetEPRxCount(uint8_t bEpNum)
{
return(_GetEPRxCount(bEpNum));
}
/*******************************************************************************
* @fn SetEPDblBuffAddr
*
* @brief Set the addresses of the buffer 0 and 1.
*
* @param bEpNum: Endpoint Number.
* wBuf0Addr: new address of buffer 0.
* wBuf1Addr: new address of buffer 1.
*
* @return None.
*/
void SetEPDblBuffAddr(uint8_t bEpNum, uint16_t wBuf0Addr, uint16_t wBuf1Addr)
{
_SetEPDblBuffAddr(bEpNum, wBuf0Addr, wBuf1Addr);
}
/*******************************************************************************
* @fn SetEPDblBuf0Addr
*
* @brief Set the Buffer 1 address.
*
* @param bEpNum: Endpoint Number
* wBuf0Addr: new address.
*
* @return None.
*/
void SetEPDblBuf0Addr(uint8_t bEpNum, uint16_t wBuf0Addr)
{
_SetEPDblBuf0Addr(bEpNum, wBuf0Addr);
}
/*******************************************************************************
* @fn SetEPDblBuf1Addr
*
* @brief Set the Buffer 1 address.
*
* @param bEpNum: Endpoint Number
* wBuf1Addr: new address.
*
* @return None.
*/
void SetEPDblBuf1Addr(uint8_t bEpNum, uint16_t wBuf1Addr)
{
_SetEPDblBuf1Addr(bEpNum, wBuf1Addr);
}
/*******************************************************************************
* @fn GetEPDblBuf0Addr
*
* @brief Returns the address of the Buffer 0.
*
* @param bEpNum: Endpoint Number.
*
* @return None.
*/
uint16_t GetEPDblBuf0Addr(uint8_t bEpNum)
{
return(_GetEPDblBuf0Addr(bEpNum));
}
/*******************************************************************************
* @fn GetEPDblBuf1Addr
*
* @brief Returns the address of the Buffer 1.
*
* @param bEpNum: Endpoint Number.
*
* @return Address of the Buffer 1.
*/
uint16_t GetEPDblBuf1Addr(uint8_t bEpNum)
{
return(_GetEPDblBuf1Addr(bEpNum));
}
/*******************************************************************************
* @fn SetEPDblBuffCount
*
* @brief Set the number of bytes for a double Buffer
* endpoint.
*
* @param bEpNum,bDir, wCount
*
* @return None.
*/
void SetEPDblBuffCount(uint8_t bEpNum, uint8_t bDir, uint16_t wCount)
{
_SetEPDblBuffCount(bEpNum, bDir, wCount);
}
/*******************************************************************************
* @fn SetEPDblBuf0Count
*
* @brief Set the number of bytes in the buffer 0 of a double Buffer
* endpoint.
*
* @param bEpNum, bDir, wCount
*
* @return None.
*/
void SetEPDblBuf0Count(uint8_t bEpNum, uint8_t bDir, uint16_t wCount)
{
_SetEPDblBuf0Count(bEpNum, bDir, wCount);
}
/*******************************************************************************
* @fn SetEPDblBuf1Count
*
* @brief Set the number of bytes in the buffer 0 of a double Buffer
* endpoint.
*
* @param bEpNum, bDir, wCount
*
* @return None.
*/
void SetEPDblBuf1Count(uint8_t bEpNum, uint8_t bDir, uint16_t wCount)
{
_SetEPDblBuf1Count(bEpNum, bDir, wCount);
}
/*******************************************************************************
* @fn GetEPDblBuf0Count
*
* @brief Returns the number of byte received in the buffer 0 of a double
* Buffer endpoint.
*
* @param bEpNum: Endpoint Number.
*
* @return Endpoint Buffer 0 count
*/
uint16_t GetEPDblBuf0Count(uint8_t bEpNum)
{
return(_GetEPDblBuf0Count(bEpNum));
}
/*******************************************************************************
* @fn GetEPDblBuf1Count
*
* @brief Returns the number of data received in the buffer 1 of a double
* Buffer endpoint.
*
* @param bEpNum: Endpoint Number.
*
* @return Endpoint Buffer 1 count.
*/
uint16_t GetEPDblBuf1Count(uint8_t bEpNum)
{
return(_GetEPDblBuf1Count(bEpNum));
}
/*******************************************************************************
* @fn GetEPDblBufDir
*
* @brief gets direction of the double buffered endpoint
*
* @param bEpNum: Endpoint Number.
*
* @return EP_DBUF_OUT, EP_DBUF_IN,
* EP_DBUF_ERR if the endpoint counter not yet programmed.
*/
EP_DBUF_DIR GetEPDblBufDir(uint8_t bEpNum)
{
if ((uint16_t)(*_pEPRxCount(bEpNum) & 0xFC00) != 0)
return(EP_DBUF_OUT);
else if (((uint16_t)(*_pEPTxCount(bEpNum)) & 0x03FF) != 0)
return(EP_DBUF_IN);
else
return(EP_DBUF_ERR);
}
/*******************************************************************************
* @fn FreeUserBuffer
*
* @brief free buffer used from the application realizing it to the line
toggles bit SW_BUF in the double buffered endpoint register
*
* @param bEpNum, bDir
*
* @return None.
*/
void FreeUserBuffer(uint8_t bEpNum, uint8_t bDir)
{
if (bDir == EP_DBUF_OUT)
{
_ToggleDTOG_TX(bEpNum);
}
else if (bDir == EP_DBUF_IN)
{
_ToggleDTOG_RX(bEpNum);
}
}
/*******************************************************************************
* @fn ToWord
*
* @brief merge two byte in a word.
*
* @param bh: byte high, bl: bytes low.
*
* @return resulted word.
*/
uint16_t ToWord(uint8_t bh, uint8_t bl)
{
uint16_t wRet;
wRet = (uint16_t)bl | ((uint16_t)bh << 8);
return(wRet);
}
/*******************************************************************************
* @fn ByteSwap
*
* @brief Swap two byte in a word.
*
* @param wSwW: word to Swap.
*
* @return resulted word.
*/
uint16_t ByteSwap(uint16_t wSwW)
{
uint8_t bTemp;
uint16_t wRet;
bTemp = (uint8_t)(wSwW & 0xff);
wRet = (wSwW >> 8) | ((uint16_t)bTemp << 8);
return(wRet);
}
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/USBLIB/USB-Driver/src/usb_sil.c
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/********************************** (C) COPYRIGHT *******************************
* File Name : usb_sil.c
* Author : WCH
* Version : V1.0.0
* Date : 2021/08/08
* Description : Simplified Interface Layer for Global Initialization and
* Endpoint Rea/Write operations.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "usb_lib.h"
/*******************************************************************************
* @fn USB_SIL_Init
*
* @brief Initialize the USB Device IP and the Endpoint 0.
*
* @return Status.
*/
uint32_t USB_SIL_Init(void)
{
_SetISTR(0);
wInterrupt_Mask = IMR_MSK;
_SetCNTR(wInterrupt_Mask);
return 0;
}
/*******************************************************************************
* @fn USB_SIL_Write
*
* @brief Write a buffer of data to a selected endpoint.
*
* @param bEpAddr: The address of the non control endpoint.
* pBufferPointer: The pointer to the buffer of data to be written
* to the endpoint.
* wBufferSize: Number of data to be written (in bytes).
*
* @return Status.
*/
uint32_t USB_SIL_Write(uint8_t bEpAddr, uint8_t* pBufferPointer, uint32_t wBufferSize)
{
UserToPMABufferCopy(pBufferPointer, GetEPTxAddr(bEpAddr & 0x7F), wBufferSize);
SetEPTxCount((bEpAddr & 0x7F), wBufferSize);
return 0;
}
/*******************************************************************************
* @fn USB_SIL_Read
*
* @brief Write a buffer of data to a selected endpoint.
*
* @param bEpAddr: The address of the non control endpoint.
* pBufferPointer: The pointer to which will be saved the
* received data buffer.
*
* @return Number of received data (in Bytes).
*/
uint32_t USB_SIL_Read(uint8_t bEpAddr, uint8_t* pBufferPointer)
{
uint32_t DataLength = 0;
DataLength = GetEPRxCount(bEpAddr & 0x7F);
PMAToUserBufferCopy(pBufferPointer, GetEPRxAddr(bEpAddr & 0x7F), DataLength);
return DataLength;
}
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/ch32v20x_conf.h
+42
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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v20x_conf.h
* Author : WCH
* Version : V1.0.0
* Date : 2021/06/06
* Description : Library configuration file.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH32V20x_CONF_H
#define __CH32V20x_CONF_H
#include "ch32v20x_adc.h"
#include "ch32v20x_bkp.h"
#include "ch32v20x_can.h"
#include "ch32v20x_crc.h"
#include "ch32v20x_dbgmcu.h"
#include "ch32v20x_dma.h"
#include "ch32v20x_exti.h"
#include "ch32v20x_flash.h"
#include "ch32v20x_gpio.h"
#include "ch32v20x_i2c.h"
#include "ch32v20x_iwdg.h"
#include "ch32v20x_pwr.h"
#include "ch32v20x_rcc.h"
#include "ch32v20x_rtc.h"
#include "ch32v20x_spi.h"
#include "ch32v20x_tim.h"
#include "ch32v20x_usart.h"
#include "ch32v20x_wwdg.h"
#include "ch32v20x_it.h"
#include "ch32v20x_misc.h"
#endif /* __CH32V20x_CONF_H */
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/ch32v20x_it.c
+42
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/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v20x_it.c
* Author : WCH
* Version : V1.0.0
* Date : 2021/06/06
* Description : Main Interrupt Service Routines.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "ch32v20x_it.h"
void NMI_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void HardFault_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
/*********************************************************************
* @fn NMI_Handler
*
* @brief This function handles NMI exception.
*
* @return none
*/
void NMI_Handler(void)
{
}
/*********************************************************************
* @fn HardFault_Handler
*
* @brief This function handles Hard Fault exception.
*
* @return none
*/
void HardFault_Handler(void)
{
while (1)
{
}
}
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/ch32v20x_it.h
+20
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@@ -0,0 +1,20 @@
/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v20x_it.h
* Author : WCH
* Version : V1.0.0
* Date : 2021/06/06
* Description : This file contains the headers of the interrupt handlers.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __CH32V20x_IT_H
#define __CH32V20x_IT_H
#include "debug.h"
#endif /* __CH32V20x_IT_H */
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/system_ch32v20x.c
+986
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/********************************** (C) COPYRIGHT *******************************
* File Name : system_ch32v20x.c
* Author : WCH
* Version : V1.0.0
* Date : 2021/06/06
* Description : CH32V20x Device Peripheral Access Layer System Source File.
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
* For HSE = 8Mhz (other CH32V203x)
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#include "ch32v20x.h"
/*
* Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after
* reset the HSI is used as SYSCLK source).
* If none of the define below is enabled, the HSI is used as System clock source.
*/
//#define SYSCLK_FREQ_HSE HSE_VALUE
//#define SYSCLK_FREQ_48MHz_HSE 48000000
//#define SYSCLK_FREQ_56MHz_HSE 56000000
//#define SYSCLK_FREQ_72MHz_HSE 72000000
#define SYSCLK_FREQ_96MHz_HSE 96000000
//#define SYSCLK_FREQ_120MHz_HSE 120000000
//#define SYSCLK_FREQ_144MHz_HSE 144000000
//#define SYSCLK_FREQ_HSI HSI_VALUE
//#define SYSCLK_FREQ_48MHz_HSI 48000000
//#define SYSCLK_FREQ_56MHz_HSI 56000000
//#define SYSCLK_FREQ_72MHz_HSI 72000000
//#define SYSCLK_FREQ_96MHz_HSI 96000000
//#define SYSCLK_FREQ_120MHz_HSI 120000000
//#define SYSCLK_FREQ_144MHz_HSI 144000000
/* Clock Definitions */
#ifdef SYSCLK_FREQ_HSE
uint32_t SystemCoreClock = SYSCLK_FREQ_HSE; /* System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_48MHz_HSE
uint32_t SystemCoreClock = SYSCLK_FREQ_48MHz_HSE; /* System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_56MHz_HSE
uint32_t SystemCoreClock = SYSCLK_FREQ_56MHz_HSE; /* System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_72MHz_HSE
uint32_t SystemCoreClock = SYSCLK_FREQ_72MHz_HSE; /* System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_96MHz_HSE
uint32_t SystemCoreClock = SYSCLK_FREQ_96MHz_HSE; /* System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_120MHz_HSE
uint32_t SystemCoreClock = SYSCLK_FREQ_120MHz_HSE; /* System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_144MHz_HSE
uint32_t SystemCoreClock = SYSCLK_FREQ_144MHz_HSE; /* System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_48MHz_HSI
uint32_t SystemCoreClock = SYSCLK_FREQ_48MHz_HSI; /* System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_56MHz_HSI
uint32_t SystemCoreClock = SYSCLK_FREQ_56MHz_HSI; /* System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_72MHz_HSI
uint32_t SystemCoreClock = SYSCLK_FREQ_72MHz_HSI; /* System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_96MHz_HSI
uint32_t SystemCoreClock = SYSCLK_FREQ_96MHz_HSI; /* System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_120MHz_HSI
uint32_t SystemCoreClock = SYSCLK_FREQ_120MHz_HSI; /* System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_144MHz_HSI
uint32_t SystemCoreClock = SYSCLK_FREQ_144MHz_HSI; /* System Clock Frequency (Core Clock) */
#else
uint32_t SystemCoreClock = HSI_VALUE; /* System Clock Frequency (Core Clock) */
#endif
__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
/* system_private_function_proto_types */
static void SetSysClock(void);
#ifdef SYSCLK_FREQ_HSE
static void SetSysClockToHSE( void );
#elif defined SYSCLK_FREQ_48MHz_HSE
static void SetSysClockTo48_HSE( void );
#elif defined SYSCLK_FREQ_56MHz_HSE
static void SetSysClockTo56_HSE( void );
#elif defined SYSCLK_FREQ_72MHz_HSE
static void SetSysClockTo72_HSE( void );
#elif defined SYSCLK_FREQ_96MHz_HSE
static void SetSysClockTo96_HSE( void );
#elif defined SYSCLK_FREQ_120MHz_HSE
static void SetSysClockTo120_HSE( void );
#elif defined SYSCLK_FREQ_144MHz_HSE
static void SetSysClockTo144_HSE( void );
#elif defined SYSCLK_FREQ_48MHz_HSI
static void SetSysClockTo48_HSI( void );
#elif defined SYSCLK_FREQ_56MHz_HSI
static void SetSysClockTo56_HSI( void );
#elif defined SYSCLK_FREQ_72MHz_HSI
static void SetSysClockTo72_HSI( void );
#elif defined SYSCLK_FREQ_96MHz_HSI
static void SetSysClockTo96_HSI( void );
#elif defined SYSCLK_FREQ_120MHz_HSI
static void SetSysClockTo120_HSI( void );
#elif defined SYSCLK_FREQ_144MHz_HSI
static void SetSysClockTo144_HSI( void );
#endif
/*********************************************************************
* @fn SystemInit
*
* @brief Setup the microcontroller system Initialize the Embedded Flash Interface,
* the PLL and update the SystemCoreClock variable.
*
* @return none
*/
void SystemInit (void)
{
RCC->CTLR |= (uint32_t)0x00000001;
RCC->CFGR0 &= (uint32_t)0xF8FF0000;
RCC->CTLR &= (uint32_t)0xFEF6FFFF;
RCC->CTLR &= (uint32_t)0xFFFBFFFF;
RCC->CFGR0 &= (uint32_t)0xFF80FFFF;
RCC->INTR = 0x009F0000;
SetSysClock();
}
/*********************************************************************
* @fn SystemCoreClockUpdate
*
* @brief Update SystemCoreClock variable according to Clock Register Values.
*
* @return none
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0, pllmull = 0, pllsource = 0, Pll_6_5 = 0;
tmp = RCC->CFGR0 & RCC_SWS;
switch (tmp)
{
case 0x00:
SystemCoreClock = HSI_VALUE;
break;
case 0x04:
SystemCoreClock = HSE_VALUE;
break;
case 0x08:
pllmull = RCC->CFGR0 & RCC_PLLMULL;
pllsource = RCC->CFGR0 & RCC_PLLSRC;
pllmull = ( pllmull >> 18) + 2;
if(pllmull == 17) pllmull = 18;
if (pllsource == 0x00)
{
if(EXTEN->EXTEN_CTR & EXTEN_PLL_HSI_PRE){
SystemCoreClock = HSI_VALUE * pllmull;
}
else{
SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
}
}
else
{
#if defined (CH32V20x_D8W)
if((RCC->CFGR0 & (3<<22)) == (3<<22))
{
SystemCoreClock = ((HSE_VALUE>>1)) * pllmull;
}
else
#endif
if ((RCC->CFGR0 & RCC_PLLXTPRE) != (uint32_t)RESET)
{
#if defined (CH32V20x_D8) || defined (CH32V20x_D8W)
SystemCoreClock = ((HSE_VALUE>>2) >> 1) * pllmull;
#else
SystemCoreClock = (HSE_VALUE >> 1) * pllmull;
#endif
}
else
{
#if defined (CH32V20x_D8) || defined (CH32V20x_D8W)
SystemCoreClock = (HSE_VALUE>>2) * pllmull;
#else
SystemCoreClock = HSE_VALUE * pllmull;
#endif
}
}
if(Pll_6_5 == 1) SystemCoreClock = (SystemCoreClock / 2);
break;
default:
SystemCoreClock = HSI_VALUE;
break;
}
tmp = AHBPrescTable[((RCC->CFGR0 & RCC_HPRE) >> 4)];
SystemCoreClock >>= tmp;
}
/*********************************************************************
* @fn SetSysClock
*
* @brief Configures the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers.
*
* @return none
*/
static void SetSysClock(void)
{
#ifdef SYSCLK_FREQ_HSE
SetSysClockToHSE();
#elif defined SYSCLK_FREQ_48MHz_HSE
SetSysClockTo48_HSE();
#elif defined SYSCLK_FREQ_56MHz_HSE
SetSysClockTo56_HSE();
#elif defined SYSCLK_FREQ_72MHz_HSE
SetSysClockTo72_HSE();
#elif defined SYSCLK_FREQ_96MHz_HSE
SetSysClockTo96_HSE();
#elif defined SYSCLK_FREQ_120MHz_HSE
SetSysClockTo120_HSE();
#elif defined SYSCLK_FREQ_144MHz_HSE
SetSysClockTo144_HSE();
#elif defined SYSCLK_FREQ_48MHz_HSI
SetSysClockTo48_HSI();
#elif defined SYSCLK_FREQ_56MHz_HSI
SetSysClockTo56_HSI();
#elif defined SYSCLK_FREQ_72MHz_HSI
SetSysClockTo72_HSI();
#elif defined SYSCLK_FREQ_96MHz_HSI
SetSysClockTo96_HSI();
#elif defined SYSCLK_FREQ_120MHz_HSI
SetSysClockTo120_HSI();
#elif defined SYSCLK_FREQ_144MHz_HSI
SetSysClockTo144_HSI();
#endif
/* If none of the define above is enabled, the HSI is used as System clock
* source (default after reset)
*/
}
#ifdef SYSCLK_FREQ_HSE
/*********************************************************************
* @fn SetSysClockToHSE
*
* @brief Sets HSE as System clock source and configure HCLK, PCLK2 and PCLK1 prescalers.
*
* @return none
*/
static void SetSysClockToHSE(void)
{
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
RCC->CTLR |= ((uint32_t)RCC_HSEON);
/* Wait till HSE is ready and if Time out is reached exit */
do
{
HSEStatus = RCC->CTLR & RCC_HSERDY;
StartUpCounter++;
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
if ((RCC->CTLR & RCC_HSERDY) != RESET)
{
HSEStatus = (uint32_t)0x01;
}
else
{
HSEStatus = (uint32_t)0x00;
}
if (HSEStatus == (uint32_t)0x01)
{
/* HCLK = SYSCLK */
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
/* PCLK2 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1;
/* PCLK1 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV1;
/* Select HSE as system clock source
* CH32V20x_D6 (HSE=8MHZ)
* CH32V20x_D8 (HSE=32MHZ)
* CH32V20x_D8W (HSE=32MHZ)
*/
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW));
RCC->CFGR0 |= (uint32_t)RCC_SW_HSE;
/* Wait till HSE is used as system clock source */
while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x04)
{
}
}
else
{
/* If HSE fails to start-up, the application will have wrong clock
* configuration. User can add here some code to deal with this error
*/
}
}
#elif defined SYSCLK_FREQ_48MHz_HSE
/*********************************************************************
* @fn SetSysClockTo48_HSE
*
* @brief Sets System clock frequency to 48MHz and configure HCLK, PCLK2 and PCLK1 prescalers.
*
* @return none
*/
static void SetSysClockTo48_HSE(void)
{
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
RCC->CTLR |= ((uint32_t)RCC_HSEON);
/* Wait till HSE is ready and if Time out is reached exit */
do
{
HSEStatus = RCC->CTLR & RCC_HSERDY;
StartUpCounter++;
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
if ((RCC->CTLR & RCC_HSERDY) != RESET)
{
HSEStatus = (uint32_t)0x01;
}
else
{
HSEStatus = (uint32_t)0x00;
}
if (HSEStatus == (uint32_t)0x01)
{
/* HCLK = SYSCLK */
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
/* PCLK2 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1;
/* PCLK1 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2;
/* CH32V20x_D6-PLL configuration: PLLCLK = HSE * 6 = 48 MHz (HSE=8MHZ)
* CH32V20x_D8-PLL configuration: PLLCLK = HSE/4 * 6 = 48 MHz (HSE=32MHZ)
* CH32V20x_D8W-PLL configuration: PLLCLK = HSE/4 * 6 = 48 MHz (HSE=32MHZ)
*/
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE | RCC_PLLMULL));
RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL6);
/* Enable PLL */
RCC->CTLR |= RCC_PLLON;
/* Wait till PLL is ready */
while((RCC->CTLR & RCC_PLLRDY) == 0)
{
}
/* Select PLL as system clock source */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW));
RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;
/* Wait till PLL is used as system clock source */
while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08)
{
}
}
else
{
/*
* If HSE fails to start-up, the application will have wrong clock
* configuration. User can add here some code to deal with this error
*/
}
}
#elif defined SYSCLK_FREQ_56MHz_HSE
/*********************************************************************
* @fn SetSysClockTo56_HSE
*
* @brief Sets System clock frequency to 56MHz and configure HCLK, PCLK2 and PCLK1 prescalers.
*
* @return none
*/
static void SetSysClockTo56_HSE(void)
{
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
RCC->CTLR |= ((uint32_t)RCC_HSEON);
/* Wait till HSE is ready and if Time out is reached exit */
do
{
HSEStatus = RCC->CTLR & RCC_HSERDY;
StartUpCounter++;
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
if ((RCC->CTLR & RCC_HSERDY) != RESET)
{
HSEStatus = (uint32_t)0x01;
}
else
{
HSEStatus = (uint32_t)0x00;
}
if (HSEStatus == (uint32_t)0x01)
{
/* HCLK = SYSCLK */
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
/* PCLK2 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1;
/* PCLK1 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2;
/* CH32V20x_D6-PLL configuration: PLLCLK = HSE * 7 = 56 MHz (HSE=8MHZ)
* CH32V20x_D8-PLL configuration: PLLCLK = HSE/4 * 7 = 56 MHz (HSE=32MHZ)
* CH32V20x_D8W-PLL configuration: PLLCLK = HSE/4 * 7 = 56 MHz (HSE=32MHZ)
*/
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE | RCC_PLLMULL));
RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL7);
/* Enable PLL */
RCC->CTLR |= RCC_PLLON;
/* Wait till PLL is ready */
while((RCC->CTLR & RCC_PLLRDY) == 0)
{
}
/* Select PLL as system clock source */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW));
RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;
/* Wait till PLL is used as system clock source */
while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08)
{
}
}
else
{
/*
* If HSE fails to start-up, the application will have wrong clock
* configuration. User can add here some code to deal with this error
*/
}
}
#elif defined SYSCLK_FREQ_72MHz_HSE
/*********************************************************************
* @fn SetSysClockTo72_HSE
*
* @brief Sets System clock frequency to 72MHz and configure HCLK, PCLK2 and PCLK1 prescalers.
*
* @return none
*/
static void SetSysClockTo72_HSE(void)
{
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
RCC->CTLR |= ((uint32_t)RCC_HSEON);
/* Wait till HSE is ready and if Time out is reached exit */
do
{
HSEStatus = RCC->CTLR & RCC_HSERDY;
StartUpCounter++;
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
if ((RCC->CTLR & RCC_HSERDY) != RESET)
{
HSEStatus = (uint32_t)0x01;
}
else
{
HSEStatus = (uint32_t)0x00;
}
if (HSEStatus == (uint32_t)0x01)
{
/* HCLK = SYSCLK */
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
/* PCLK2 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1;
/* PCLK1 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2;
/* CH32V20x_D6-PLL configuration: PLLCLK = HSE * 9 = 72 MHz (HSE=8MHZ)
* CH32V20x_D8-PLL configuration: PLLCLK = HSE/4 * 9 = 72 MHz (HSE=32MHZ)
* CH32V20x_D8W-PLL configuration: PLLCLK = HSE/4 * 9 = 72 MHz (HSE=32MHZ)
*/
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE |
RCC_PLLMULL));
RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL9);
/* Enable PLL */
RCC->CTLR |= RCC_PLLON;
/* Wait till PLL is ready */
while((RCC->CTLR & RCC_PLLRDY) == 0)
{
}
/* Select PLL as system clock source */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW));
RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;
/* Wait till PLL is used as system clock source */
while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08)
{
}
}
else
{
/*
* If HSE fails to start-up, the application will have wrong clock
* configuration. User can add here some code to deal with this error
*/
}
}
#elif defined SYSCLK_FREQ_96MHz_HSE
/*********************************************************************
* @fn SetSysClockTo96_HSE
*
* @brief Sets System clock frequency to 96MHz and configure HCLK, PCLK2 and PCLK1 prescalers.
*
* @return none
*/
static void SetSysClockTo96_HSE(void)
{
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
RCC->CTLR |= ((uint32_t)RCC_HSEON);
/* Wait till HSE is ready and if Time out is reached exit */
do
{
HSEStatus = RCC->CTLR & RCC_HSERDY;
StartUpCounter++;
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
if ((RCC->CTLR & RCC_HSERDY) != RESET)
{
HSEStatus = (uint32_t)0x01;
}
else
{
HSEStatus = (uint32_t)0x00;
}
if (HSEStatus == (uint32_t)0x01)
{
/* HCLK = SYSCLK */
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
/* PCLK2 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1;
/* PCLK1 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2;
/* CH32V20x_D6-PLL configuration: PLLCLK = HSE * 12 = 96 MHz (HSE=8MHZ)
* CH32V20x_D8-PLL configuration: PLLCLK = HSE/4 * 12 = 96 MHz (HSE=32MHZ)
* CH32V20x_D8W-PLL configuration: PLLCLK = HSE/4 * 12 = 96 MHz (HSE=32MHZ)
*/
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE |
RCC_PLLMULL));
RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL12);
/* Enable PLL */
RCC->CTLR |= RCC_PLLON;
/* Wait till PLL is ready */
while((RCC->CTLR & RCC_PLLRDY) == 0)
{
}
/* Select PLL as system clock source */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW));
RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;
/* Wait till PLL is used as system clock source */
while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08)
{
}
}
else
{
/*
* If HSE fails to start-up, the application will have wrong clock
* configuration. User can add here some code to deal with this error
*/
}
}
#elif defined SYSCLK_FREQ_120MHz_HSE
/*********************************************************************
* @fn SetSysClockTo120_HSE
*
* @brief Sets System clock frequency to 120MHz and configure HCLK, PCLK2 and PCLK1 prescalers.
*
* @return none
*/
static void SetSysClockTo120_HSE(void)
{
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
RCC->CTLR |= ((uint32_t)RCC_HSEON);
/* Wait till HSE is ready and if Time out is reached exit */
do
{
HSEStatus = RCC->CTLR & RCC_HSERDY;
StartUpCounter++;
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
if((RCC->CTLR & RCC_HSERDY) != RESET)
{
HSEStatus = (uint32_t)0x01;
}
else
{
HSEStatus = (uint32_t)0x00;
}
if(HSEStatus == (uint32_t)0x01)
{
#if defined (CH32V20x_D8W)
RCC->CFGR0 |= (uint32_t)(3<<22);
/* HCLK = SYSCLK/2 */
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV2;
#else
/* HCLK = SYSCLK */
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
#endif
/* PCLK2 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1;
/* PCLK1 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2;
/* CH32V20x_D6-PLL configuration: PLLCLK = HSE * 15 = 120 MHz (HSE=8MHZ)
* CH32V20x_D8-PLL configuration: PLLCLK = HSE/4 * 15 = 120 MHz (HSE=32MHZ)
* CH32V20x_D8W-PLL configuration: PLLCLK = HSE/2 * 15 = 240 MHz (HSE=32MHZ)
*/
RCC->CFGR0 &= (uint32_t)((uint32_t) ~(RCC_PLLSRC | RCC_PLLXTPRE |
RCC_PLLMULL));
RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL15);
/* Enable PLL */
RCC->CTLR |= RCC_PLLON;
/* Wait till PLL is ready */
while((RCC->CTLR & RCC_PLLRDY) == 0)
{
}
/* Select PLL as system clock source */
RCC->CFGR0 &= (uint32_t)((uint32_t) ~(RCC_SW));
RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;
/* Wait till PLL is used as system clock source */
while((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08)
{
}
}
else
{
/*
* If HSE fails to start-up, the application will have wrong clock
* configuration. User can add here some code to deal with this error
*/
}
}
#elif defined SYSCLK_FREQ_144MHz_HSE
/*********************************************************************
* @fn SetSysClockTo144_HSE
*
* @brief Sets System clock frequency to 144MHz and configure HCLK, PCLK2 and PCLK1 prescalers.
*
* @return none
*/
static void SetSysClockTo144_HSE(void)
{
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
RCC->CTLR |= ((uint32_t)RCC_HSEON);
/* Wait till HSE is ready and if Time out is reached exit */
do
{
HSEStatus = RCC->CTLR & RCC_HSERDY;
StartUpCounter++;
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
if ((RCC->CTLR & RCC_HSERDY) != RESET)
{
HSEStatus = (uint32_t)0x01;
}
else
{
HSEStatus = (uint32_t)0x00;
}
if (HSEStatus == (uint32_t)0x01)
{
/* HCLK = SYSCLK */
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
/* PCLK2 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1;
/* PCLK1 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2;
/* CH32V20x_D6-PLL configuration: PLLCLK = HSE * 18 = 144 MHz (HSE=8MHZ)
* CH32V20x_D8-PLL configuration: PLLCLK = HSE/4 * 18 = 144 MHz (HSE=32MHZ)
* CH32V20x_D8W-PLL configuration: PLLCLK = HSE/4 * 18 = 144 MHz (HSE=32MHZ)
*/
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE |
RCC_PLLMULL));
RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL18);
/* Enable PLL */
RCC->CTLR |= RCC_PLLON;
/* Wait till PLL is ready */
while((RCC->CTLR & RCC_PLLRDY) == 0)
{
}
/* Select PLL as system clock source */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW));
RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;
/* Wait till PLL is used as system clock source */
while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08)
{
}
}
else
{
/*
* If HSE fails to start-up, the application will have wrong clock
* configuration. User can add here some code to deal with this error
*/
}
}
#elif defined SYSCLK_FREQ_48MHz_HSI
/*********************************************************************
* @fn SetSysClockTo48_HSI
*
* @brief Sets System clock frequency to 48MHz and configure HCLK, PCLK2 and PCLK1 prescalers.
*
* @return none
*/
static void SetSysClockTo48_HSI(void)
{
EXTEN->EXTEN_CTR |= EXTEN_PLL_HSI_PRE;
/* HCLK = SYSCLK */
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
/* PCLK2 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1;
/* PCLK1 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2;
/* PLL configuration: PLLCLK = HSI * 6 = 48 MHz */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE | RCC_PLLMULL));
RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSI_Div2 | RCC_PLLMULL6);
/* Enable PLL */
RCC->CTLR |= RCC_PLLON;
/* Wait till PLL is ready */
while((RCC->CTLR & RCC_PLLRDY) == 0)
{
}
/* Select PLL as system clock source */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW));
RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;
/* Wait till PLL is used as system clock source */
while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08)
{
}
}
#elif defined SYSCLK_FREQ_56MHz_HSI
/*********************************************************************
* @fn SetSysClockTo56_HSI
*
* @brief Sets System clock frequency to 56MHz and configure HCLK, PCLK2 and PCLK1 prescalers.
*
* @return none
*/
static void SetSysClockTo56_HSI(void)
{
EXTEN->EXTEN_CTR |= EXTEN_PLL_HSI_PRE;
/* HCLK = SYSCLK */
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
/* PCLK2 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1;
/* PCLK1 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2;
/* PLL configuration: PLLCLK = HSI * 7 = 48 MHz */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE | RCC_PLLMULL));
RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSI_Div2 | RCC_PLLMULL7);
/* Enable PLL */
RCC->CTLR |= RCC_PLLON;
/* Wait till PLL is ready */
while((RCC->CTLR & RCC_PLLRDY) == 0)
{
}
/* Select PLL as system clock source */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW));
RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;
/* Wait till PLL is used as system clock source */
while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08)
{
}
}
#elif defined SYSCLK_FREQ_72MHz_HSI
/*********************************************************************
* @fn SetSysClockTo72_HSI
*
* @brief Sets System clock frequency to 72MHz and configure HCLK, PCLK2 and PCLK1 prescalers.
*
* @return none
*/
static void SetSysClockTo72_HSI(void)
{
EXTEN->EXTEN_CTR |= EXTEN_PLL_HSI_PRE;
/* HCLK = SYSCLK */
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
/* PCLK2 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1;
/* PCLK1 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2;
/* PLL configuration: PLLCLK = HSI * 9 = 72 MHz */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE | RCC_PLLMULL));
RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSI_Div2 | RCC_PLLMULL9);
/* Enable PLL */
RCC->CTLR |= RCC_PLLON;
/* Wait till PLL is ready */
while((RCC->CTLR & RCC_PLLRDY) == 0)
{
}
/* Select PLL as system clock source */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW));
RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;
/* Wait till PLL is used as system clock source */
while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08)
{
}
}
#elif defined SYSCLK_FREQ_96MHz_HSI
/*********************************************************************
* @fn SetSysClockTo96_HSI
*
* @brief Sets System clock frequency to 96MHz and configure HCLK, PCLK2 and PCLK1 prescalers.
*
* @return none
*/
static void SetSysClockTo96_HSI(void)
{
EXTEN->EXTEN_CTR |= EXTEN_PLL_HSI_PRE;
/* HCLK = SYSCLK */
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
/* PCLK2 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1;
/* PCLK1 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2;
/* PLL configuration: PLLCLK = HSI * 12 = 96 MHz */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE | RCC_PLLMULL));
RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSI_Div2 | RCC_PLLMULL12);
/* Enable PLL */
RCC->CTLR |= RCC_PLLON;
/* Wait till PLL is ready */
while((RCC->CTLR & RCC_PLLRDY) == 0)
{
}
/* Select PLL as system clock source */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW));
RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;
/* Wait till PLL is used as system clock source */
while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08)
{
}
}
#elif defined SYSCLK_FREQ_120MHz_HSI
/*********************************************************************
* @fn SetSysClockTo120_HSI
*
* @brief Sets System clock frequency to 120MHz and configure HCLK, PCLK2 and PCLK1 prescalers.
*
* @return none
*/
static void SetSysClockTo120_HSI(void)
{
EXTEN->EXTEN_CTR |= EXTEN_PLL_HSI_PRE;
/* HCLK = SYSCLK */
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
/* PCLK2 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1;
/* PCLK1 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2;
/* PLL configuration: PLLCLK = HSI * 15 = 120 MHz */
RCC->CFGR0 &= (uint32_t)((uint32_t) ~(RCC_PLLSRC | RCC_PLLXTPRE |
RCC_PLLMULL));
RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSI_Div2 | RCC_PLLMULL15);
/* Enable PLL */
RCC->CTLR |= RCC_PLLON;
/* Wait till PLL is ready */
while((RCC->CTLR & RCC_PLLRDY) == 0)
{
}
/* Select PLL as system clock source */
RCC->CFGR0 &= (uint32_t)((uint32_t) ~(RCC_SW));
RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;
/* Wait till PLL is used as system clock source */
while((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08)
{
}
}
#elif defined SYSCLK_FREQ_144MHz_HSI
/*********************************************************************
* @fn SetSysClockTo144_HSI
*
* @brief Sets System clock frequency to 144MHz and configure HCLK, PCLK2 and PCLK1 prescalers.
*
* @return none
*/
static void SetSysClockTo144_HSI(void)
{
EXTEN->EXTEN_CTR |= EXTEN_PLL_HSI_PRE;
/* HCLK = SYSCLK */
RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
/* PCLK2 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1;
/* PCLK1 = HCLK */
RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2;
/* PLL configuration: PLLCLK = HSI * 18 = 144 MHz */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE | RCC_PLLMULL));
RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSI_Div2 | RCC_PLLMULL18);
/* Enable PLL */
RCC->CTLR |= RCC_PLLON;
/* Wait till PLL is ready */
while((RCC->CTLR & RCC_PLLRDY) == 0)
{
}
/* Select PLL as system clock source */
RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW));
RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;
/* Wait till PLL is used as system clock source */
while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08)
{
}
}
#endif
EVT/EXAM/USB/USBD/MSC_CD-ROM/User/system_ch32v20x.h
+32
View File
@@ -0,0 +1,32 @@
/********************************** (C) COPYRIGHT *******************************
* File Name : system_ch32v20x.h
* Author : WCH
* Version : V1.0.0
* Date : 2021/06/06
* Description : CH32V20x Device Peripheral Access Layer System Header File.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
#ifndef __SYSTEM_ch32v20x_H
#define __SYSTEM_ch32v20x_H
#ifdef __cplusplus
extern "C" {
#endif
extern uint32_t SystemCoreClock; /* System Clock Frequency (Core Clock) */
/* System_Exported_Functions */
extern void SystemInit(void);
extern void SystemCoreClockUpdate(void);
#ifdef __cplusplus
}
#endif
#endif /*__CH32V20x_SYSTEM_H */