V2.31
This commit is contained in:
@@ -4,7 +4,7 @@
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* Version : V1.0.0
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* Date : 2021/06/06
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* Description : CH32V20x Device Peripheral Access Layer System Source File.
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
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* For HSE = 8Mhz (other CH32V203x)
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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@@ -4,7 +4,7 @@
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* Version : V1.0.0
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* Date : 2021/06/06
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* Description : CH32V20x Device Peripheral Access Layer System Source File.
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
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* For HSE = 8Mhz (other CH32V203x)
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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@@ -4,7 +4,7 @@
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* Version : V1.0.0
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* Date : 2021/06/06
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* Description : CH32V20x Device Peripheral Access Layer System Source File.
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
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* For HSE = 8Mhz (other CH32V203x)
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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@@ -4,7 +4,7 @@
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* Version : V1.0.0
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* Date : 2021/06/06
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* Description : CH32V20x Device Peripheral Access Layer System Source File.
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
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* For HSE = 8Mhz (other CH32V203x)
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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@@ -4,7 +4,7 @@
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* Version : V1.0.0
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* Date : 2021/06/06
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* Description : CH32V20x Device Peripheral Access Layer System Source File.
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
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* For HSE = 8Mhz (other CH32V203x)
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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@@ -4,7 +4,7 @@
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* Version : V1.0.0
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* Date : 2021/06/06
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* Description : CH32V20x Device Peripheral Access Layer System Source File.
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
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* For HSE = 8Mhz (other CH32V203x)
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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@@ -4,7 +4,7 @@
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* Version : V1.0.0
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* Date : 2021/06/06
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* Description : CH32V20x Device Peripheral Access Layer System Source File.
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
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* For HSE = 8Mhz (other CH32V203x)
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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@@ -4,7 +4,7 @@
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* Version : V1.0.0
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* Date : 2021/06/06
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* Description : CH32V20x Device Peripheral Access Layer System Source File.
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
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* For HSE = 8Mhz (other CH32V203x)
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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@@ -4,7 +4,7 @@
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* Version : V1.0.0
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* Date : 2021/06/06
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* Description : CH32V20x Device Peripheral Access Layer System Source File.
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
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* For HSE = 8Mhz (other CH32V203x)
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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@@ -4,7 +4,7 @@
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* Version : V1.0.0
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* Date : 2021/06/06
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* Description : CH32V20x Device Peripheral Access Layer System Source File.
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
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* For HSE = 8Mhz (other CH32V203x)
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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@@ -280,7 +280,7 @@ void ScanParam_RefreshNotify(uint16_t connHandle)
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if(noti.pValue != NULL)
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{
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// send notification
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noti.handle = scanParamAttrTbl[SCAN_PARAM_REFRESH_CCCD_IDX].handle;
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noti.handle = scanParamAttrTbl[SCAN_PARAM_REFRESH_IDX].handle;
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noti.len = SCAN_PARAM_REFRESH_LEN;
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noti.pValue[0] = SCAN_PARAM_REFRESH_REQ;
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@@ -4,7 +4,7 @@
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* Version : V1.0.0
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* Date : 2021/06/06
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* Description : CH32V20x Device Peripheral Access Layer System Source File.
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
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* For HSE = 8Mhz (other CH32V203x)
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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@@ -280,7 +280,7 @@ void ScanParam_RefreshNotify(uint16_t connHandle)
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if(noti.pValue != NULL)
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{
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// send notification
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noti.handle = scanParamAttrTbl[SCAN_PARAM_REFRESH_CCCD_IDX].handle;
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noti.handle = scanParamAttrTbl[SCAN_PARAM_REFRESH_IDX].handle;
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noti.len = SCAN_PARAM_REFRESH_LEN;
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noti.pValue[0] = SCAN_PARAM_REFRESH_REQ;
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@@ -4,7 +4,7 @@
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* Version : V1.0.0
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* Date : 2021/06/06
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||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
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||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
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* For HSE = 8Mhz (other CH32V203x)
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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@@ -280,7 +280,7 @@ void ScanParam_RefreshNotify(uint16_t connHandle)
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if(noti.pValue != NULL)
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{
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// send notification
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noti.handle = scanParamAttrTbl[SCAN_PARAM_REFRESH_CCCD_IDX].handle;
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noti.handle = scanParamAttrTbl[SCAN_PARAM_REFRESH_IDX].handle;
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noti.len = SCAN_PARAM_REFRESH_LEN;
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noti.pValue[0] = SCAN_PARAM_REFRESH_REQ;
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@@ -4,7 +4,7 @@
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* Version : V1.0.0
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||||
* Date : 2021/06/06
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||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
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||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
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* For HSE = 8Mhz (other CH32V203x)
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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@@ -280,7 +280,7 @@ void ScanParam_RefreshNotify(uint16_t connHandle)
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if(noti.pValue != NULL)
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{
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// send notification
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noti.handle = scanParamAttrTbl[SCAN_PARAM_REFRESH_CCCD_IDX].handle;
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noti.handle = scanParamAttrTbl[SCAN_PARAM_REFRESH_IDX].handle;
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noti.len = SCAN_PARAM_REFRESH_LEN;
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noti.pValue[0] = SCAN_PARAM_REFRESH_REQ;
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@@ -4,7 +4,7 @@
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* Version : V1.0.0
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* Date : 2021/06/06
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* Description : CH32V20x Device Peripheral Access Layer System Source File.
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
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* For HSE = 8Mhz (other CH32V203x)
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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@@ -4,7 +4,7 @@
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* Version : V1.0.0
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||||
* Date : 2021/06/06
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* Description : CH32V20x Device Peripheral Access Layer System Source File.
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
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* For HSE = 8Mhz (other CH32V203x)
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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Binary file not shown.
Binary file not shown.
@@ -100,8 +100,8 @@ extern "C" {
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// 允许同时存在的分包消息的最大发送个数
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#define CONFIG_MESH_TX_SEG_COUNT_MIN (1)
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#define CONFIG_MESH_TX_SEG_COUNT_DEF (2)
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#define CONFIG_MESH_TX_SEG_COUNT_MAX (4)
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#define CONFIG_MESH_TX_SEG_COUNT_DEF (1)
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#define CONFIG_MESH_TX_SEG_COUNT_MAX (1)
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// 允许同时存在的分包消息的最大接收个数
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#define CONFIG_MESH_RX_SEG_COUNT_MIN (1)
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@@ -4,7 +4,7 @@
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* Version : V1.0.0
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||||
* Date : 2021/06/06
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||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
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||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
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||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
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||||
* For HSE = 8Mhz (other CH32V203x)
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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@@ -100,8 +100,8 @@ extern "C" {
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// 允许同时存在的分包消息的最大发送个数
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#define CONFIG_MESH_TX_SEG_COUNT_MIN (1)
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#define CONFIG_MESH_TX_SEG_COUNT_DEF (2)
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#define CONFIG_MESH_TX_SEG_COUNT_MAX (4)
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#define CONFIG_MESH_TX_SEG_COUNT_DEF (1)
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#define CONFIG_MESH_TX_SEG_COUNT_MAX (1)
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// 允许同时存在的分包消息的最大接收个数
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#define CONFIG_MESH_RX_SEG_COUNT_MIN (1)
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@@ -4,7 +4,7 @@
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* Version : V1.0.0
|
||||
* Date : 2021/06/06
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||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
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||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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@@ -100,8 +100,8 @@ extern "C" {
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// 允许同时存在的分包消息的最大发送个数
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#define CONFIG_MESH_TX_SEG_COUNT_MIN (1)
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#define CONFIG_MESH_TX_SEG_COUNT_DEF (2)
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#define CONFIG_MESH_TX_SEG_COUNT_MAX (4)
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#define CONFIG_MESH_TX_SEG_COUNT_DEF (1)
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#define CONFIG_MESH_TX_SEG_COUNT_MAX (1)
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// 允许同时存在的分包消息的最大接收个数
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#define CONFIG_MESH_RX_SEG_COUNT_MIN (1)
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@@ -4,7 +4,7 @@
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* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
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*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
@@ -100,8 +100,8 @@ extern "C" {
|
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|
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// 允许同时存在的分包消息的最大发送个数
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#define CONFIG_MESH_TX_SEG_COUNT_MIN (1)
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#define CONFIG_MESH_TX_SEG_COUNT_DEF (2)
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#define CONFIG_MESH_TX_SEG_COUNT_MAX (4)
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#define CONFIG_MESH_TX_SEG_COUNT_DEF (1)
|
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#define CONFIG_MESH_TX_SEG_COUNT_MAX (1)
|
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|
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// 允许同时存在的分包消息的最大接收个数
|
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#define CONFIG_MESH_RX_SEG_COUNT_MIN (1)
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|
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@@ -4,7 +4,7 @@
|
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* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
@@ -100,8 +100,8 @@ extern "C" {
|
||||
|
||||
// 允许同时存在的分包消息的最大发送个数
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_MIN (1)
|
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#define CONFIG_MESH_TX_SEG_COUNT_DEF (2)
|
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#define CONFIG_MESH_TX_SEG_COUNT_MAX (4)
|
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#define CONFIG_MESH_TX_SEG_COUNT_DEF (1)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_MAX (1)
|
||||
|
||||
// 允许同时存在的分包消息的最大接收个数
|
||||
#define CONFIG_MESH_RX_SEG_COUNT_MIN (1)
|
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|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
@@ -100,8 +100,8 @@ extern "C" {
|
||||
|
||||
// 允许同时存在的分包消息的最大发送个数
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_MIN (1)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_DEF (2)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_MAX (4)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_DEF (1)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_MAX (1)
|
||||
|
||||
// 允许同时存在的分包消息的最大接收个数
|
||||
#define CONFIG_MESH_RX_SEG_COUNT_MIN (1)
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
@@ -100,8 +100,8 @@ extern "C" {
|
||||
|
||||
// 允许同时存在的分包消息的最大发送个数
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_MIN (1)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_DEF (2)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_MAX (4)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_DEF (1)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_MAX (1)
|
||||
|
||||
// 允许同时存在的分包消息的最大接收个数
|
||||
#define CONFIG_MESH_RX_SEG_COUNT_MIN (1)
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
@@ -100,8 +100,8 @@ extern "C" {
|
||||
|
||||
// 允许同时存在的分包消息的最大发送个数
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_MIN (1)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_DEF (2)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_MAX (4)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_DEF (1)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_MAX (1)
|
||||
|
||||
// 允许同时存在的分包消息的最大接收个数
|
||||
#define CONFIG_MESH_RX_SEG_COUNT_MIN (1)
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
@@ -100,8 +100,8 @@ extern "C" {
|
||||
|
||||
// 允许同时存在的分包消息的最大发送个数
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_MIN (1)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_DEF (2)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_MAX (4)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_DEF (1)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_MAX (1)
|
||||
|
||||
// 允许同时存在的分包消息的最大接收个数
|
||||
#define CONFIG_MESH_RX_SEG_COUNT_MIN (1)
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
@@ -100,8 +100,8 @@ extern "C" {
|
||||
|
||||
// 允许同时存在的分包消息的最大发送个数
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_MIN (1)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_DEF (2)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_MAX (4)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_DEF (1)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_MAX (1)
|
||||
|
||||
// 允许同时存在的分包消息的最大接收个数
|
||||
#define CONFIG_MESH_RX_SEG_COUNT_MIN (1)
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
+2
-2
@@ -100,8 +100,8 @@ extern "C" {
|
||||
|
||||
// 允许同时存在的分包消息的最大发送个数
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_MIN (1)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_DEF (2)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_MAX (4)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_DEF (1)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_MAX (1)
|
||||
|
||||
// 允许同时存在的分包消息的最大接收个数
|
||||
#define CONFIG_MESH_RX_SEG_COUNT_MIN (1)
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
@@ -100,8 +100,8 @@ extern "C" {
|
||||
|
||||
// 允许同时存在的分包消息的最大发送个数
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_MIN (1)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_DEF (2)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_MAX (4)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_DEF (1)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_MAX (1)
|
||||
|
||||
// 允许同时存在的分包消息的最大接收个数
|
||||
#define CONFIG_MESH_RX_SEG_COUNT_MIN (1)
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
@@ -100,8 +100,8 @@ extern "C" {
|
||||
|
||||
// 允许同时存在的分包消息的最大发送个数
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_MIN (1)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_DEF (2)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_MAX (4)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_DEF (1)
|
||||
#define CONFIG_MESH_TX_SEG_COUNT_MAX (1)
|
||||
|
||||
// 允许同时存在的分包消息的最大接收个数
|
||||
#define CONFIG_MESH_RX_SEG_COUNT_MIN (1)
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
@@ -302,7 +302,7 @@ uint16_t Central_ProcessEvent(uint8_t task_id, uint16_t events)
|
||||
{
|
||||
uint8_t *pMsg;
|
||||
|
||||
if((pMsg = tmos_msg_receive(centralTaskId)) != NULL)
|
||||
if((pMsg = tmos_msg_receive(task_id)) != NULL)
|
||||
{
|
||||
central_ProcessTMOSMsg((tmos_event_hdr_t *)pMsg);
|
||||
// Release the TMOS message
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
@@ -34,7 +34,7 @@
|
||||
* CONSTANTS
|
||||
*/
|
||||
// Maximum number of scan responses
|
||||
#define DEFAULT_MAX_SCAN_RES 10
|
||||
#define DEFAULT_MAX_SCAN_RES 80
|
||||
|
||||
// Scan duration in 0.625ms
|
||||
#define DEFAULT_SCAN_DURATION 2400
|
||||
@@ -122,8 +122,8 @@ enum
|
||||
{
|
||||
BLE_DISC_STATE_IDLE, // Idle
|
||||
BLE_DISC_STATE_SVC, // Service discovery
|
||||
BLE_DISC_STATE_CHAR, // Characteristic discovery
|
||||
BLE_DISC_STATE_CCCD, // client characteristic configuration discovery
|
||||
BLE_DISC_STATE_CHAR, // Characteristic discovery
|
||||
BLE_DISC_STATE_CCCD // client characteristic configuration discovery
|
||||
};
|
||||
/*********************************************************************
|
||||
* TYPEDEFS
|
||||
@@ -305,7 +305,7 @@ uint16_t Central_ProcessEvent(uint8_t task_id, uint16_t events)
|
||||
{
|
||||
uint8_t *pMsg;
|
||||
|
||||
if((pMsg = tmos_msg_receive(centralTaskId)) != NULL)
|
||||
if((pMsg = tmos_msg_receive(task_id)) != NULL)
|
||||
{
|
||||
central_ProcessTMOSMsg((tmos_event_hdr_t *)pMsg);
|
||||
// Release the TMOS message
|
||||
@@ -547,7 +547,7 @@ static void centralProcessGATTMsg(gattMsgEvent_t *pMsg)
|
||||
((pMsg->method == ATT_ERROR_RSP) &&
|
||||
(pMsg->msg.errorRsp.reqOpcode == ATT_WRITE_REQ)))
|
||||
{
|
||||
if(pMsg->method == ATT_ERROR_RSP == ATT_ERROR_RSP)
|
||||
if(pMsg->method == ATT_ERROR_RSP)
|
||||
{
|
||||
uint8_t status = pMsg->msg.errorRsp.errCode;
|
||||
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
@@ -4,8 +4,10 @@
|
||||
* Version : V1.0
|
||||
* Date : 2018/11/12
|
||||
* Description : 观察应用主函数及任务系统初始化
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
|
||||
*******************************************************************************/
|
||||
|
||||
#ifndef CENTRAL_H
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
@@ -4,8 +4,10 @@
|
||||
* Version : V1.0
|
||||
* Date : 2018/12/11
|
||||
* Description :
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
|
||||
*******************************************************************************/
|
||||
|
||||
#ifndef PERIPHERAL_H
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
* Version : V1.0.0
|
||||
* Date : 2021/06/06
|
||||
* Description : CH32V20x Device Peripheral Access Layer System Source File.
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
|
||||
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
|
||||
* For HSE = 8Mhz (other CH32V203x)
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
|
||||
Binary file not shown.
Binary file not shown.
Reference in New Issue
Block a user