V2.31
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@@ -13,4 +13,4 @@ Series=CH32V203
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Description=ROM(byte): 64K, SRAM(byte): 20K, CHIP PINS: 32, GPIO PORTS: 27.\nWCH CH32V2 series of mainstream MCUs covers the needs of a large variety of applications in the industrial,medical and consumer markets. High performance with first-class peripherals and low-power,low-voltage operation is paired with a high level of integration at accessible prices with a simple architecture and easy-to-use tools.
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PeripheralVersion=1.0
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MCU=CH32V203RBT6
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MCU=CH32V203RBT
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@@ -1,8 +1,8 @@
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/********************************** (C) COPYRIGHT *******************************
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* File Name : main.c
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* Author : WCH
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* Version : V1.0.0
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* Date : 2023/12/29
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* Version : V1.0.1
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* Date : 2025/04/29
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* Description : Main program body.
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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@@ -98,22 +98,21 @@ void TestDataRead(void)
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int main(void)
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{
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GPIO_InitTypeDef GPIO_InitStructure = {0};
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/* Configure unused GPIO as IPD to reduce power consumption */
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
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SystemCoreClockUpdate();
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Delay_Init();
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Delay_Ms(1000);
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/* To reduce power consumption, unused GPIOs need to be set as pull-down inputs */
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA|RCC_APB2Periph_GPIOB|
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RCC_APB2Periph_GPIOC|RCC_APB2Periph_GPIOD|RCC_APB2Periph_GPIOE, ENABLE);
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RCC_APB2Periph_GPIOC|RCC_APB2Periph_GPIOD|RCC_APB2Periph_AFIO, ENABLE);
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GPIO_PinRemapConfig(GPIO_Remap_SWJ_Disable,ENABLE);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_All;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPD;
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GPIO_Init(GPIOA, &GPIO_InitStructure);
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GPIO_Init(GPIOB, &GPIO_InitStructure);
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GPIO_Init(GPIOC, &GPIO_InitStructure);
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GPIO_Init(GPIOD, &GPIO_InitStructure);
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GPIO_Init(GPIOE, &GPIO_InitStructure);
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
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SystemCoreClockUpdate();
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Delay_Init();
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USART_Printf_Init(115200);
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printf("SystemClk:%d\r\n", SystemCoreClock);
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printf( "ChipID:%08x\r\n", DBGMCU_GetCHIPID() );
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@@ -4,7 +4,7 @@
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* Version : V1.0.0
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* Date : 2021/06/06
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* Description : CH32V20x Device Peripheral Access Layer System Source File.
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
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* For HSE = 8Mhz (other CH32V203x)
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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