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qiyongshuang
2026-01-07 10:43:29 +08:00
parent 6209b6e7f9
commit d161f84c90
551 changed files with 23169 additions and 1518 deletions
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EVT/EXAM/SRC/Peripheral/inc/ch32v20x.h
+9 -11
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@@ -1,8 +1,8 @@
/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v20x.h
* Author : WCH
* Version : V1.0.0
* Date : 2024/07/04
* Version : V1.0.1
* Date : 2025/11/04
* Description : CH32V20x Device Peripheral Access Layer Header File.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
@@ -18,7 +18,7 @@ extern "C" {
#if !defined(CH32V20x_D8W) && !defined(CH32V20x_D8) && !defined(CH32V20x_D6)
#define CH32V20x_D6 /* CH32V203F6-CH32V203F8-CH32V203G6-CH32V203G8-CH32V203K8-CH32V203C6-CH32V203C8-CH32V203G8*/
//#define CH32V20x_D8 /* CH32V203RBT6 */
//#define CH32V20x_D8 /* CH32V203RBT */
//#define CH32V20x_D8W /* CH32V208 */
#endif
@@ -30,7 +30,11 @@ extern "C" {
#if defined(CH32V20x_D8) || defined(CH32V20x_D8W)
#define HSE_VALUE ((uint32_t)32000000) /* Value of the External oscillator in Hz */
#else
#define HSE_VALUE ((uint32_t)8000000) /* Value of the External oscillator in Hz */
#if defined(HSE_VALUE_12M)
#define HSE_VALUE ((uint32_t)12000000) /* Value of the External oscillator in Hz */
#else
#define HSE_VALUE ((uint32_t)8000000) /* Value of the External oscillator in Hz */
#endif
#endif
#endif
@@ -41,7 +45,7 @@ extern "C" {
/* CH32V20x Standard Peripheral Library version number */
#define __CH32V20x_STDPERIPH_VERSION_MAIN (0x02) /* [15:8] main version */
#define __CH32V20x_STDPERIPH_VERSION_SUB (0x02) /* [7:0] sub version */
#define __CH32V20x_STDPERIPH_VERSION_SUB (0x03) /* [7:0] sub version */
#define __CH32V20x_STDPERIPH_VERSION ( (__CH32V20x_STDPERIPH_VERSION_MAIN << 8)\
|(__CH32V20x_STDPERIPH_VERSION_SUB << 0))
@@ -841,9 +845,6 @@ typedef struct
#define GPIOB_BASE (APB2PERIPH_BASE + 0x0C00)
#define GPIOC_BASE (APB2PERIPH_BASE + 0x1000)
#define GPIOD_BASE (APB2PERIPH_BASE + 0x1400)
#define GPIOE_BASE (APB2PERIPH_BASE + 0x1800)
#define GPIOF_BASE (APB2PERIPH_BASE + 0x1C00)
#define GPIOG_BASE (APB2PERIPH_BASE + 0x2000)
#define ADC1_BASE (APB2PERIPH_BASE + 0x2400)
#define ADC2_BASE (APB2PERIPH_BASE + 0x2800)
#define TIM1_BASE (APB2PERIPH_BASE + 0x2C00)
@@ -898,9 +899,6 @@ typedef struct
#define GPIOB ((GPIO_TypeDef *)GPIOB_BASE)
#define GPIOC ((GPIO_TypeDef *)GPIOC_BASE)
#define GPIOD ((GPIO_TypeDef *)GPIOD_BASE)
#define GPIOE ((GPIO_TypeDef *)GPIOE_BASE)
#define GPIOF ((GPIO_TypeDef *)GPIOF_BASE)
#define GPIOG ((GPIO_TypeDef *)GPIOG_BASE)
#define ADC1 ((ADC_TypeDef *)ADC1_BASE)
#define ADC2 ((ADC_TypeDef *)ADC2_BASE)
#define TKey1 ((ADC_TypeDef *)ADC1_BASE)
EVT/EXAM/SRC/Peripheral/inc/ch32v20x_dbgmcu.h
+1 -6
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@@ -31,13 +31,8 @@ extern "C" {
#define DBGMCU_TIM3_STOP ((uint32_t)0x00004000)
#define DBGMCU_TIM4_STOP ((uint32_t)0x00008000)
#define DBGMCU_TIM5_STOP ((uint32_t)0x00010000)
#define DBGMCU_TIM6_STOP ((uint32_t)0x00020000)
#define DBGMCU_TIM7_STOP ((uint32_t)0x00040000)
#define DBGMCU_TIM8_STOP ((uint32_t)0x00080000)
#define DBGMCU_CAN1_STOP ((uint32_t)0x00100000)
#define DBGMCU_CAN2_STOP ((uint32_t)0x00200000)
#define DBGMCU_TIM9_STOP ((uint32_t)0x00400000)
#define DBGMCU_TIM10_STOP ((uint32_t)0x00800000)
uint32_t DBGMCU_GetREVID(void);
uint32_t DBGMCU_GetDEVID(void);
EVT/EXAM/SRC/Peripheral/inc/ch32v20x_dma.h
+2 -2
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@@ -1,8 +1,8 @@
/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v20x_dma.h
* Author : WCH
* Version : V1.0.0
* Date : 2021/06/06
* Version : V1.0.1
* Date : 2025/04/28
* Description : This file contains all the functions prototypes for the
* DMA firmware library.
*********************************************************************************
EVT/EXAM/SRC/Peripheral/inc/ch32v20x_flash.h
+1 -1
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@@ -90,7 +90,7 @@ typedef enum
#define FLASH_FLAG_BSY ((uint32_t)0x00000001) /* FLASH Busy flag */
#define FLASH_FLAG_EOP ((uint32_t)0x00000020) /* FLASH End of Operation flag */
#define FLASH_FLAG_WRPRTERR ((uint32_t)0x00000010) /* FLASH Write protected error flag */
#define FLASH_FLAG_OPTERR ((uint32_t)0x00000001) /* FLASH Option Byte error flag */
#define FLASH_FLAG_OPTERR ((uint32_t)0x80000001) /* FLASH Option Byte error flag */
#define FLASH_FLAG_BANK1_BSY FLASH_FLAG_BSY /* FLASH BANK1 Busy flag*/
#define FLASH_FLAG_BANK1_EOP FLASH_FLAG_EOP /* FLASH BANK1 End of Operation flag */
EVT/EXAM/SRC/Peripheral/inc/ch32v20x_gpio.h
+2 -20
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@@ -1,8 +1,8 @@
/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v20x_gpio.h
* Author : WCH
* Version : V1.0.0
* Date : 2024/07/23
* Version : V1.0.1
* Date : 2025/04/23
* Description : This file contains all the functions prototypes for the
* GPIO firmware library.
*********************************************************************************
@@ -104,10 +104,8 @@ typedef enum
#define GPIO_Remap_ADC2_ETRGINJ ((uint32_t)0x00200008) /* ADC2 External Trigger Injected Conversion remapping */
#define GPIO_Remap_ADC2_ETRGREG ((uint32_t)0x00200010) /* ADC2 External Trigger Regular Conversion remapping */
#define GPIO_Remap_ETH ((uint32_t)0x00200020) /* Ethernet remapping (only for Connectivity line devices) */
#define GPIO_Remap_CAN2 ((uint32_t)0x00200040) /* CAN2 remapping (only for Connectivity line devices) */
#define GPIO_Remap_MII_RMII_SEL ((uint32_t)0x00200080) /* MII or RMII selection */
#define GPIO_Remap_SWJ_Disable ((uint32_t)0x00300400) /* Full SWJ Disabled */
#define GPIO_Remap_SPI3 ((uint32_t)0x00201000) /* SPI3/I2S3 Alternate Function mapping (only for Connectivity line devices) */
#define GPIO_Remap_TIM2ITR1_PTP_SOF ((uint32_t)0x00202000) /* Ethernet PTP output or USB OTG SOF (Start of Frame) connected \
to TIM2 Internal Trigger 1 for calibration \
(only for Connectivity line devices) */
@@ -115,22 +113,9 @@ typedef enum
#define GPIO_Remap_PD01 GPIO_Remap_PD0PD1
/* PCFR2 */
#define GPIO_Remap_TIM8 ((uint32_t)0x80000004) /* TIM8 Alternate Function mapping */
#define GPIO_PartialRemap_TIM9 ((uint32_t)0x80130008) /* TIM9 Partial Alternate Function mapping */
#define GPIO_FullRemap_TIM9 ((uint32_t)0x80130010) /* TIM9 Full Alternate Function mapping */
#define GPIO_PartialRemap_TIM10 ((uint32_t)0x80150020) /* TIM10 Partial Alternate Function mapping */
#define GPIO_FullRemap_TIM10 ((uint32_t)0x80150040) /* TIM10 Full Alternate Function mapping */
#define GPIO_Remap_FSMC_NADV ((uint32_t)0x80000400) /* FSMC_NADV Alternate Function mapping */
#define GPIO_PartialRemap_USART4 ((uint32_t)0x80300001) /* USART4 Partial Alternate Function mapping */
#define GPIO_FullRemap_USART4 ((uint32_t)0x80300002) /* USART4 Full Alternate Function mapping */
#define GPIO_PartialRemap_USART5 ((uint32_t)0x80320004) /* USART5 Partial Alternate Function mapping */
#define GPIO_FullRemap_USART5 ((uint32_t)0x80320008) /* USART5 Full Alternate Function mapping */
#define GPIO_PartialRemap_USART6 ((uint32_t)0x80340010) /* USART6 Partial Alternate Function mapping */
#define GPIO_FullRemap_USART6 ((uint32_t)0x80340020) /* USART6 Full Alternate Function mapping */
#define GPIO_PartialRemap_USART7 ((uint32_t)0x80360040) /* USART7 Partial Alternate Function mapping */
#define GPIO_FullRemap_USART7 ((uint32_t)0x80360080) /* USART7 Full Alternate Function mapping */
#define GPIO_PartialRemap_USART8 ((uint32_t)0x80380100) /* USART8 Partial Alternate Function mapping */
#define GPIO_FullRemap_USART8 ((uint32_t)0x80380200) /* USART8 Full Alternate Function mapping */
#define GPIO_Remap_USART1_HighBit ((uint32_t)0x80200400) /* USART1 Alternate Function mapping high bit */
/* GPIO_Port_Sources */
@@ -138,9 +123,6 @@ typedef enum
#define GPIO_PortSourceGPIOB ((uint8_t)0x01)
#define GPIO_PortSourceGPIOC ((uint8_t)0x02)
#define GPIO_PortSourceGPIOD ((uint8_t)0x03)
#define GPIO_PortSourceGPIOE ((uint8_t)0x04)
#define GPIO_PortSourceGPIOF ((uint8_t)0x05)
#define GPIO_PortSourceGPIOG ((uint8_t)0x06)
/* GPIO_Pin_sources */
#define GPIO_PinSource0 ((uint8_t)0x00)
EVT/EXAM/SRC/Peripheral/inc/ch32v20x_rcc.h
+3 -14
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@@ -1,8 +1,8 @@
/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v20x_rcc.h
* Author : WCH
* Version : V1.0.0
* Date : 2024/02/21
* Version : V1.0.1
* Date : 2025/04/26
* Description : This file provides all the RCC firmware functions.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
@@ -140,38 +140,27 @@ typedef struct
#define RCC_APB2Periph_GPIOB ((uint32_t)0x00000008)
#define RCC_APB2Periph_GPIOC ((uint32_t)0x00000010)
#define RCC_APB2Periph_GPIOD ((uint32_t)0x00000020)
#define RCC_APB2Periph_GPIOE ((uint32_t)0x00000040)
#define RCC_APB2Periph_ADC1 ((uint32_t)0x00000200)
#define RCC_APB2Periph_ADC2 ((uint32_t)0x00000400)
#define RCC_APB2Periph_TIM1 ((uint32_t)0x00000800)
#define RCC_APB2Periph_SPI1 ((uint32_t)0x00001000)
#define RCC_APB2Periph_TIM8 ((uint32_t)0x00002000)
#define RCC_APB2Periph_USART1 ((uint32_t)0x00004000)
#define RCC_APB2Periph_TIM9 ((uint32_t)0x00080000)
#define RCC_APB2Periph_TIM10 ((uint32_t)0x00100000)
/* APB1_peripheral */
#define RCC_APB1Periph_TIM2 ((uint32_t)0x00000001)
#define RCC_APB1Periph_TIM3 ((uint32_t)0x00000002)
#define RCC_APB1Periph_TIM4 ((uint32_t)0x00000004)
#define RCC_APB1Periph_TIM5 ((uint32_t)0x00000008)
#define RCC_APB1Periph_TIM6 ((uint32_t)0x00000010)
#define RCC_APB1Periph_TIM7 ((uint32_t)0x00000020)
#define RCC_APB1Periph_UART6 ((uint32_t)0x00000040)
#define RCC_APB1Periph_UART7 ((uint32_t)0x00000080)
#define RCC_APB1Periph_UART8 ((uint32_t)0x00000100)
#define RCC_APB1Periph_WWDG ((uint32_t)0x00000800)
#define RCC_APB1Periph_SPI2 ((uint32_t)0x00004000)
#define RCC_APB1Periph_SPI3 ((uint32_t)0x00008000)
#define RCC_APB1Periph_USART2 ((uint32_t)0x00020000)
#define RCC_APB1Periph_USART3 ((uint32_t)0x00040000)
#define RCC_APB1Periph_UART4 ((uint32_t)0x00080000)
#define RCC_APB1Periph_UART5 ((uint32_t)0x00100000)
#define RCC_APB1Periph_I2C1 ((uint32_t)0x00200000)
#define RCC_APB1Periph_I2C2 ((uint32_t)0x00400000)
#define RCC_APB1Periph_USB ((uint32_t)0x00800000)
#define RCC_APB1Periph_CAN1 ((uint32_t)0x02000000)
#define RCC_APB1Periph_CAN2 ((uint32_t)0x04000000)
#define RCC_APB1Periph_BKP ((uint32_t)0x08000000)
#define RCC_APB1Periph_PWR ((uint32_t)0x10000000)
#define RCC_APB1Periph_DAC ((uint32_t)0x20000000)
EVT/EXAM/SRC/Peripheral/inc/ch32v20x_tim.h
+92 -7
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@@ -1,8 +1,8 @@
/********************************** (C) COPYRIGHT *******************************
* File Name : ch32v20x_tim.h
* Author : WCH
* Version : V1.0.0
* Date : 2021/06/06
* Version : V1.0.1
* Date : 2025/04/26
* Description : This file contains all the functions prototypes for the
* TIM firmware library.
*********************************************************************************
@@ -42,7 +42,7 @@ typedef struct
- the number of PWM periods in edge-aligned mode
- the number of half PWM period in center-aligned mode
This parameter must be a number between 0x00 and 0xFF.
@note This parameter is valid only for TIM1 and TIM8. */
@note This parameter is valid only for TIM1 . */
} TIM_TimeBaseInitTypeDef;
/* TIM Output Compare Init structure definition */
@@ -56,7 +56,7 @@ typedef struct
uint16_t TIM_OutputNState; /* Specifies the TIM complementary Output Compare state.
This parameter can be a value of @ref TIM_Output_Compare_N_state
@note This parameter is valid only for TIM1 and TIM8. */
@note This parameter is valid only for TIM1 . */
uint16_t TIM_Pulse; /* Specifies the pulse value to be loaded into the Capture Compare Register.
This parameter can be a number between 0x0000 and 0xFFFF */
@@ -66,17 +66,79 @@ typedef struct
uint16_t TIM_OCNPolarity; /* Specifies the complementary output polarity.
This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
@note This parameter is valid only for TIM1 and TIM8. */
@note This parameter is valid only for TIM1. */
uint16_t TIM_OCIdleState; /* Specifies the TIM Output Compare pin state during Idle state.
This parameter can be a value of @ref TIM_Output_Compare_Idle_State
@note This parameter is valid only for TIM1 and TIM8. */
@note This parameter is valid only for TIM1. */
uint16_t TIM_OCNIdleState; /* Specifies the TIM Output Compare pin state during Idle state.
This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
@note This parameter is valid only for TIM1 and TIM8. */
@note This parameter is valid only for TIM1. */
} TIM_OCInitTypeDef;
#if defined (CH32V20x_D8) || defined(CH32V20x_D8W)
typedef struct
{
uint32_t TIM_Period; /* Specifies the period value to be loaded into the active
Auto-Reload Register at the next update event.
This parameter must be a number between 0x0000 and 0xFFFFFFFF. */
uint16_t TIM_Prescaler; /* Specifies the prescaler value used to divide the TIM clock.
This parameter can be a number between 0x0000 and 0xFFFF */
uint16_t TIM_CounterMode; /* Specifies the counter mode.
This parameter can be a value of @ref TIM_Counter_Mode */
uint16_t TIM_ClockDivision; /* Specifies the clock division.
This parameter can be a value of @ref TIM_Clock_Division_CKD */
uint8_t TIM_RepetitionCounter; /* Specifies the repetition counter value. Each time the RCR downcounter
reaches zero, an update event is generated and counting restarts
from the RCR value (N).
This means in PWM mode that (N+1) corresponds to:
- the number of PWM periods in edge-aligned mode
- the number of half PWM period in center-aligned mode
This parameter must be a number between 0x00 and 0xFF.
@note This parameter is valid only for TIM1 . */
} TIM5_TimeBaseInitTypeDef;
/* TIM Output Compare Init structure definition */
typedef struct
{
uint32_t TIM_Pulse; /* Specifies the pulse value to be loaded into the Capture Compare Register.
This parameter can be a number between 0x0000 and 0xFFFFFFFF */
uint16_t TIM_OCMode; /* Specifies the TIM mode.
This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
uint16_t TIM_OutputState; /* Specifies the TIM Output Compare state.
This parameter can be a value of @ref TIM_Output_Compare_state */
uint16_t TIM_OutputNState; /* Specifies the TIM complementary Output Compare state.
This parameter can be a value of @ref TIM_Output_Compare_N_state
@note This parameter is valid only for TIM1 . */
uint16_t TIM_OCPolarity; /* Specifies the output polarity.
This parameter can be a value of @ref TIM_Output_Compare_Polarity */
uint16_t TIM_OCNPolarity; /* Specifies the complementary output polarity.
This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
@note This parameter is valid only for TIM1. */
uint16_t TIM_OCIdleState; /* Specifies the TIM Output Compare pin state during Idle state.
This parameter can be a value of @ref TIM_Output_Compare_Idle_State
@note This parameter is valid only for TIM1. */
uint16_t TIM_OCNIdleState; /* Specifies the TIM Output Compare pin state during Idle state.
This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
@note This parameter is valid only for TIM1. */
} TIM5_OCInitTypeDef;
#endif
/* TIM Input Capture Init structure definition */
typedef struct
{
@@ -501,6 +563,29 @@ void TIM_ClearFlag(TIM_TypeDef *TIMx, uint16_t TIM_FLAG);
ITStatus TIM_GetITStatus(TIM_TypeDef *TIMx, uint16_t TIM_IT);
void TIM_ClearITPendingBit(TIM_TypeDef *TIMx, uint16_t TIM_IT);
#if defined (CH32V20x_D8) || defined(CH32V20x_D8W)
void TIM5_TimeBaseInit(TIM_TypeDef *TIMx, TIM5_TimeBaseInitTypeDef *TIM5_TimeBaseInitStruct);
void TIM5_OC1Init(TIM_TypeDef *TIMx, TIM5_OCInitTypeDef *TIM5_OCInitStruct);
void TIM5_OC2Init(TIM_TypeDef *TIMx, TIM5_OCInitTypeDef *TIM5_OCInitStruct);
void TIM5_OC3Init(TIM_TypeDef *TIMx, TIM5_OCInitTypeDef *TIM5_OCInitStruct);
void TIM5_OC4Init(TIM_TypeDef *TIMx, TIM5_OCInitTypeDef *TIM5_OCInitStruct);
void TIM5_TimeBaseStructInit(TIM5_TimeBaseInitTypeDef *TIM5_TimeBaseInitStruct);
void TIM5_OCStructInit(TIM5_OCInitTypeDef *TIM5_OCInitStruct);
void TIM5_SetCounter(TIM_TypeDef *TIMx, uint32_t Counter);
void TIM5_SetAutoreload(TIM_TypeDef *TIMx, uint32_t Autoreload);
void TIM5_SetCompare1(TIM_TypeDef *TIMx, uint32_t Compare1);
void TIM5_SetCompare2(TIM_TypeDef *TIMx, uint32_t Compare2);
void TIM5_SetCompare3(TIM_TypeDef *TIMx, uint32_t Compare3);
void TIM5_SetCompare4(TIM_TypeDef *TIMx, uint32_t Compare4);
uint32_t TIM5_GetCapture1(TIM_TypeDef *TIMx);
uint32_t TIM5_GetCapture2(TIM_TypeDef *TIMx);
uint32_t TIM5_GetCapture3(TIM_TypeDef *TIMx);
uint32_t TIM5_GetCapture4(TIM_TypeDef *TIMx);
uint32_t TIM5_GetCounter(TIM_TypeDef *TIMx);
#endif
#ifdef __cplusplus
}
#endif