V2.31

2026-01-07 10:43:29 +08:00
parent 6209b6e7f9
commit d161f84c90
551 changed files with 23169 additions and 1518 deletions
@@ -0,0 +1,115 @@
+/********************************** (C) COPYRIGHT *******************************
+ * File Name          : main.c
+ * Author             : WCH
+ * Version            : V1.0.0
+ * Date               : 2024/11/20
+ * Description        : Main program body.
+ *********************************************************************************
+ * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
+ * Attention: This software (modified or not) and binary are used for 
+ * microcontroller manufactured by Nanjing Qinheng Microelectronics.
+ *******************************************************************************/
+
+/*
+ *@Note
+ *TIM continue Mode routine:
+ *TIM1_CH1(PA8)
+ *This example demonstrates that the TIM_CH1(PA8) pin outputs PWM in PWM mode by continue mode
+ *
+ */
+
+#include "debug.h"
+
+#define Size    18
+/* Private variables */
+u16 pbuf[Size] = {0x0081,0x0000,0x0000,0x0100,
+                  0x001f,0x0000,0x0070,0x0000,
+                  0x0001,0x0000,0xbb7f,0x0064,
+                  0x0000,0x0032,0x0000,0x0000,0x0000,0x8000};
+
+/*********************************************************************
+ * @fn      TIM1_DMA_Init
+ *
+ * @brief   Initializes the TIM DMAy Channelx configuration.
+ *
+ * @return  none
+ */
+void TIM1_DMA_Init(DMA_Channel_TypeDef *DMA_CHx, u32 ppadr, u32 memadr, u16 bufsize)
+{
+    DMA_InitTypeDef   DMA_InitStructure = {0};
+    NVIC_InitTypeDef  NVIC_InitStructure = {0};
+    GPIO_InitTypeDef  GPIO_InitStructure = {0};
+
+    RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
+    RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA |RCC_APB2Periph_TIM1, ENABLE);
+
+    GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8;
+    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
+    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+    GPIO_Init(GPIOA, &GPIO_InitStructure);
+
+    GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
+    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
+    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+    GPIO_Init(GPIOA, &GPIO_InitStructure);
+    GPIO_SetBits(GPIOA, GPIO_Pin_2);
+
+    DMA_DeInit(DMA_CHx);
+    DMA_InitStructure.DMA_PeripheralBaseAddr = ppadr;
+    DMA_InitStructure.DMA_MemoryBaseAddr = memadr;
+    DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
+    DMA_InitStructure.DMA_BufferSize = bufsize;
+    DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
+    DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
+    DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
+    DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
+    DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
+    DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
+    DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
+    DMA_Init(DMA_CHx, &DMA_InitStructure);
+
+    DMA_Cmd(DMA_CHx, ENABLE);
+
+    NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel5_IRQn;
+    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
+    NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2;
+    NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+    NVIC_Init(&NVIC_InitStructure);
+    DMA_ITConfig( DMA1_Channel5, DMA_IT_TC, ENABLE );
+}
+
+void DMA1_Channel5_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
+void DMA1_Channel5_IRQHandler(void)
+{
+    if( DMA_GetITStatus(DMA1_IT_TC5) != RESET )
+    {
+        GPIO_ResetBits(GPIOA, GPIO_Pin_2);
+        DMA_ClearITPendingBit(DMA1_IT_TC5);
+    }
+}
+
+/*********************************************************************
+ * @fn      main
+ *
+ * @brief   Main program.
+ *
+ * @return  none
+ */
+int main(void)
+{
+    SystemCoreClockUpdate();
+    Delay_Init();
+    USART_Printf_Init(115200);
+    printf("SystemClk:%d\r\n", SystemCoreClock);
+    printf( "ChipID:%08x\r\n", DBGMCU_GetCHIPID() );
+
+    TIM1_DMA_Init(DMA1_Channel5, (u32)&TIM1->DMAADR, (u32)pbuf, Size);
+    TIM_DMAConfig(TIM1, TIM_DMABase_CR1, TIM_DMABurstLength_18Bytes);
+
+    TIM_DMACmd(TIM1, TIM_DMA_Update, ENABLE);
+    TIM_Cmd(TIM1, ENABLE);
+
+    while(1)
+        {
+        }
+}