bstanwell/ch32v20x-examples
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qiyongshuang
2026-01-07 10:43:29 +08:00
parent 6209b6e7f9
commit d161f84c90
551 changed files with 23169 additions and 1518 deletions
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EVT/EXAM/TIM/TIM_INT/.template
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@@ -2,7 +2,7 @@ Vendor=WCH
Toolchain=RISC-V
Series=CH32V203
RTOS=NoneOS
MCU=CH32V203RBT6
MCU=CH32V203RBT
Link=WCH-Link
PeripheralVersion==1.0
Description==ROM(byte): 64K, SRAM(byte): 20K, CHIP PINS: 32, GPIO PORTS: 27.\nWCH CH32V2 series of mainstream MCUs covers the needs of a large variety of applications in the industrial,medical and consumer markets. High performance with first-class peripherals and low-power,low-voltage operation is paired with a high level of integration at accessible prices with a simple architecture and easy-to-use tools.
EVT/EXAM/TIM/TIM_INT/User/main.c
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@@ -2,7 +2,7 @@
* File Name : main.c
* Author : WCH
* Version : V1.0.0
* Date : 2024/08/23
* Date : 2025/09/23
* Description : Main program body.
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
@@ -68,7 +68,7 @@ void TIM1_INT_Init( u16 arr, u16 psc)
TIM_TimeBaseInitStructure.TIM_Prescaler = psc;
TIM_TimeBaseInitStructure.TIM_ClockDivision = TIM_CKD_DIV1;
TIM_TimeBaseInitStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInitStructure.TIM_RepetitionCounter = 50;
TIM_TimeBaseInitStructure.TIM_RepetitionCounter = 50-1;
TIM_TimeBaseInit( TIM1, &TIM_TimeBaseInitStructure);
TIM_ClearITPendingBit( TIM1, TIM_IT_Update );
EVT/EXAM/TIM/TIM_INT/User/system_ch32v20x.c
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@@ -4,7 +4,7 @@
* Version : V1.0.0
* Date : 2021/06/06
* Description : CH32V20x Device Peripheral Access Layer System Source File.
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
* For HSE = 8Mhz (other CH32V203x)
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.