V2.31
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@@ -13,4 +13,4 @@ Series=CH32V203
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Description=ROM(byte): 64K, SRAM(byte): 20K, CHIP PINS: 32, GPIO PORTS: 27.\nWCH CH32V2 series of mainstream MCUs covers the needs of a large variety of applications in the industrial,medical and consumer markets. High performance with first-class peripherals and low-power,low-voltage operation is paired with a high level of integration at accessible prices with a simple architecture and easy-to-use tools.
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PeripheralVersion=1.0
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MCU=CH32V203RBT6
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MCU=CH32V203RBT
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@@ -1,10 +1,10 @@
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;/********************************** (C) COPYRIGHT *******************************
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;* File Name : startup_ch32v20x_D6.s
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;* Author : WCH
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;* Version : V1.0.1
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;* Date : 2024/01/31
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;* Description : CH32V203F6-CH32V203F8-CH32V203G6-CH32V203G8-CH32V203K8-CH32V203C6-CH32V203C8-CH32V203G8
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;* vector table for eclipse toolchain.
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;* Version : V1.0.2
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;* Date : 2025/10/21
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;* Description : CH32V203F6-CH32V203F8-CH32V203G6-CH32V203G8-CH32V203K8-CH32V203C6-CH32V203C8-CH32V203G8
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;* Startup File
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;*********************************************************************************
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;* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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;* Attention: This software (modified or not) and binary are used for
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@@ -208,9 +208,9 @@ handle_reset:
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.option norelax
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la gp, __global_pointer$
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.option pop
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1:
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la sp, _eusrstack
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2:
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/* Load data section from flash to RAM */
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la a0, _data_lma
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la a1, _data_vma
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@@ -1,10 +1,10 @@
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;/********************************** (C) COPYRIGHT *******************************
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;* File Name : startup_ch32v20x_D8.s
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;* Author : WCH
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;* Version : V1.0.1
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;* Date : 2024/01/31
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;* Version : V1.0.2
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;* Date : 2025/10/21
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;* Description : CH32V203RB
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;* vector table for eclipse toolchain.
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;* Startup File
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;*********************************************************************************
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;* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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;* Attention: This software (modified or not) and binary are used for
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@@ -225,9 +225,9 @@ handle_reset:
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.option norelax
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la gp, __global_pointer$
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.option pop
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1:
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la sp, _eusrstack
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2:
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/* Load data section from flash to RAM */
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la a0, _data_lma
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la a1, _data_vma
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@@ -1,10 +1,10 @@
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;/********************************** (C) COPYRIGHT *******************************
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;* File Name : startup_ch32v20x_D8W.s
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;* Author : WCH
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;* Version : V1.0.1
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;* Date : 2023/11/20
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;* Version : V1.0.2
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;* Date : 2025/10/21
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;* Description : CH32V208x
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;* vector table for eclipse toolchain.
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;* Startup File
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;*********************************************************************************
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;* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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;* Attention: This software (modified or not) and binary are used for
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@@ -229,9 +229,9 @@ handle_reset:
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.option norelax
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la gp, __global_pointer$
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.option pop
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1:
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la sp, _eusrstack
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2:
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/* Load data section from flash to RAM */
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la a0, _data_lma
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la a1, _data_vma
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@@ -33,7 +33,7 @@
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#define TOS_CFG_SEM_EN 1u
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#define TOS_CFG_CPU_SYSTICK_PRIO 0xF0 //V307ÓÅÏȼ¶¸ßËÄλÓÐЧ
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#define TOS_CFG_CPU_SYSTICK_PRIO 0xF0
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#if (TOS_CFG_QUEUE_EN > 0u)
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#define TOS_CFG_MSG_EN 1u
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@@ -32,10 +32,10 @@ __PORT__ void port_int_disable(void); //at port.s
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__PORT__ void port_int_enable(void); //at port.s
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/* risc-v 无cpsr,此函数用于读取mstatus,并清除MIE */
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__PORT__ cpu_cpsr_t port_cpsr_save(void); //at port.s
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/* risc-v 无cpsr,此函数给mstatus赋值 */
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__PORT__ void port_cpsr_restore(cpu_cpsr_t cpsr); //at port.s
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@@ -90,7 +90,7 @@ __PORT__ void port_cpu_init()
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void SysTick_Handler(void) __attribute__((interrupt()));
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void SysTick_Handler(void)
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{
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GET_INT_SP(); /* 切换中断栈 */
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GET_INT_SP();
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if (tos_knl_is_running())
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{
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tos_knl_irq_enter();
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@@ -98,7 +98,7 @@ void SysTick_Handler(void)
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tos_tick_handler();
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tos_knl_irq_leave();
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}
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FREE_INT_SP(); /* 释放中断栈 */
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FREE_INT_SP();
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}
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@@ -108,7 +108,7 @@ __PORT__ k_time_t port_systick_max_delay_millisecond(void)
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k_time_t max_millisecond;
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uint32_t max_cycle;
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max_cycle = 0xffffffff; // systick 是64位,这里用低32位
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max_cycle = 0xffffffff;
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max_millisecond = (k_time_t)((uint64_t)max_cycle * K_TIME_MILLISEC_PER_SEC / TOS_CFG_CPU_CLOCK); // CLOCK: cycle per second
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return max_millisecond;
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}
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@@ -4,7 +4,7 @@
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* Version : V1.0.0
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* Date : 2021/06/06
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* Description : CH32V20x Device Peripheral Access Layer System Source File.
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
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* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
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* For HSE = 8Mhz (other CH32V203x)
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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