bstanwell/ch32v20x-examples
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qiyongshuang
2026-01-07 10:43:29 +08:00
parent 6209b6e7f9
commit d161f84c90
551 changed files with 23169 additions and 1518 deletions
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EVT/EXAM/USB/USBFS/DEVICE/CH372Device/.template
+1 -1
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@@ -2,7 +2,7 @@ Vendor=WCH
Toolchain=RISC-V
Series=CH32V203
RTOS=NoneOS
MCU=CH32V203RBT6
MCU=CH32V203RBT
Link=WCH-Link
PeripheralVersion=1.0
Description=ROM(byte): 64K, SRAM(byte): 20K, CHIP PINS: 32, GPIO PORTS: 27.\nWCH CH32V2 series of mainstream MCUs covers the needs of a large variety of applications in the industrial,medical and consumer markets. High performance with first-class peripherals and low-power,low-voltage operation is paired with a high level of integration at accessible prices with a simple architecture and easy-to-use tools.
EVT/EXAM/USB/USBFS/DEVICE/CH372Device/CH372Device.wvproj
+1 -1
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@@ -7,7 +7,7 @@
"toolchain": "RISC-V",
"series": "CH32V203",
"rtos": "NoneOS",
"mcu": "CH32V203RBT6",
"mcu": "CH32V203RBT",
"description": "ROM(byte): 64K, SRAM(byte): 20K, CHIP PINS: 32, GPIO PORTS: 27.\\nWCH CH32V2 series of mainstream MCUs covers the needs of a large variety of applications in the industrial,medical and consumer markets. High performance with first-class peripherals and low-power,low-voltage operation is paired with a high level of integration at accessible prices with a simple architecture and easy-to-use tools.",
"link": "WCH-Link",
"peripheral_version": "1.0"
EVT/EXAM/USB/USBFS/DEVICE/CH372Device/User/system_ch32v20x.c
+1 -1
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@@ -4,7 +4,7 @@
* Version : V1.0.0
* Date : 2021/06/06
* Description : CH32V20x Device Peripheral Access Layer System Source File.
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
* For HSE = 8Mhz (other CH32V203x)
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
EVT/EXAM/USB/USBFS/DEVICE/CompatibilityHID/.template
+1 -1
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@@ -13,4 +13,4 @@ Series=CH32V203
Description=ROM(byte): 64K, SRAM(byte): 20K, CHIP PINS: 32, GPIO PORTS: 27.\nWCH CH32V2 series of mainstream MCUs covers the needs of a large variety of applications in the industrial,medical and consumer markets. High performance with first-class peripherals and low-power,low-voltage operation is paired with a high level of integration at accessible prices with a simple architecture and easy-to-use tools.
PeripheralVersion=1.0
MCU=CH32V203RBT6
MCU=CH32V203RBT
EVT/EXAM/USB/USBFS/DEVICE/CompatibilityHID/User/system_ch32v20x.c
+1 -1
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@@ -4,7 +4,7 @@
* Version : V1.0.0
* Date : 2021/06/06
* Description : CH32V20x Device Peripheral Access Layer System Source File.
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
* For HSE = 8Mhz (other CH32V203x)
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
EVT/EXAM/USB/USBFS/DEVICE/CompatibilityHID/User/usbd_compatibility_hid.c
+1 -1
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@@ -1,7 +1,7 @@
/********************************** (C) COPYRIGHT *******************************
* File Name : usbd_compatibility_hid.c
* Author : WCH
* Version : v0.01
* Version : V1.0.1
* Date : 2024/02/05
* Description:
*******************************************************************************
EVT/EXAM/USB/USBFS/DEVICE/CompatibilityHID/User/usbd_compatibility_hid.h
+3 -3
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@@ -1,8 +1,8 @@
/********************************** (C) COPYRIGHT *******************************
* File Name :usbd_compatibility_hid.h
* Author :OWNER
* Version : v0.01
* Date : 2022Äê7ÔÂ8ÈÕ
* Author : WCH
* Version : V1.0.1
* Date : 2022/07/08
* Description:
*******************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
EVT/EXAM/USB/USBFS/DEVICE/CompositeKM/.template
+1 -1
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@@ -12,5 +12,5 @@ Series=CH32V203
Description=ROM(byte): 64K, SRAM(byte): 20K, CHIP PINS: 32, GPIO PORTS: 27.\nWCH CH32V2 series of mainstream MCUs covers the needs of a large variety of applications in the industrial,medical and consumer markets. High performance with first-class peripherals and low-power,low-voltage operation is paired with a high level of integration at accessible prices with a simple architecture and easy-to-use tools.
PeripheralVersion=1.0
MCU=CH32V203RBT6
MCU=CH32V203RBT
Target Path=obj/CompositeKM.hex
EVT/EXAM/USB/USBFS/DEVICE/CompositeKM/User/system_ch32v20x.c
+1 -1
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@@ -4,7 +4,7 @@
* Version : V1.0.0
* Date : 2021/06/06
* Description : CH32V20x Device Peripheral Access Layer System Source File.
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
* For HSE = 8Mhz (other CH32V203x)
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
EVT/EXAM/USB/USBFS/DEVICE/MSC_CD-ROM/.template
+1 -1
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@@ -13,4 +13,4 @@ Series=CH32V203
Description=ROM(byte): 64K, SRAM(byte): 20K, CHIP PINS: 32, GPIO PORTS: 27.\nWCH CH32V2 series of mainstream MCUs covers the needs of a large variety of applications in the industrial,medical and consumer markets. High performance with first-class peripherals and low-power,low-voltage operation is paired with a high level of integration at accessible prices with a simple architecture and easy-to-use tools.
PeripheralVersion=1.0
MCU=CH32V203RBT6
MCU=CH32V203RBT
EVT/EXAM/USB/USBFS/DEVICE/MSC_CD-ROM/User/system_ch32v20x.c
+1 -1
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@@ -4,7 +4,7 @@
* Version : V1.0.0
* Date : 2021/06/06
* Description : CH32V20x Device Peripheral Access Layer System Source File.
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
* For HSE = 8Mhz (other CH32V203x)
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
EVT/EXAM/USB/USBFS/DEVICE/MSC_U-Disk/.template
+1 -1
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@@ -13,4 +13,4 @@ Series=CH32V203
Description=ROM(byte): 64K, SRAM(byte): 20K, CHIP PINS: 32, GPIO PORTS: 27.\nWCH CH32V2 series of mainstream MCUs covers the needs of a large variety of applications in the industrial,medical and consumer markets. High performance with first-class peripherals and low-power,low-voltage operation is paired with a high level of integration at accessible prices with a simple architecture and easy-to-use tools.
PeripheralVersion=1.0
MCU=CH32V203RBT6
MCU=CH32V203RBT
EVT/EXAM/USB/USBFS/DEVICE/MSC_U-Disk/User/system_ch32v20x.c
+1 -1
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@@ -4,7 +4,7 @@
* Version : V1.0.0
* Date : 2021/06/06
* Description : CH32V20x Device Peripheral Access Layer System Source File.
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
* For HSE = 8Mhz (other CH32V203x)
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
EVT/EXAM/USB/USBFS/DEVICE/SimulateCDC-HID/User/system_ch32v20x.c
+1 -1
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@@ -4,7 +4,7 @@
* Version : V1.0.0
* Date : 2021/06/06
* Description : CH32V20x Device Peripheral Access Layer System Source File.
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
* For HSE = 8Mhz (other CH32V203x)
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
EVT/EXAM/USB/USBFS/DEVICE/SimulateCDC/User/system_ch32v20x.c
+1 -1
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@@ -4,7 +4,7 @@
* Version : V1.0.0
* Date : 2021/06/06
* Description : CH32V20x Device Peripheral Access Layer System Source File.
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
* For HSE = 8Mhz (other CH32V203x)
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
EVT/EXAM/USB/USBFS/HOST_IAP/APP/.template
+1 -1
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@@ -10,6 +10,6 @@ PeripheralVersion=1.4
Target Path=obj/APP.hex
Vendor=WCH
MCU=CH32V203RBT6
MCU=CH32V203RBT
Mcu Type=CH32V20x
Link=WCH-Link
EVT/EXAM/USB/USBFS/HOST_IAP/APP/User/system_ch32v20x.c
+1 -1
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@@ -4,7 +4,7 @@
* Version : V1.0.0
* Date : 2021/06/06
* Description : CH32V20x Device Peripheral Access Layer System Source File.
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
* For HSE = 8Mhz (other CH32V203x)
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
EVT/EXAM/USB/USBFS/HOST_IAP/HOST_IAP/.template
+1 -1
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@@ -10,6 +10,6 @@ PeripheralVersion=1.4
Target Path=obj\HOST_IAP.hex
Vendor=WCH
MCU=CH32V203RBT6
MCU=CH32V203RBT
Mcu Type=CH32V20x
Link=WCH-Link
EVT/EXAM/USB/USBFS/HOST_IAP/HOST_IAP/User/Host_IAP/usb_host_iap.c
+4 -5
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@@ -83,7 +83,7 @@ void FLASH_ReadWordAdd(uint32_t address, u32* buff, uint16_t length)
for(i = 0; i < length; i++)
{
buff[i] = *(__IO uint32_t*)address;//��ָ����ַ��һ���ֵ�����
buff[i] = *(__IO uint32_t*)address;
address += 4;
}
}
@@ -153,7 +153,6 @@ uint8_t IAP_Flash_Read(uint32_t address, uint8_t* buff, uint32_t length)
*/
uint8_t mFLASH_ProgramPage_Fast(uint32_t addr, uint32_t* buffer)
{
/* ����оƬ��flash��������޸Ĵ˴����� */
FLASH_ProgramPage_Fast( addr, buffer );
return 0;
}
@@ -509,9 +508,9 @@ void IAP_Jump_APP(void)
/* .... */
/* Jump Code */
#if DEF_CORE_TYPE == DEF_CORE_CM3
jump2app = (iapfun) * (vu32*)(DEF_APP_CODE_START_ADDR + 4); //�û��������ڶ�����Ϊ����ʼ��ַ(��λ��ַ)
MSR_MSP(*(vu32*)DEF_APP_CODE_START_ADDR); //��ʼ���û���������ջָ��(�û��������ĵ�һ�������ڴ��ջ����ַ)
jump2app(); //��ת��APP.
jump2app = (iapfun) * (vu32*)(DEF_APP_CODE_START_ADDR + 4);
MSR_MSP(*(vu32*)DEF_APP_CODE_START_ADDR);
jump2app();
#elif DEF_CORE_TYPE == DEF_CORE_RV
/* Code for Jump, Enable Chip soft reset interrupt, jump to application code in soft reset interrupt */
Delay_Ms(500);
EVT/EXAM/USB/USBFS/HOST_IAP/HOST_IAP/User/USB_Host/ch32v20x_usbfs_host.c
+1
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@@ -65,6 +65,7 @@ void USBFS_Host_Init( FunctionalState sta )
if( sta == ENABLE )
{
USBFSH->BASE_CTRL = USBFS_UC_HOST_MODE;
while(!(USBFSH->BASE_CTRL & USBFS_UC_HOST_MODE));
USBFSH->HOST_CTRL = 0;
USBFSH->DEV_ADDR = 0;
USBFSH->HOST_EP_MOD = USBFS_UH_EP_TX_EN | USBFS_UH_EP_RX_EN;
EVT/EXAM/USB/USBFS/HOST_IAP/HOST_IAP/User/system_ch32v20x.c
+1 -1
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@@ -4,7 +4,7 @@
* Version : V1.0.0
* Date : 2021/06/06
* Description : CH32V20x Device Peripheral Access Layer System Source File.
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
* For HSE = 8Mhz (other CH32V203x)
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
EVT/EXAM/USB/USBFS/HOST_KM/.template
+1 -1
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@@ -12,5 +12,5 @@ Series=CH32V203
Description=ROM(byte): 64K, SRAM(byte): 20K, CHIP PINS: 32, GPIO PORTS: 27.\nWCH CH32V2 series of mainstream MCUs covers the needs of a large variety of applications in the industrial,medical and consumer markets. High performance with first-class peripherals and low-power,low-voltage operation is paired with a high level of integration at accessible prices with a simple architecture and easy-to-use tools.
PeripheralVersion=1.0
MCU=CH32V203RBT6
MCU=CH32V203RBT
Target Path=obj/HOST_KM.hex
EVT/EXAM/USB/USBFS/HOST_KM/User/USB_Host/ch32v20x_usbfs_host.c
+1
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@@ -65,6 +65,7 @@ void USBFS_Host_Init( FunctionalState sta )
if( sta == ENABLE )
{
USBFSH->BASE_CTRL = USBFS_UC_HOST_MODE;
while(!(USBFSH->BASE_CTRL & USBFS_UC_HOST_MODE));
USBFSH->HOST_CTRL = 0;
USBFSH->DEV_ADDR = 0;
USBFSH->HOST_EP_MOD = USBFS_UH_EP_TX_EN | USBFS_UH_EP_RX_EN;
EVT/EXAM/USB/USBFS/HOST_KM/User/system_ch32v20x.c
+1 -1
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@@ -4,7 +4,7 @@
* Version : V1.0.0
* Date : 2021/06/06
* Description : CH32V20x Device Peripheral Access Layer System Source File.
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
* For HSE = 8Mhz (other CH32V203x)
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
EVT/EXAM/USB/USBFS/HOST_MTP_FileSystem/.template
+1 -1
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@@ -12,5 +12,5 @@ Series=CH32V203
Description=ROM(byte): 64K, SRAM(byte): 20K, CHIP PINS: 32, GPIO PORTS: 27.\nWCH CH32V2 series of mainstream MCUs covers the needs of a large variety of applications in the industrial,medical and consumer markets. High performance with first-class peripherals and low-power,low-voltage operation is paired with a high level of integration at accessible prices with a simple architecture and easy-to-use tools.
PeripheralVersion=1.0
MCU=CH32V203RBT6
MCU=CH32V203RBT
Target Path=obj/HOST_MTP_FileSystem.hex
EVT/EXAM/USB/USBFS/HOST_MTP_FileSystem/User/USB_Host/ch32v20x_usbfs_host.c
+1
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@@ -65,6 +65,7 @@ void USBFS_Host_Init( FunctionalState sta )
if( sta == ENABLE )
{
USBFSH->BASE_CTRL = USBFS_UC_HOST_MODE;
while(!(USBFSH->BASE_CTRL & USBFS_UC_HOST_MODE));
USBFSH->HOST_CTRL = 0;
USBFSH->DEV_ADDR = 0;
USBFSH->HOST_EP_MOD = USBFS_UH_EP_TX_EN | USBFS_UH_EP_RX_EN;
EVT/EXAM/USB/USBFS/HOST_MTP_FileSystem/User/system_ch32v20x.c
+1 -1
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@@ -4,7 +4,7 @@
* Version : V1.0.0
* Date : 2021/06/06
* Description : CH32V20x Device Peripheral Access Layer System Source File.
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
* For HSE = 8Mhz (other CH32V203x)
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
EVT/EXAM/USB/USBFS/HOST_Udisk/.template
+1 -1
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@@ -10,6 +10,6 @@ PeripheralVersion=1.4
Target Path=obj\Host_UDisk_Exams.hex
Vendor=WCH
MCU=CH32V203RBT6
MCU=CH32V203RBT
Mcu Type=CH32V20x
Link=WCH-Link
EVT/EXAM/USB/USBFS/HOST_Udisk/User/USB_Host/ch32v20x_usbfs_host.c
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@@ -65,6 +65,7 @@ void USBFS_Host_Init( FunctionalState sta )
if( sta == ENABLE )
{
USBFSH->BASE_CTRL = USBFS_UC_HOST_MODE;
while(!(USBFSH->BASE_CTRL & USBFS_UC_HOST_MODE));
USBFSH->HOST_CTRL = 0;
USBFSH->DEV_ADDR = 0;
USBFSH->HOST_EP_MOD = USBFS_UH_EP_TX_EN | USBFS_UH_EP_RX_EN;
EVT/EXAM/USB/USBFS/HOST_Udisk/User/system_ch32v20x.c
+1 -1
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@@ -4,7 +4,7 @@
* Version : V1.0.0
* Date : 2021/06/06
* Description : CH32V20x Device Peripheral Access Layer System Source File.
* For HSE = 32Mhz (CH32V208x/CH32V203RBT6)
* For HSE = 32Mhz (CH32V208x/CH32V203RBT)
* For HSE = 8Mhz (other CH32V203x)
*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.