V1.9

EVT/EXAM/IAP/USB_UART/CH32V20x_IAP/User/iap.c

@@ -104,6 +104,8 @@ u8 RecData_Deal(void)
          Verity_addr = FLASH_Base;
 
          s = ERR_End;
+         FLASH->CTLR |= ((uint32_t)0x00008000);
+         FLASH->CTLR |= ((uint32_t)0x00000080);
          break;
 
      default:

EVT/EXAM/IAP/USB_UART/CH32V20x_IAP/User/system_ch32v20x.c

@@ -205,6 +205,7 @@ void SystemCoreClockUpdate (void)
  */
 static void SetSysClock(void)
 {
+  //GPIO_IPD_Unused();
 #ifdef SYSCLK_FREQ_HSE
     SetSysClockToHSE();
 #elif defined SYSCLK_FREQ_48MHz_HSE