xxx wip

bootloader.c

@@ -177,6 +177,8 @@ const uint8_t ROOT_DIR[32 * 3] __attribute__((aligned(2))) = {
 #define R32_RCC_CFGR0       (*(volatile uint32_t*)0x40021004)
 #define R32_RCC_APB2PCENR   (*(volatile uint32_t*)0x40021018)
 #define R32_RCC_APB1PCENR   (*(volatile uint32_t*)0x4002101C)
+#define R32_RCC_RSTSCKR     (*(volatile uint32_t*)0x40021024)
+
 #define R32_GPIOA_CFGLR     (*(volatile uint32_t*)0x40010800)
 #define R32_GPIOA_CFGHR     (*(volatile uint32_t*)0x40010804)
 #define R32_GPIOA_BSHR      (*(volatile uint32_t*)0x40010810)
@@ -284,7 +286,9 @@ __attribute__((always_inline)) static inline void synthesize_block(uint32_t bloc
 }
 
 __attribute__((naked)) int main(void) {
+    // clear all reset causes
     R16_BKP_DATAR10 = 0;
+    R32_RCC_RSTSCKR = 1 << 24;
 
     // PLL setup: system clock 96 MHz
     R32_EXTEN_CTR |= (1 << 4);  // sneaky div2
@@ -806,8 +810,6 @@ error_csw:
                         break;
                     case STATE_SENT_CSW_REBOOT:
                         // todo reboot into ram
-                        for (int i = 0; i < 1000000; i++)
-                            asm volatile("");
                         R32_EXTEN_CTR &= ~(1 << 1);
                         PFIC_SCTLR = 0x80000000;
                         while (1) { asm volatile(""); }

minimal-payload/Makefile

@@ -4,13 +4,20 @@ RV_ARCH = rv32imacxw
 
 CC = riscv-none-elf-gcc
 OBJDUMP = riscv-none-elf-objdump
+OBJCOPY = riscv-none-elf-objcopy
 CFLAGS = -ggdb3 -Os -march=$(RV_ARCH) -ffunction-sections -fdata-sections
 LDFLAGS = -ggdb3 -march=$(RV_ARCH) -Wl,--gc-sections --specs=nosys.specs
 
-all: main.elf
+all: main.uf2
 
 main.elf: startup.o main.o
 
+%.uf2: %.bin
+	~/code/uf2/utils/uf2conv.py -f 0xdeadbeef -b 0x08002000 -o $@ $<
+
+%.bin: %.elf
+	$(OBJCOPY) -O binary $< $@
+
 %.elf: linker.lds
 	$(CC) -Xlinker -Map=$(@:.elf=.map) -Wl,--script=linker.lds -nostartfiles -o $@ $(filter-out linker.lds,$+)
 	$(OBJDUMP) -xdsS $@ >$(@:.elf=.dump)

minimal-payload/linker.lds

@@ -7,7 +7,7 @@ MEMORY
 {
     /* CH32V20x_D6 -> 10 KB SRAM */
     /* allow full flash (incl. non-zero-wait) */
-    FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 224K
+    FLASH (rx) : ORIGIN = 0x00002000, LENGTH = (224K - 8K)
     RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 10K
 }
 

startup.S

@@ -81,38 +81,12 @@ _enter_application_code:
     xor a1, a1, a2
     sw a1, (a0)
 
-_wipwipwip:
-    j _wipwipwip
-
     j _bootloader_limit
 
 _enter_bootloader:
     la gp, 0
     la sp, 0
 
-    // Load data section from flash to RAM
-    la a0, _data_lma
-    la a1, _data_vma
-    la a2, _edata
-    bgeu a1, a2, 2f
-1:
-    lw t0, (a0)
-    sw t0, (a1)
-    addi a0, a0, 4
-    addi a1, a1, 4
-    bltu a1, a2, 1b
-2:
-
-    // Clear bss section
-    la a0, _sbss
-    la a1, _ebss
-    bgeu a0, a1, 2f
-1:
-    sw zero, (a0)
-    addi a0, a0, 4
-    bltu a0, a1, 1b
-2:
-
     li t0, 0x1f
     csrw 0xbc0, t0